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116 Commits

Author SHA1 Message Date
Alex Xie 7e8f7b5927 SWDEV-249516 - [Lnx][Navi][rocm]conformance image read write tests data error 
Change-Id: Ie1c4fda953198b49ed66fea9da23e62c686d9cea
 2020-09-01 17:20:58 -04:00
Tao Sang e986f5c820 Replace private libelf with elfio 
Change-Id: I4c630d78f7bf23dda85ec8480bb2790864405657
 2020-08-26 12:32:13 -04:00
Jason Tang 19d1497fa2 SWDEV-239502 - fix interop regression 
When header==0, the legitimate packet->header is wiped out, so also add an assert.

Change-Id: I6b3037d4618719262b0d7c1792bd54f768a63660
 2020-08-25 18:11:18 -04:00
Aryan Salmanpour d2b9d267b2 SWDEV-248499 Fix a crash when printf is used with cooperative kernels 
root cause - cooperative queue is not inserted into queuePool_ (HSA queues) of ROC device calss causing a crash when creating hostcall buffers for printf

Change-Id: I3f9aceb4e5fe6a7c7a2a549a4bb0a3511fe02799
 2020-08-25 16:51:34 -04:00
Jason Tang c33470ab4d SWDEV-239502 - Create copyImageBuffer_ without flags 
Change-Id: Ifcb5992d58f3419635d2aca2d51f2dacd7cd466d
 2020-08-14 17:25:58 -04:00
Vlad Sytchenko 6780a9ac66 Remove unnecessary SVM commit 
Change-Id: I5cb887ead166401a59b0c980f29fd615b19745be
 2020-08-13 13:21:03 -04:00
Jason Tang db5a2d4c2d SWDEV-239502 - Fix image test regression 
Change-Id: Iea35fb0f1964d09a35131b4a20ac8f6f82850a8e
 2020-08-13 11:58:20 -04:00
German Andryeyev 6e69258b69 Enable prefetch async functionality 
Fix a typo with the name define, when compilation wasn't enabled.
Force CPU prefetch if system was forced in runtime

Change-Id: Id4b578f9fa44a45426fdb5d8ecb1da803aa42313
 2020-08-13 11:09:10 -04:00
Jason Tang 152a2dfb5a SWDEV-247463 - Fix regression: ocltst segfaults 
Change-Id: Iadb55ba45d6c8ade0757fd970ac4c6cde1805de3
 2020-08-09 11:28:09 -04:00
Jason Tang 7bb671fa55 Fix HSAIL build 
Change-Id: I34209b3ae0ce0eefc30e464fd7f081a0b62449b0
 2020-08-07 17:18:38 -04:00
German Andryeyev 0dc47d55d2 Sync the current queue for P2P staging 
P2P staging uses device queues for transfer, hence the current
queue must be in sync

Change-Id: I8372a60590eed9dde62cb4c67ef4df5df82a8e8d
 2020-08-07 14:36:50 -04:00
Jason Tang 6f8eaff4df Use ARCTURUS 
Change-Id: Ib25d150c9314180178d5cf00835a06e47c02c2a9
 2020-08-07 11:14:24 -04:00
Jason Tang f8f6bc16a1 SWDEV-246565 - Remove passing -msram-ecc to Comgr 
Change-Id: I1604a0014186a5779561da3ec3eefec65aff5c37
 2020-08-06 12:48:53 -04:00
Jatin Chaudhary 2f3df8e691 Adding device memory channel information 
Change-Id: I47dfa3daff97b1e3f42484dde5a4aa64244ac544
 2020-08-06 06:54:35 -04:00
Saleel Kudchadker ec73340348 Add Queue profling param and toggle for HIP 
Use signal timestamps if NDRange command takes forceProfile flag.

Change-Id: Ib7f187d781fd78a7346818afb3344a9378f4c104
 2020-08-06 03:09:53 -04:00
Anusha Godavarthy Surya 093f7fa3ca SWDEV-244600 - HIP BLIT code object needs to have reserved symbol name 
Change-Id: I8401fea5eab71c0f7414eec0666066d9553a6622
 2020-08-06 01:14:06 -04:00
Jason Tang 8ef5da00c7 SWDEV-246687 - Do not use std::vector reference as class member cuMask_ 
The current implementation creates default reference in the stack and assigns it to class member cuMasks_, so whenever the content of the stack changes, cuMask_ would change.

Change-Id: Iefab63c335d504b83c4ae90bd34ae76c6afb8f3c
 2020-08-05 16:57:36 -04:00
German Andryeyev 91a25df04f Process cache coherency before mem dependency tracker 
Optimizaiton to remove extra syncs uncovered a bug with the cache
coherency layer, there runtime could lose the track of mem address
if coherency layer performed a sync.

Change-Id: I25647cfa4a4be9cdbd8577ff076a740bbdac79c8
 2020-08-04 16:33:18 -04:00
Tao Sang fdef6f722f Apply constexpr on global constant varaibles 
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef
 2020-07-22 22:14:13 -04:00
Jason Tang 65f4230494 SWDEV-232197 - Use TargetID for action_info_set_isa_name() 
Change-Id: I6661a2bbc2e55586c1b5029694d67cb54a4f23a6
 2020-07-22 13:47:17 -04:00
Freddy Paul 6b8ae3dd77 Align to new hsa cmake target usage. 
HIP or any ROCm component above HIP may not be calling
hsa-runtime directly. OpenCl and HIP are the two components
calling ROCclr and to bring in the transitive dependency of
thunk,ROCR,amd_comgr it is better to have the dependency
chain set correctly in the ROCclr cmake target. With this
change OpenCl or HIP should not be setting ROCR dependency
directly.

This helps to link OpenCl(libamdocl.so) link statically with
comgr,hsa,thunk.

Change-Id: I0d538b7abc6a0ce700ec3332b97fc144db5fc5ff
 2020-07-22 11:21:09 -04:00
Jatin Chaudhary 48690f29e9 Adding AnyOrder Flag 
Change-Id: I6baaef42b98adfbc8cf2605e175ec007e008045f
 2020-07-22 00:25:04 -04:00
Tao Sang 214827defa Add numa lib detection in cmake 
If numa lib is in building system, define ROCCLR_NUMA_SUPPORT to
support numa; otherwise, don't support numa.

Change-Id: I3848d7fdec5a3813ff1edad9b71ff04372dc0b9a
 2020-07-21 14:58:56 -04:00
Rahul Garg 60473ae542 Handle size 0 symbols 
Change-Id: I1629c5027ec5f9af48c8e9e0696829b844423096
 2020-07-21 10:10:36 -04:00
Jason Tang 8b7e0f3cfe SWDEV-232197 - Use HSA_ISA_INFO_NAME as the TargetID 
TargetID will be passed to LC compiler.

Change-Id: I0385634922c11d53b57ebd596047698c47bda72b
 2020-07-21 09:24:03 -04:00
Matt Arsenault 5577eabcea Fix -Wmissing-braces 
Change-Id: I2394b6923c789f36e72242f4b196844cc0ee90ba
 2020-07-15 16:51:03 -04:00
Jason Tang 5e0bb5bd39 SWDEV-244000 - Print freeMem_ for memory accounting 
Change-Id: I5bbce213236a109e9aa69766d2d4d370b58d0d08
 2020-07-15 13:44:05 -04:00
agodavar de31b341d2 SWDEV-242592:Remove define of UndefinedVars in setKernels 
Change-Id: I51b0c5ac6c4cb2564a53f7c45fdf8a893a5edbd3
 2020-07-09 23:15:31 -04:00
kjayapra-amd 16e6b65b5c SWDEV-240165 - Move all amd::MemObjMap_ reference to ROCclr and only allow base ptr to get ipc handle. 
Change-Id: I9de10a0c4ba4dee3b3c8b972966840ab807001d8
 2020-07-09 21:19:45 -04:00
Jatin Chaudhary cd1e364911 Replacing deprecated HSA API calls with newer ones 
Change-Id: Iebe2c00e717ab0e47c61611752b717966c719994
 2020-07-08 00:32:24 -04:00
Aryan Salmanpour 4a901f3dd3 Always print error message with the returned error code before abort 
Change-Id: I8479abc586937a50c90b2785c4ce7364e6e9732b
 2020-07-07 16:28:30 -04:00
Matt Arsenault c56a82fd05 Fix unused function warnings for conditionally used functions 
Change-Id: Ied23c571b949abef1816914986f19b14aca3d2f3
 2020-07-06 10:28:43 -04:00
Matt Arsenault 9e3e41ca2e Remove unused functions 
Change-Id: I55db791019c511de83d8b895e3a48b3d7475aeac
 2020-07-06 10:27:29 -04:00
German Andryeyev 059832b526 Return always true for P2P validation under ROCr 
Change-Id: Id32a5a94a642e708d1d042c5247af38501bec153
 2020-07-04 11:38:04 -04:00
Aryan Salmanpour 34b82eb998 remove unused argument from enableHostcalls/disableHostcalls functions 
Change-Id: I351a6b4e23cd9f118310c5c79b1afcb4758fde1b
 2020-06-26 16:33:30 -04:00
Tao Sang da94cd0de1 Support numa policy set by user 
Add hostNumaAlloc() to support numa policy set by user

Change-Id: Ib6c3e838aa53e3d9b3db9735c585df46a1c98944
 2020-06-23 18:57:03 -04:00
Dittakavi Satyanvesh 7a3b8c6dd2 SWDEV-240566 adds error message before abort 
Change-Id: I4dbd089daa5e6fde5e8722dc2395225dd822561c
 2020-06-22 10:12:49 -04:00
Aryan Salmanpour 1bd265f8d6 move hostcall-based implementation of messages/printf from rocm backend to the common device layer 
SWDEV-232428

Change-Id: I14b774e66a1783569c6d34d8759c1faa5f340e27
 2020-06-18 13:49:28 -04:00
Vlad Sytchenko 5b9af8f28d Fix some -Wunused-but-set-variable warnings 
Change-Id: I281583b5abdfc09d5dd8b7dfb20b8821581db193
 2020-06-15 17:51:01 -04:00
German Andryeyev afe825c506 Fix compile error in ATI make build 
Change-Id: Id9d23b8f46bf1b97c0f02c8ae0edd94e6963b1b5
 2020-06-15 10:31:57 -04:00
Tao Sang b14d9e0a36 Deduce hops from numa distance 
Rocr won't return real hops so that we have to deduce hops from
numa distance as a workaround. This will be subject to change
as driver team will provide a long term solution in rocm3.7

Change-Id: Ifb939ed848db190c3d544bb7f30a5821161921e6
 2020-06-13 17:04:17 -04:00
Jason Tang 30e36a4925 Get gpu asicRevision_ 
Change-Id: I8afb53e027d912843655823eebaec29901c33d28
 2020-06-12 14:51:52 -04:00
German Andryeyev c5afd5d412 Initial HMM support 
- Expose ROCclr interfaces for HIP usage
- ROCr interfaces aren't available in staging, thus control the
build with AMD_HMM_SUPPORT define

Change-Id: Iadc2bcc230e78d3b0dc22b235189c8cc80843446
 2020-06-12 09:06:07 -04:00
Rahul Garg 617538074c Fix IPC create memory failure 
ROCr expects granular size in hsa_amd_ipc_memory_create

Change-Id: I7c266aa2eef8304f105298a7a668f4c4b3fb5f5a
 2020-06-11 13:02:54 -04:00
Saleel Kudchadker 2b771d2f5f Add logging support for AQL packet 
Use AMD_LOG_LEVEL=4 and AMD_LOG_MASK=8 to print AQL log
explicitly
Change-Id: I4209d91b460e64be44261d3ab773580067e47c29
 2020-06-10 14:04:47 -07:00
Aryan Salmanpour 5203c5271b reuse available queue with the same priority if queue creation fails 
Change-Id: I1522935ce1a73c4724135668d039e88a9097710b
 2020-06-09 17:56:18 -04:00
Aryan Salmanpour 1d938697a1 fix a build error on TeamCity due to order of initialization in rocm Device class 
Change-Id: I2e45e71e53272b7a7813422d3b949e3835077ab0
 2020-06-08 13:56:39 -04:00
kjayapra-amd 1b0882e061 SWDEV-239327 - Dont call hsa_amd_memory_pool_free from ~amd::Memory() for obj created by passing devptr. 
Change-Id: I315fd502df6bb1bf66dd24eac9325f1439e432ad
 2020-06-05 18:42:03 -04:00
German Andryeyev 3828a61413 Make sure runtime sync before CPU access 
Change-Id: I52882788ded187b3f735257a188b1b08d8502147
 2020-06-05 12:00:08 -04:00
German Andryeyev 86e0f337fc Add the sync of the current queue 
Make sure runtime waits for the current queue before
synching with device queue

Change-Id: I753b6fc0bb15a3a3d4bf03fef1152842550850c0
 2020-06-05 11:57:59 -04:00