Commit Graph

760 Commits

Author SHA1 Message Date
Alex Voicu 193e41fdde Remove vestigial implementations.
[ROCm/clr commit: 68a0dd826d]
2018-06-02 11:37:08 +01:00
Alex Voicu 130e9d409e Re-sync with upstream.
[ROCm/clr commit: f2d7f112ab]
2018-06-01 15:49:05 +01:00
Maneesh Gupta 73cbb7bb7b Merge pull request #484 from gargrahul/fix_malloc_hiphostreg
Fix memcpy2D for malloc+ hostRegister

[ROCm/clr commit: 095d4dd91e]
2018-06-01 16:53:25 +05:30
Maneesh Gupta 125f6201c8 Merge pull request #466 from ROCm-Developer-Tools/feature_use_Float16
Feature use _Float16 and match CUDA __half behaviour.

[ROCm/clr commit: 8ecb3eeb55]
2018-06-01 13:50:12 +05:30
Alex Voicu a9cabfc8df Re-sync with upstream. Add integer abs.
[ROCm/clr commit: e03ca1a72e]
2018-05-31 16:38:00 +01:00
Rahul Garg 84cb355df6 Fix memcpy2D for malloc+ hostRegister
[ROCm/clr commit: a3609eaf61]
2018-05-31 13:14:27 +05:30
Alex Voicu 2924783ee4 Switch to using ROCDL directly, as opposed to via HC. Add missing bits.
[ROCm/clr commit: 14e6a04387]
2018-05-31 03:17:26 +01:00
Maneesh Gupta b074d762fa Merge pull request #472 from Jorghi12/patch-3
Adding double/long int signatures for abs

[ROCm/clr commit: 3327a9a2de]
2018-05-30 08:32:14 +05:30
Jorghi12 9b43fd84d0 Update math_functions.cpp
CUDA also has a function named labs.

[ROCm/clr commit: 61ff40a1cf]
2018-05-26 16:21:14 -04:00
Jorghi12 fbbaedfdea Adding double/long int signatures for abs
Adding overloads for abs that are found in cuda's math_functions.

[ROCm/clr commit: 13f37d550f]
2018-05-26 00:40:14 -04:00
Rahul Garg 0ab5c9d6f1 Use 64x4 grid dims
[ROCm/clr commit: 27e0566c3a]
2018-05-24 23:51:52 +05:30
Rahul Garg 439655d213 Clean up and fix remaining bytes copy
[ROCm/clr commit: aed2653857]
2018-05-24 23:30:27 +05:30
Alex Voicu a231cd5604 Remove vestigial inline LLVMIR.
[ROCm/clr commit: f2a86f3e1c]
2018-05-24 12:46:14 +01:00
Rahul Garg 4fc64ff4c5 Fix memcpy2d kernel dims
[ROCm/clr commit: 53a7c61e9b]
2018-05-24 17:00:12 +05:30
Rahul Garg 4e52a634a1 Correct remaining bytes in copy 2d kernel
[ROCm/clr commit: 96b4618d26]
2018-05-24 08:27:24 +05:30
Alex Voicu 2b16b4e31b Missing commit.
[ROCm/clr commit: ecefdd6541]
2018-05-23 17:57:47 +01:00
Rahul Garg 432467d88b Optimize memcpy2D kernel use
[ROCm/clr commit: 2c3d1498d4]
2018-05-23 14:43:47 +05:30
Maneesh Gupta 335dad2feb Merge pull request #464 from gargrahul/fix_memcpy2d_pinned_mem_case
Fixed memcpy2D for pinned memory case using 2D kernel

[ROCm/clr commit: 7042fe6067]
2018-05-22 10:42:28 +05:30
Maneesh Gupta e72516bd2f Merge pull request #445 from ROCm-Developer-Tools/feature_func_attributes
Add support for the hipFuncGetAttributes interface.

[ROCm/clr commit: 85342d73b5]
2018-05-22 09:37:41 +05:30
Rahul Garg 54497d1e2b Fixed memcpy2D for pinned memory case using 2D kernel
[ROCm/clr commit: 40fb44dbe6]
2018-05-21 22:14:45 +05:30
Maneesh Gupta efe6b5e4a0 hipMemcpy returns success if sizeBytes is 0.
Fixes SWDEV-153754 & SWDEV-154178.

[ROCm/clr commit: 66d05e6fc3]
2018-05-21 15:38:44 +05:30
Maneesh Gupta 32911a3b9c Merge pull request #455 from ROCm-Developer-Tools/magic
Change HIP fat binary magic number

[ROCm/clr commit: cfb7be414b]
2018-05-21 09:52:03 +05:30
Alex Voicu 677e945726 Update hip_module.cpp
Typo.

[ROCm/clr commit: 43fca684c8]
2018-05-18 17:50:45 +01:00
Rahul Garg 8575112052 Fix for memcpy2DAsync for pinned host memory case
[ROCm/clr commit: 4f5bdb071c]
2018-05-18 21:09:50 +05:30
Maneesh Gupta 106f3f591e Merge pull request #433 from gargrahul/add_hipmemset3d
Added hipMemset3D

[ROCm/clr commit: 1c93e11cdf]
2018-05-18 14:54:15 +05:30
Maneesh Gupta 4eb7565f85 Merge pull request #448 from 949f45ac/master
Provide correct __mul64hi and __umul64hi builtins, using code from ROCm-Device-Libs

[ROCm/clr commit: bb1f53ac44]
2018-05-18 13:18:16 +05:30
Yaxun (Sam) Liu 3d75c87c26 Change HIP fat binary magic number
[ROCm/clr commit: 2f9bce3652]
2018-05-17 17:04:51 -04:00
949f45ac 901ab53c37 Reinstate accidentally deleted uchar2Holder
[ROCm/clr commit: 7bf8402d1d]
2018-05-17 10:55:45 +02:00
Rahul Garg 84089036b0 Fixed hipMemcpy2D to handle 1D memcpy case
[ROCm/clr commit: 8413fb51e1]
2018-05-16 11:07:10 +05:30
Alex Voicu 5a9d5a931b Update hip_module.cpp
[ROCm/clr commit: 40a22d235e]
2018-05-14 17:15:36 +01:00
949f45ac c819e2ee01 Provide correct __mul64hi and __umul64hi builtins, using code from ROCm-Device-Libs
[ROCm/clr commit: 9210263727]
2018-05-14 08:34:56 +02:00
Alex Voicu 2973f68465 Don't use magic constants, they're evil.
Also clarify that the register count cannot be queried at the moment.

[ROCm/clr commit: eded014abc]
2018-05-11 11:31:46 +01:00
Alex Voicu 4e6996282d Add support for the hipFuncGetAttributes interface.
[ROCm/clr commit: bf9529aaa8]
2018-05-11 03:35:10 +01:00
Rahul Garg a7be5be448 Added hipMemset3D
[ROCm/clr commit: 78568435da]
2018-05-07 10:24:30 +05:30
Lakhan Singh 6278830c1a Null checks added for hipmallocpitch and hipmemcpy apis
[ROCm/clr commit: 12d8a47c0c]
2018-05-03 09:27:50 +05:30
Rahul Garg 6f05c37cde Fix texture 3D for HIP/NVCC
[ROCm/clr commit: 1d76c48e3d]
2018-05-02 11:56:37 +05:30
Maneesh Gupta 9ac65ca55c Merge pull request #415 from deven-amd/master
Checkin to fix bugs in math functions.

[ROCm/clr commit: af0c227df4]
2018-05-01 12:29:03 +05:30
Deven Desai 13ab5368d0 Checkin to fix bugs in math functions.
This change fixes the following bugs that were discovered while debuggnig TF unit test failures (cwise_ops_test)

1. __hisinf and __hisnan routines
   Both had incorrect implementations.

2. abs
   A "long long" (64bit int) version was missing, resulting in the 32bit version being used for 64bit ints (which resulted in incorrect results, when the value passed in was outside the 32bit int range)

3. lgamma
  We seemed to have a custom version for the 'double' datatype (which was giving incorrect results). Replaced it with a call to the 'double' version of the underlying 'hc::precision_math::lgamma'


[ROCm/clr commit: 65a90c55e7]
2018-04-24 18:10:07 +00:00
Lakhan Singh 06dd83f7f1 SWDEV-141024
[ROCm/clr commit: 74faa61d52]
2018-04-20 17:40:00 +05:30
Rahul Garg 39a19cc9e8 Added hipMemset2DAsync support
[ROCm/clr commit: fcc0866681]
2018-04-17 18:27:27 +05:30
Maneesh Gupta 295cd826d9 Merge pull request #400 from gargrahul/hipModule_cleanup
hip_module code cleanup

[ROCm/clr commit: 72ff4c5cc4]
2018-04-17 09:00:15 +05:30
Aaron Enye Shi 2071f27bb0 Clean up triple_to_hsa_isa naming (#403)
[ROCm/clr commit: a004c8dfa2]
2018-04-17 06:47:55 +05:30
Rahul Garg 181e0ee8ee hip_module code cleanup
-Fixed missing ihipLogStatus in hipModuleLoad()
-Fixed some ihipXXX functions


[ROCm/clr commit: c23898f49b]
2018-04-16 15:35:04 +05:30
Aaron Enye Shi 5d295abb55 Fix bug when using older rocr naming (#399)
[ROCm/clr commit: 21382e361c]
2018-04-14 15:47:46 +05:30
Aaron Enye Shi 03877a5ed2 Fix new gfx target naming convention (#397)
This was introduced in recent xnack changes naming changes which affected our offload bundler. This patch will fix issues in HIP samples, ROCR tests, and others.

[ROCm/clr commit: 199cff2365]
2018-04-13 16:24:39 +05:30
Rahul Garg cf6322da63 Correct missed ihipMemsetCopyDataType change
[ROCm/clr commit: 2ee80397f2]
2018-04-12 10:27:19 +05:30
Rahul Garg 312b764721 Changed ihipMemsetCopyDataType to ihipMemsetDataType
[ROCm/clr commit: 2658963f5b]
2018-04-12 09:29:22 +05:30
Rahul Garg aff8d83cdf Fix hipMemset stream resolution
[ROCm/clr commit: 88073a17c1]
2018-04-11 19:01:53 +05:30
Rahul Garg a3bc29976b hipMemset refactoring
[ROCm/clr commit: 40846f6f8e]
2018-04-11 15:58:48 +05:30
Maneesh Gupta d087d3adc3 Merge pull request #391 from lmoriche/master
Create one hipModule_t per device

[ROCm/clr commit: a39a96dcc9]
2018-04-11 13:06:58 +05:30