Commit Graph

154 Commits

Author SHA1 Message Date
Dimple Prajapati 1aa9679fa7 Device bitcode support for IPC - Use IPCContext explicitly to link correct device API implementation (#217)
* Device bitcode support for IPC - Use IPCContext explicitly

* use base Context class for non-derived functions

[ROCm/rocshmem commit: 2de8f4579f]
2025-08-25 14:11:38 -04:00
Dimple Prajapati 7436abeaa9 rocSHMEM device API changes for bitcode support (#211)
ROCSHMEM_CTX_DEFAULT's visibility needs to be explicitly set to expose that as external device global variable in device bitcode.

[ROCm/rocshmem commit: c952ffb40e]
2025-08-11 12:23:41 -07:00
Yiltan 3986f2563f [RO] Fix MPI Communicator Check (#203)
* Fix MPI Communicator casting

[ROCm/rocshmem commit: b341285881]
2025-08-01 09:23:17 -04:00
Avinash Kethineedi 2a7416d016 Implement rocshmem_ptr in IPC conduit (#197)
* Implement `rocshmem_ptr` in IPC conduit

* tests: add functional test for `rocshmem_ptr`
  - Add safety check for pointer access and condition check before printing results for `rocshmem_ptr` test
  - Use `rocshmem_put` to store `rocshmem_ptr` availability for data validation

[ROCm/rocshmem commit: 526105d315]
2025-07-28 12:01:02 -05:00
Dimple Prajapati 72ed270a5c Add host APIs for querying device ctx and remote heap pointer (#200)
* Add host APIs for querying device ctx and remote heap pointer

* Host API to query device pointer for ROCSHMEM_DEFAULT_CONTEXT,
  this is needed to support dynamic module initialization via device kernel
  library bitcode.
* Host API to query remote symmetric heap pointer that can be used in
  custom device kernel for RMA operations.

* Added rocshmem_ptr implementation within the Host Context class
* Enables pointer retrieval functionality for symmetric data objects
* Copy IPC pointers to host memory in RO host context

---------

Co-authored-by: avinashkethineedi <avinash.kethineedi@amd.com>

[ROCm/rocshmem commit: 87f99e7ec6]
2025-07-24 11:03:03 -07:00
Edgar Gabriel f38ffbf84d Revert "Add host API to query Device side context detail (#183)" (#196)
This reverts commit 31804fcad3.

[ROCm/rocshmem commit: a66f782540]
2025-07-07 16:51:44 -05:00
Dimple Prajapati 31804fcad3 Add host API to query Device side context detail (#183)
* API support for enabling rocshmem bitcode integration

* move implementation to along with host side APIs

[ROCm/rocshmem commit: 105382710a]
2025-07-07 16:04:16 -05:00
Aurelien Bouteiller c4d3488f62 rocshmem_config.h has a different include path when installed and built-dir (#186)
* rocshmem_config.h needs to be in a similar directory structure for
includes to work when building testers in build, and from an installed
library

* Do not change installed rocshmem.hpp

[ROCm/rocshmem commit: 63a79892b2]
2025-07-02 16:51:38 -04:00
Avinash Kethineedi 63d52b73c8 Fix pSync buffer initialization in IPC(#180)
- Initialize the entire pSync buffer with the default synchronization value

[ROCm/rocshmem commit: 6dba253890]
2025-06-30 13:38:24 -05:00
akolliasAMD 9cb96eafdb added new gfx target (#171)
[ROCm/rocshmem commit: e2bae5131a]
2025-06-25 17:35:54 -06:00
Edgar Gabriel e167f50803 Introduce support for executing the IPC conduit without MPI (#153)
* relax MPI dependency from code

This commit (series) removes the strict dependency on MPI in code base.
rocSHMEM will still be compiled with MPI, but the goal is to make the
code work even if MPI_Init_thread has not been invoked, at least for
certain, well-defined scenarios. Hence, the goal is not remove any
mentioning of MPI from rocSHMEM, but to ensure correct execution of the
ipc conduit even if the library has been initialized using other means.

Details:
 - add non-MPI version of remote_heap and WindowInfo classes
 - host interfaces work on WindowInfoMPI, they will not work with the
   non-MPI code path. Since it is unclear whether we plan to support the
   host interfaces at all, this is probably not a major limitation.

* update symmetric_heap structures and backend

* first cut on initialization

and enabling non-MPI initialization of the IPCBackend

* add non-MPI hostInterface methods

at the moment, only barrier_all and sync_all are explicitely supported.

* add non-mpi version of ipc_policy

and a number of smaller fixes required in other files.
A small init/finalize test already passes now with the branch.

* add non-mpi team_split_strided code

* minor fixes for non-MPI use-case

* disable symmetric-heap-window-ionfo test

disable this test for now just to make the compilation pass. Will have
to rework it.

* make no-mpi great again

after rebasing on top of the MPI singleton changes.

* enable running functional tests with uuid init

to run the functional tests using rocshmem_init_attr and the uuid
mechanism requires
a) a PMIx installation on the system
b) setting the environment variable ROCSHMEM_TEST_UUID=1

* fix multi-team creation bug

fix a bug occuring when creating many teams, which was the result of
incorrectly applying two indices in our own implementation of Allreduce.

* make unit tests pass again

* reverse offload was impacted by code change

fix the RO conduit to cope wioth the non-MPI path introduced for the IPC
conduit.

* update to cmake logic to find pmix

* Update src/memory/window_info.hpp

Co-authored-by: Yiltan <ytemucin@amd.com>

* Update CMakeLists.txt

Co-authored-by: Yiltan <ytemucin@amd.com>

* document ROCSHMEM_UNIQUEID_NO_MPI

* rename env. variable to UNIQUEID_WITH_MPI

* update host.cpp to use USE_HDP_FLUSH macro

instead of the deprecated USE_COHERENT_HEAP.

* add note for running example with RO conduit

add a note clarifying that running init_attr_test from the example
directory requires setting an additional environment variable with the
RO conduit.

* Find PMIx in more cases, only apply pmix build options to the test that
needs it, if OMPI_COMM_WORLD_LOCA_RANK is not setenv, abort

---------

Co-authored-by: Yiltan <ytemucin@amd.com>
Co-authored-by: Aurelien Bouteiller <abouteil@amd.com>

[ROCm/rocshmem commit: 6ea5edc951]
2025-06-21 13:23:11 -05:00
Avinash Kethineedi 14756a73b1 Refactor Barrier_all and Sync_all APIs to use default context (#159)
* Refactor `Barrier_all` and `Sync_all` to use default context

- Removed context-specific implementations of barrier_all and sync_all
- Added barrier_all and sync_all to the default context implementation
- Updated functional tests to use the default context for barrier_all and sync_all

* Update `Barrier_all` and `Sync_all` API usage in documentation

* Update `CHANGELOG`

---------

Co-authored-by: Yiltan <ytemucin@amd.com>

[ROCm/rocshmem commit: bf48bcabf2]
2025-06-17 11:16:18 -05:00
Aurelien Bouteiller 56a3181a6f Swdev/536571 with additional issues found for other various missing includes (#158)
* Revert "SWDEV-536571 - Include assert header. (#157)"

This reverts commit 87d2efa430.

* Fix use of assert/abort and required includes

* Disable IPC AMO testers for non-implemented functions

[ROCm/rocshmem commit: 551603829c]
2025-06-16 20:21:06 -04:00
Aurelien Bouteiller b5c685ef9d Fix rocshmem_info not compiling in out of source builds (#160)
[ROCm/rocshmem commit: 8138d130b9]
2025-06-16 11:49:30 -04:00
Yiltan 66e267235f Added simple rocshmem_info command (#156)
* Added simple rocshmem_info
* Add GPU Arch info

[ROCm/rocshmem commit: 72639277a3]
2025-06-13 15:40:32 -04:00
Aurelien Bouteiller f3345dbf05 Use finegrain allocator by default (#140)
* Use FineGrained allocator for heap by default, consolidate all types of
allocators under saner cmake controls

Co-authored-by: Yiltan <ytemucin@amd.com>

* Uncached may not be only for debug

Need to include the rocshmem config otherwise produce an inconsistent
build with different allocators used in different files

* Undo this pr adding presumably useless hip_host_allocator_noncoherent

* Rename HEAP_IS_COHERENT/USE_COHERENT_HEAP to USE_HDP_FLUSH as the former
was misleading

* Remove unused __roc_inv()

---------

Co-authored-by: Yiltan <ytemucin@amd.com>

[ROCm/rocshmem commit: 41fd9e2d57]
2025-06-13 15:26:26 -04:00
Aurelien Bouteiller 87d2efa430 SWDEV-536571 - Include assert header. (#157)
(cherry picked from commit 96cd36e47e4759b7515373e8fa455385f3d985aa)

Co-authored-by: Patel <jaypatel@amd.com>

[ROCm/rocshmem commit: bcc14b1a34]
2025-06-12 13:16:30 -04:00
Yiltan bceeadeb63 Multi-Node rocshmem_finalize() bug (#138)
[ROCm/rocshmem commit: 3f01d89207]
2025-06-04 10:02:03 -04:00
Edgar Gabriel 35e3a27890 free MPI Communicators on destruction (#134)
make sure that all communicators that have been created during the
runtime of the application are correctly freed again, to avoid memory
leaks.

[ROCm/rocshmem commit: bce329abd6]
2025-05-20 09:59:00 -05:00
Jobbins 22ea3f0c8b Code Coverage (#82)
code coverage:  generate code coverage reports

* Add instrumentation flags to rocshmem target when adding -DBUILD_CODE_COVERAGE cmake flag
* Add helper script to build all subprojects and generate code coverage reports
* Update README with code coverage instructions

[ROCm/rocshmem commit: 474112d03c]
2025-05-16 09:09:17 -06:00
Aurelien Bouteiller 03a9fac960 Detailed logs (#124)
* Use a single printf per line (reduce chances of lines being cut in logs)

* team_comm can be an int or a pointer depending on MPI impl.
Received is confusing (since we are on the origin), use submitted
instead

* Print arguments to calls when using DEBUG

---------

Signed-off-by: Aurelien Bouteiller <abouteil@amd.com>

[ROCm/rocshmem commit: 3600291558]
2025-05-15 10:37:12 -04:00
Aurelien Bouteiller 44d43901b1 Remove unused parts of dlmalloc to improve coverity score (#106)
[ROCm/rocshmem commit: 87179b1ffd]
2025-05-07 13:05:04 -04:00
Aurelien Bouteiller 27d1189ff3 Substitute pow2bin allocator with a dlmalloc based allocator (#71)
* Add dlmalloc_strat allocator strategy
 - Use mspace variant to ease encapsulation
 - Make pow2bins and dlmalloc cmake selectable
* Add unit tester for dlmalloc, rework single_heap, pow2bins unit testers
accordingly
 - add dlmalloc get_used/get_avail, and have all strats allocators also have a get_used
 - Rework memallocator unit tests: bin size is per strat, alignment is verified in singleheap
* bugfix: dlmalloc exposed that the pingpong test would write past end of
allocation with -w 32
* iostream leakage/mixed usage of cerr and fprintf(stderr

---------

Signed-off-by: Aurelien Bouteiller <aurelien.bouteiller@amd.com>

[ROCm/rocshmem commit: b835de6cd5]
2025-05-01 11:55:23 -04:00
Edgar Gabriel 2e6fed8e79 unify env variables and use DPRINTF (#89)
* unify handling of env variables

create a class containing all (most?) environment variables used by rocshmem and an object that is instatiated
before library_init, since some of the environment variables need to be
set before we start the bootstraping process.

This allows us to remove two files from the bootstrap directory.

* replace INFO and TRACE macros with DPRINTF

to be more consistent with the rest of the rocSHMEM code

[ROCm/rocshmem commit: db74307195]
2025-04-29 06:05:25 -05:00
Edgar Gabriel 32f11bd5e5 use correct id when accessing ipc-bases (#88)
we need to use the position of that processes in the local ipc-bases
array, not the global rank.

[ROCm/rocshmem commit: e3b0353fa9]
2025-04-17 10:11:32 -05:00
Aurelien Bouteiller ccf6833c6f bugfix: do not dereference ctx during create_ctx if we did run out (#83)
[ROCm/rocshmem commit: 9befbe8293]
2025-04-16 10:37:44 -04:00
Avinash Kethineedi c4de6833f6 Add SPDX license identifiers and update copyright headers (#85)
* Update copyright information and add SPDX license identifier

* Update AUTHORS

* Remove `sos_tests`

[ROCm/rocshmem commit: f6ef19f5a9]
2025-04-15 15:37:53 -05:00
Aurelien Bouteiller b7613a38c1 Remove dev-mono-linear (#81)
* Remove dev_mono_linear (followup to removal of slab_heap)

* cleanup: use CHECK_HIP rather than ad-hoc error checking

---------

Signed-off-by: Aurelien Bouteiller <aurelien.bouteiller@amd.com>

[ROCm/rocshmem commit: a1a0560ca3]
2025-04-15 09:57:59 -04:00
Edgar Gabriel bac7769483 Revamp the uniqueId code to support subgroups of processes (#80)
* add code for bootstrapping

the bootstrapping code has been extracted from the MSCCLPP library,
which in parts is based on the code from NVIDIA. The code has been
modified to match the specific requirements of the rocSHMEM library.

* add code to use the new uniqueId bootstrapping

* adjust init_attr example

extend the rocshmem_init_attr example to use two disjoint groups
of processe, in order to trigger the new code path.

* add env variable for bootstrap timeout

* Update examples/rocshmem_init_attr_test.cc

Co-authored-by: Aurelien Bouteiller <Aurelien.bouteiller@gmail.com>

* Update src/rocshmem.cpp

Co-authored-by: Aurelien Bouteiller <Aurelien.bouteiller@gmail.com>

---------

Co-authored-by: Aurelien Bouteiller <Aurelien.bouteiller@gmail.com>

[ROCm/rocshmem commit: b5830a623b]
2025-04-14 12:02:09 -05:00
Avinash Kethineedi be35f3ef93 Update backend to use provided MPI communicator during library initialization (#79)
* Update backend to use provided MPI communicator during library initialization, default to `MPI_COMM_WORLD`

* Update `rocshmem_my_pe` and `rocshmem_n_pes` host APIs
   - Return values from backend if initialized; otherwise, fallback to MPI_Singleton.

[ROCm/rocshmem commit: 05755847f5]
2025-04-14 09:18:57 -05:00
Brandon Potter a3a211a677 Cleanup unused code in repository (#75)
* Remove unused forward_list

* Remove unused __read_clock function

* Replace wallClk code with hip function

* Remove unused unit test for ipc

* Remove slab heap

* Remove unused EBO spinlock

[ROCm/rocshmem commit: 0fd628458c]
2025-04-10 14:47:24 -05:00
Avinash Kethineedi 41d5d739e2 Update collective APIs naming (#77)
* Update the naming convention for collective APIs to ensure consistency across the interface.

* Move all collective API declarations to rocshmem_COLL.hpp

* The following APIs were updated as part of this change:
  - `barrier`
  - `barrier_all`
  - `sync`
  - `sync_all`
  - `all_to_all`
  - `broadcast`
  - `fcollect`
  - `all_reduce`

* Update header file generation code for collective APIs

[ROCm/rocshmem commit: 68421895d6]
2025-04-10 12:14:47 -05:00
Avinash Kethineedi 9bd2b04899 Update Barrier and Sync APIs (#73)
* Add thread, wavefront, and workgroup-level `barrier` APIs in IPC and RO conduits; remove collectives on default context
 - Implemented `barrier` APIs for thread, wavefront, and workgroup scopes
 - Added support into both IPC and RO conduits
 - Added functional tests to cover all `barrier` APIs
 - Removed collective operations on default context

* Add thread, wavefront, and workgroup-level `sync` APIs in IPC and RO conduits.
  - Implemented `sync` APIs for thread, wavefront, and workgroup scopes
  - Added support into both IPC and RO conduits
  - Added functional tests to cover all `sync` APIs

* update naming convention for context-based `barrier` APIs

[ROCm/rocshmem commit: dc61bca066]
2025-04-08 11:25:31 -05:00
Avinash Kethineedi 426bbf525b Update Barrier_All and Sync_All APIs (#72)
* Fix deadlock in `rocshmem_ctx_wg_barrier_all` API in IPC conduit by adding per-context pSync buffers and context IDs
  - Added separate pSync buffers for each device context
  - Resolved deadlock when invoking barrier API (`rocshmem_ctx_wg_barrier_all`) concurrently from multiple contexts

* Update barrier_all functional tests for multi-context support

* Add thread, wavefront, and workgroup-level barrier_all APIs in IPC and RO conduits
  - Implemented barrier_all APIs at thread, wavefront, and workgroup granularity
  - Added support in both IPC and RO conduits
  - Updated functional tests to cover all `barrier_all` APIs

* Add thread, wavefront, and workgroup-level sync_all APIs in IPC and RO conduits
  - Implemented sync_all APIs for thread, wavefront, and workgroup scopes
  - Added support into both IPC and RO conduits
  - Added functional tests to cover all `sync_all` APIs

[ROCm/rocshmem commit: c652f58cef]
2025-04-02 11:58:55 -05:00
Edgar Gabriel 2ab585ce8d add uniqueID initialization (#69)
add the interfaces required to support rocshmem initialization
through the uniqueID mechanism. At the moment this still maps to
MPI initialization underneath the hood, but adding the functions might
simplify the porting of some applications to rocshmem. In addition, if
we need to transition away from MPI one day, this is also one step into
this direction.

[ROCm/rocshmem commit: e9f6227d75]
2025-03-28 16:34:00 -05:00
Edgar Gabriel c7297b1d6b Performance tuning for inter-node communication (#66)
This PR addresses two issues:
 - reduce the number of contexts supported by the host-interface by
   default to 1, we are not using those at the moment, and hence
   we now create fewer MPI_Win at the startup
 - introduces a micro-sleep in RO progress engine in case there are no
   pending requests. This leads significant performance improvements
   observed for inter-node communication with THor2 NICs.

[ROCm/rocshmem commit: 12561783de]
2025-03-26 21:09:26 -05:00
Avinash Kethineedi 7a4d1ac064 Implement default RO context (#64)
* Allocate default context buffers and initialize queue for management

- Allocated the status flag, g return, and atomic return buffers for
  the default context.
- Initialized `AtomicWFQueueProxy` instances to manage these buffers
  efficiently for concurrent access.

* Update `BlockHandle` with default context buffers

* Add default context flag and update buffer retrieval functions

- Added a flag to distinguish the default context from other contexts.
- Modified return buffer functionns and `get_status_flag` function to accommodate
  the default context

* Add default context primitive tests

-  get, put, get_nbi, put_nbi, g, and p APIs.

[ROCm/rocshmem commit: 867519e1d0]
2025-03-25 18:51:54 -05:00
Avinash Kethineedi 370e2dda09 Add AtomicWFQueue implementation and tests (#62)
* feat: Add AtomicWFQueue implementation
  - Implemented wavefront-safe atomic FIFO queue ensuring first-come, first-serve order
  - Added efficient synchronization using atomics
  - Enhanced `dequeue` to wait until an element is available

* test: Add GTest for AtomicWFQueue
  - Implemented unit tests for AtomicWFQueue using GoogleTest framework
  - Added tests for `enqueue`, `dequeue`, and edge cases
  - Ensured synchronization behavior and correctness under concurrent conditions

* Add assert in `enqueue` and update atomics
  - Added an assert in the `enqueue` function to ensure it fails if the queue is full

[ROCm/rocshmem commit: b84b5638cf]
2025-03-25 00:45:19 -05:00
Avinash Kethineedi baca5fd7a1 Fix/RO Backend Hang Issue (#53)
* Update HIP version check for compatibility with versions >= 5.5

* Update memory allocator for context BlockHandle
   - Replaced `HIPAllocator` with `HIPDefaultFinegrainedAllocator` for context `BlockHandle`.

* Update run commands for `rocshmem_g` and `rocshmem_p` functional tests

[ROCm/rocshmem commit: c16b0d6952]
2025-03-24 22:54:07 -05:00
Edgar Gabriel 1ee9b72449 add rocshmem_barrier() (#61)
* add team-barrier implementation

add a team-barrier API and implementation in the IPC and RO conduit.
Clean up some of the logic in the RO Conduit to distinguish between
sync, sync_all, barrier, and barrier_all.

* add team_barrier_tests to functional tests

[ROCm/rocshmem commit: bcbc42e78f]
2025-03-24 11:23:03 -05:00
Yiltan 1ed4512106 Removed GPU_IB (#59)
[ROCm/rocshmem commit: 658bf2a3b5]
2025-03-24 09:04:52 -04:00
Avinash Kethineedi 6f78b4300f Remove support code for GFX940 and GFX941 targets (#55)
[ROCm/rocshmem commit: 1210b6419f]
2025-03-21 14:31:49 -05:00
Edgar Gabriel 033253fbdf RO/collectives: add linear algorithms using RPut/Rget (#58)
* RO/collectives: add linear algorithms using RPut/Rget

- make broadcast, alltoall and fcollect use a simple linear algorithm
  using MPI_RPut/Rget, but without blocking in the execution
- remove the to_all interfaces, since they have been deprecated.
- remove the active-set interfaces, since they have been removed from
  rocSHMEM

* avoid notification after barrier

Co-authored-by: Avinash Kethineedi <avinash.kethineedi@amd.com>

* disable allocation of ata_buffer

a temporary buffer of 128MB was allocated when creating a team. In
previous versions of the code, that buffer was used by some collective
operations. This is not the case for now. Therefore, do not allocate the
buffer for now. I am not removing the element itself from teh
structure, since we might need it in future versions again.

---------

Co-authored-by: Avinash Kethineedi <avinash.kethineedi@amd.com>

[ROCm/rocshmem commit: 908bd5bda3]
2025-03-21 12:49:39 -05:00
Yiltan 6d6dccfebe Sync Reverse Offload Scripts (#52)
* Sync Reverse Offload scripts
- Disable IPC unit tests when IPC is not available in the rocSHMEM configuration

* Added missing ptr in ipc_policy

[ROCm/rocshmem commit: 3428957de9]
2025-03-19 14:31:07 -04:00
Yiltan 9b187a2e44 Updated IPC detection logic (#51)
* Added environment variable to enable/disable IPC at runtime

* Fixed IPC detection logic allow for difference process mappings

* Updated README.md

[ROCm/rocshmem commit: b7f3839f27]
2025-03-17 11:36:11 -04:00
Avinash Kethineedi 7f3879ff31 Refactor RO backend data structures (#49)
- Remove hdp and ipc pointers from BlockHandle, align RO stats with RO contexts

- Add run commands for `rocshmem_g` and `rocshmem_p` API tests in driver.sh

- Allocate rocshmem API return buffers based on number of device contexts.

- Associate status flag address with blocking calls and remove threadId dependency
   - Associated the status flag address with each blocking call request to notify the GPU thread.
   - Removed dependency on threadId for determining the appropriate status flag index.

- Move status flag buffer allocation to backend.

- Initialize allocated memeory to zero

[ROCm/rocshmem commit: df4ad2c04d]
2025-03-14 10:49:44 -05:00
Avinash Kethineedi 1831a1b33c Update(DeviceProxy): Dynamically Determine Memory Allocation Size & Remove Compile-Time size Calculations (#48)
* Update(DeviceProxy): Dynamically Determine Memory Allocation Size & Remove Compile-Time size Calculations

- Modified the Device proxy class to determine memory allocation size at runtime.
- Updated all classes that include the Device proxy to use dynamic memory allocation.
- Removed compile-time memory size calculations.
- Ensured the allocated number of backend queue data structures matches the number of RO device contexts.

[ROCm/rocshmem commit: eb5a38e806]
2025-02-24 15:11:46 -06:00
Yiltan 95c4c0d428 Fix ROCm 6.4 warnings (#47)
* Removed __AMDGCN_WAVEFRONT_SIZE

* Added unit test to validate WF_SIZE

[ROCm/rocshmem commit: 487e5b7d0f]
2025-02-24 13:34:13 -05:00
avinashkethineedi 6c70aee32e Remove rocshmem_timer function
[ROCm/rocshmem commit: 21dbd5cc5e]
2025-02-17 17:10:51 +00:00
avinashkethineedi 539e991b2a RO Backend: Add support for char, signed char and unsigned char
[ROCm/rocshmem commit: 540cd4b918]
2025-02-12 20:10:03 +00:00