Revīziju grafs

3 Revīzijas

Autors SHA1 Ziņojums Datums
Sang, Tao 438882ceb7 SWDEV-514141 - Fix zero clock rate issues (#4)
1.Remove clock functions from some tests that don't need them.
2.In some memory pool tests and coherency tests, timer-based kernel
delay isn't reliable, use pinned host based notification instead.
3.Add CHECK_PCIE_ATOMICS_SUPPORT before some tests.
4.catch/unit/memory/hipMemoryAllocateCoherent.cc is removed
as it is useless and originally excluded in building.
5.Some tests can still pass even if clock rate =0, thus they
  will be kept as is.
6.Some logic and format improvement in some tests.

Change-Id: I6b3c6bf54c61cffd45cd6f17c75998f751b75725

[ROCm/hip-tests commit: ec8ff45a1d]
2025-06-11 21:11:25 +05:30
Rupam Chetia 6309c03274 SWDEV-311271 - [catch2][dtest] Adding test for mempool and stream ordered memory APIs
Change-Id: Iddeb111e4b512bfc7422abc8e784b0a8e8fb133d


[ROCm/hip-tests commit: 456001c308]
2024-06-18 00:22:49 -04:00
Nives Vukovic 246562089b EXSWHTEC-364 - Implement tests for hipMemPoolSetGetAccess and hipMemPoolSetGetAttribute APIs (#435)
Change-Id: I9a9bd22f99e2be60608d50fe649e92b3b267f655


[ROCm/hip-tests commit: 7ffbf7f76b]
2024-02-15 18:45:24 +05:30