Граф коммитов

440 Коммитов

Автор SHA1 Сообщение Дата
Oak Zeng c189479766 Make GPU mapping of memory as uncached if HSA_DISABLE_CACHE is set
Before gfx90a, coherent memory is uncached. So it was reasonable
when environment variable HSA_DISABLE_CACHE is set, memory is mapped
as coherent. On gfx90a, coherent memory can be cached, so mapping
memory as coherent can't guarantee memory is uncached. When
HSA_DISABLE_CACHE is set, we have to map memory as uncached.

Change-Id: Ia5ed4cf0ad6aef5644dc8c9e6632b52d606f06f4
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: f132fb2cd0]
2021-02-23 12:20:29 -05:00
Harish Kasiviswanathan 4935d0f012 libhsakmt: Explicitly mark AQL buffers as UC
This change might be redundant if ROCr takes care of it

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I7b67143a8ad21baa61b7eda7b8e5fe0ac1e33830


[ROCm/ROCR-Runtime commit: 10674916e4]
2021-02-23 12:20:29 -05:00
Harish Kasiviswanathan a3ef11ce1d libhsakmt: A+A: Mark buffers accessed by CP as UC
This change is for the A+A bring-up branch as it needs to made more
generic to handle all ASICs.

For A+A all the system buffers are mapped as NC (non coherent) unless
explicitly marked as UC (uncached). The coherency is then expected to be
handled by shader by explicitly using acquire/release instructions.

However, CP doesn't have same feature. The buffers used by CP thus have
to UC. For now queue buffer and Signal handler memory is marked as UC.

This change shouldn't affect other ASICs since Uncached flag is not used
in those. However, this change still need to be made more generic.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I56c37a809913f7f08c94d01b0572d0f4864939aa


[ROCm/ROCR-Runtime commit: 7c05c5240f]
2021-02-23 12:20:29 -05:00
Laurent Morichetti 289e4dc1db libhsakmt: Fix the ctrl stack size calculation
On gfx9, the maximum number of wavefronts per queue is the minimum of
40 waves per compute units, or 512 waves per shader engine.  On gfx10,
there can only be 32 waves per compute units.

Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Change-Id: I148d1a4fe6c07cdbfaa1f77939eb29311c81c008


[ROCm/ROCR-Runtime commit: 4cf11c3a7e]
2021-02-23 12:20:29 -05:00
Laurent Morichetti c3940a1d44 Update the context save area size
Reserve some space in the context save area for the debugger's
use. There should be 32 bytes per wave for a given queue.

Change-Id: I65ddb6123d0f6afd3149844617ad19023009101d


[ROCm/ROCR-Runtime commit: a83f9b67ce]
2021-02-23 12:20:29 -05:00
Oak Zeng 992d1aef5b Support gfx90a real asic device id
Change-Id: Ib223b4e890899c3c4e468993a88f849bccc5d182
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: 50debca7e9]
2021-02-23 12:20:29 -05:00
Alex Sierra 2c1c2cfdf8 libhsakmt: add XNACK API set/get mode
XNACK API for GPUs that support this mode. This API
makes calls to amdgpu driver to configure xnack mode.
It supports set xnack mode and query the current mode used.

Change-Id: If865fd0e3f900f008243dc49504e1a0694e1791a
Signed-off-by: Alex Sierra <alex.sierra@amd.com>


[ROCm/ROCR-Runtime commit: 3f45f602d4]
2021-02-23 12:20:29 -05:00
Alex Sierra a247255a6a libhsakmt: add SVM thunk implementation
Implement SVM (Shared Virtual Memory) in the thunk.

Change-Id: I0380150d1d3da48070f9389a06f416d6059d6948
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Sean Keely <Sean.Keely@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Sierra <alex.sierra@amd.com>


[ROCm/ROCR-Runtime commit: 75e8fe383f]
2021-02-23 12:20:29 -05:00
Kent Russell 23f6c95324 Fix GCC warning regarding strncpy in CPU info
strlen(src) should not be used as the length in strncpy. Use memcpy
since we know the length of the string, and ensure that we
NULL-terminate regardless of length

Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: I21cc6d106510c69464e7ac9d3fc7da3a1e6d1a68


[ROCm/ROCR-Runtime commit: 731a06c704]
2021-02-23 12:20:29 -05:00
Eric Huang cceccd6d64 libhsakmt: add device id(0x46) for gfx90a mGPU model in topology
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: I43f7c12906c408576e1eb55871d51e7a30569ede


[ROCm/ROCR-Runtime commit: 4b3b941bb3]
2021-02-23 12:20:29 -05:00
Jonathan Kim 480618489e libhsakmt: add host trap send
Adding host trap send command.

Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Change-Id: I291c13f5905e00bc6685a980284a6abd0c98da78


[ROCm/ROCR-Runtime commit: f398d6d204]
2021-02-23 12:20:29 -05:00
Oak Zeng b1a9306ece Add gfx90a Gopher LSE DID (0x54)
Change-Id: Ic0a1e3d01373e0d6ba58e42188dced394423de82
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: 97ae33f9de]
2021-02-23 12:20:29 -05:00
Amber Lin 8d96c2c71f libhsakmt: Add device ID used in Simnow
Simnow simulator uses 0x7400 as gfx90a's device ID

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Change-Id: I0022509ef643760bc906e537b4fc64f1523fd8bf


[ROCm/ROCR-Runtime commit: 8c6dd3cbae]
2021-02-23 12:20:29 -05:00
Eric Huang 9f7ae5b9e2 libhsakmt: add new flag for memory mapped as uncached
It is to provide an option to map specific memory as
uncached on A+A HW platform.

Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Change-Id: Ib665cb306a0e78aba3ea5ee2f0e46cb62ae139f8


[ROCm/ROCR-Runtime commit: 2464bfc714]
2021-02-23 12:20:29 -05:00
Yong Zhao 9f0c092c5d libhsakmt: Support gfx90a
Change-Id: I1ad594eab093f5aa30143ade4e72f2379c9e3616
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 58ca2b745c]
2020-07-07 15:55:28 -05:00
Yong Zhao 430c7be7e0 libhsakmt: Prepare for gfx1030 support
PCI IDs have yet to be added later.

Change-Id: Iac303fc1346f4ed5c4da5300b1e311c1c6938ee2
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 7c74069d6a]
2020-07-07 11:07:14 -04:00
Gang Ba 04e57413f4 Revert "libhsakmt: add Streaming Performance Monitors APIs"
This reverts commit c0a0ada18b.

Reason for revert: Change was submitted by accident

Change-Id: If05c705e22296fd3ca789f269737d379a933361d
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: fec3780c1a]
2020-06-29 10:54:54 -04:00
Yong Zhao db028d945b libhsakmt: Improve the comment regarding queue doorbells
The comment failed to convey the fact.

Change-Id: Ia9b1d1c2583e288a6308d2bc81d42055064a5f4f
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 6a762ec717]
2020-06-16 15:16:03 -04:00
Gang Ba c0a0ada18b libhsakmt: add Streaming Performance Monitors APIs
Signed-off-by: Gang Ba <gaba@amd.com>
Change-Id: I5c23a8dacf9bc50c740908aabe391432f2c7112e
Signed-off-by: Gang Ba <gaba@amd.com>


[ROCm/ROCR-Runtime commit: d675d1cce1]
2020-05-29 09:34:31 -04:00
Philip.Cox@amd.com fc181bcdb1 Initial kfd debugger address watch support
Code for new kfd debugger address watch code.
           -- Adding support for:
              -- add address watch
              -- clear address watch

Change-Id: I9b014e7cee03897157b997b9e5b39b6ed403b8e1
Signed-off-by: Philip.Cox@amd.com <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: 0a55f31463]
2020-05-21 13:41:55 -04:00
Felix Kuehling 164749264e libhsakmt: use _Static_assert instead of static_assert
Using static_assert breaks in "Many Linux" build environment. It is not
supported by that libc version. _Static_assert is a compiler built-in
and does not depend on the libc version.

Change-Id: I37cf0ad10de94d8f6fc8cefc4fdda55c9520d599
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: df16950a0c]
2020-05-15 01:34:10 -04:00
Ranieri Althoff a6c3ce5762 Avoid calculating strlen multiple times
Change-Id: Iec66c7d35e5d6cd2deb02c94ee070d0fa1335147
Signed-off-by: Ranieri Althoff <ranisalt@gmail.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: aa185380f9]
2020-05-13 00:38:26 -04:00
Jonathan Kim 7740384eab libhsakmt: queue suspend/resume can return non-zero positive values
New queue suspend/resume update can now return the number of successful
queue requests so return success if IOCTL return is non-negative.

This should be backwards compatible since old queue suspend/resume returns
0 on success.

Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Change-Id: I06b70d95d203b2bfc19a0cc1b88c5719c695159a


[ROCm/ROCR-Runtime commit: 93c333711a]
2020-05-08 22:10:41 -04:00
Felix Kuehling 38ab5ed98e libhsakmt: Add PROT_NONE CPU mapping for scratch mappings
This is needed to allow gdb to access the memory.

Change-Id: I96c084b714e952d7b7000f0dd41e1c530fdd092f
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: e5062c4383]
2020-05-02 15:52:30 -04:00
Srinivasan Subramanian 08ae75cfca libhsakmt: check ret and errno for EBADF
Change-Id: I9fcbf955d8b7b01ff1025534a8c2eaa8e6790565
Signed-off-by: Srinivasan Subramanian <srinivasan.subramanian@amd.com>


[ROCm/ROCR-Runtime commit: 5e35364838]
2020-04-15 20:55:40 -04:00
Sean Keely bbb15f8992 Correct initial kfd_open_count increment.
Don't set kfd_open_count=1 unless hsaKmtOpenKFD actually succeeds.
This prevents returning HSAKMT_STATUS_KERNEL_ALREADY_OPENED in
subsequent calls when KFD is actually closed.

Signed-off-by: Sean Keely <Sean.Keely@amd.com>
Change-Id: Ia870b5faa8626826a6c8795aa10784d376cf2e80


[ROCm/ROCR-Runtime commit: 884fed4f04]
2020-04-03 21:05:07 -04:00
Jon Chesterfield ffadc0c8c6 Replace libpci with new parser.
libpci was only used to find a marketing string for a device.
This patch looks for a pci.ids on disk and parses it to extract the
same string, using 'Device xxxx' as the fallback on file i/o error
or missing data from the text file. Tested by checking every vendor/
device pair against the values returned from libpci.

Change-Id: I21af3157472c1824d57fcee31393c6ee8ce07330
Signed-off-by: Jon Chesterfield <Jonathan.Chesterfield@amd.com>


[ROCm/ROCR-Runtime commit: 0a1718b753]
2020-03-20 17:50:47 +00:00
Sean Keely 5149a527d7 Handle EBADF when KFD file handle is still open.
Signed-off-by: Sean Keely <Sean.Keely@amd.com>
Change-Id: I23d6c87d5729f57c261030c6baeff4c977eef934


[ROCm/ROCR-Runtime commit: 9efefe6d52]
2020-03-11 18:52:19 -05:00
Divya Shikre b54a23f31a libhsakmt: Expose device Unique Id
Read device unique id from sysfs and expose it in HsaNodeProperties.
For devices not supported the value will be 0

Signed-off-by: Divya Shikre <DivyaUday.Shikre@amd.com>
Change-Id: I97b8689dfa090971c6876de6feaa97652e28c03d


[ROCm/ROCR-Runtime commit: ebe7de1f99]
2020-03-10 10:06:11 -05:00
Sean Keely 83fd02c6f7 Update analysis_memory_exception to recognize shared memory.
Add type HSA_POINTER_REGISTERED_SHARED printing.

Change-Id: Ic0400a097ebabde4f035b57fbca4cca12428fc97


[ROCm/ROCR-Runtime commit: e66818e4d3]
2020-02-12 21:51:53 -05:00
Harish Kasiviswanathan 8b97e62fdc libhsakmt: Child process can reacquire system props
If child process explicitly calls hsaKmtReleaseSystemProperties(), it
fails. Allow child process to release and acquire system properties.



Change-Id: I649a4600212711b2ad4474f605f3ca39a4003d03
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 31530da7c6]
2020-02-06 15:09:39 -05:00
Sean Keely 619acf4f75 Update pointer info to include IPC memory.
IPC memory was previously returned as HSA_POINTER_ALLOCATED and
had garbage in the node_id field.  Due to ROCR_VISIBLE_DEVICES
we need to be able to distinguish between imported memory and
regular memory because imported memory may not be owned by an
agent that is visible in the process.  Differentiating these flags
allows the users to expect null agent for the owning agent.

Fixes 

Change-Id: Ide3489cec1ee2072dc9697fa5cb71ddb17999d14


[ROCm/ROCR-Runtime commit: 6957202df8]
2020-02-05 01:55:39 -06:00
Philip Yang 553463578f libhsakmt: Ignore mbind failure if flag NoSubstitute = 0
From Thunk spec, flag NoSubstitute = 0, if specific memory type is not
available on node, allocation may fall back to other memory that can
replace it on that node. mbind return failure if no memory available on
the specific node, we should ignore the mbind failure for this case.




Change-Id: I651a1bedf1852330604e56965cc17862403ebf87
Signed-off-by: Philip Yang <Philip.Yang@amd.com>


[ROCm/ROCR-Runtime commit: 5858aa17a9]
2020-01-27 13:27:37 -05:00
Felix Kuehling 2e3ae4b983 libhsakmt: Improve error handling in child process
Check for errno == EBADF in kmtIoctl to detect misuse of the kfd_fd
in a forked child process.

Detect being in a forked child process pro-actively by implementing
a pthread_atfork callback.

Make sure all mutexes get reinitialized in the child process to avoid
deadlocks.

Check for being in a forked child process in CHECK_KFD_OPENED so that
all hsaKmt functions will return the appropriate status
HSAKMT_STATUS_KERNEL_IO_CHANNEL_NOT_OPENED.

Update InvalidKFDHandleTest to expect that error code.

Change-Id: I0238e5fba344dcaa454e97a35db2e2dcc8d1f607
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 87e10cd0b4]
2020-01-20 18:01:21 -05:00
Huang Rui cc2162d8e9 libhsakmt: add NumCpQueues and NumSdmaQueuesPerEngine data field (v3)
NumCpQueues and NumSdmaQueuesPerEngine should be got by kfd driver not hardcode.
So add two data fields in HsaNodeProperties then thunk is able to get it from sysfs
that exposed by kfd.

v2: change NumCpQueues/NumSdmaQueuesPerEngine to one byte.
v3: merge two commits as one to avoid ABI update two times.

Change-Id: Ie386e4685f13493e22db6e207a399db6a4c5b9dc
Signed-off-by: Huang Rui <ray.huang@amd.com>


[ROCm/ROCR-Runtime commit: 06464b917d]
2020-01-03 23:27:42 -05:00
Yong Zhao 65757c59a2 libhsakmt: Add the perf counter support for gfx1012
Change-Id: I55d68a77928617edaabd33ae0807bf23f739c8de
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 22e9ef7303]
2019-12-18 20:49:36 -05:00
Jonathan Kim efef21f4ff add queue snapshot test
adds api and test to get newly create queue snapshot per ptraced process.

Change-Id: Ife97123a5b930e837ccaa386801145ef23c2cc2c
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>


[ROCm/ROCR-Runtime commit: 8b01a1c4c5]
2019-12-02 11:56:04 -05:00
Huang Rui d0c78bf4d5 libhsakmt: add gfx90c support for thunk
This patch adds the support for gfx90c apu. So far we treat it as "dgpu" and
gfx900. Will update hsa gfxip table while the isa/llvm is implemented on gfx90c.

Change-Id: I6ef164bf3e751fe6dd6287cac212a500dce84b1a
Signed-off-by: Huang Rui <ray.huang@amd.com>


[ROCm/ROCR-Runtime commit: fdba74c2fb]
2019-11-14 20:02:53 -05:00
Philip Yang bdb519bd35 libhsakmt: use the closest NUMA node to allocate queue ctx area
On NUMA system, allocate queue ctx save restore area on the closest NUMA
node to the GPU which the queue is going to run. This will improve
performance on NUMA system generally by reducing schedule latency and
fix the multi-node rccl-tests unstable performance issue.

If the closest NUMA node has no memory available, set flags NoNUMABind=1
to bypass mbind, to use default NUMA memory policy to allocate system
memory.



Change-Id: Ic62bfa5bb2efbf4f6ae79ff403e9610ddf18d45c
Signed-off-by: Philip Yang <Philip.Yang@amd.com>


[ROCm/ROCR-Runtime commit: 59c857476f]
2019-11-06 17:33:26 -05:00
Ori Messinger 7fad396d95 Add non-priv PMC blocks to GFX10
This patch adds the non-privileged PMC blocks for GFX10/gfx1010.

Change-Id: I4b98cb2159d71113c12920ca7fd10e45096b4e2c
Signed-off-by: Ori Messinger <Ori.Messinger@amd.com>


[ROCm/ROCR-Runtime commit: e7f45fae8a]
2019-11-05 13:07:13 -05:00
Oak Zeng d5d66661f6 Handle IOCTL failure in fmm_release
FREE_MEMORY_OF_GPU ioctl could fail, e.g., if memory is still mapped
to GPU. Handle this failure by return error in fmm_release/HsaKmtFreeMemory

Change-Id: I5461db39964f733cf97376d50e44906a9b4c0f13
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: fa0cb9ebeb]
2019-11-01 08:59:05 -04:00
Yong Zhao c1b8cb1464 libhsakmt: Add a message when a device is not supported
This helps to quickly triage problems.

Change-Id: Iad2b4b74209ab972be0c2f6311eeb3aaf098d29f
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: ab2daf6538]
2019-10-20 12:44:13 -04:00
Yong Zhao 8b8f758dab libhsakmt: Add gfx1012 device IDs
Now the gfx1012 device IDs are okay to reveal.

Change-Id: I9da2a036b74ec7b6b8b1fb7587597a5847f02205
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 1c7755d2da]
2019-10-17 12:35:22 -04:00
Yong Zhao 3872b5ce32 libhsakmt: Print an error message when map_mmio failes
Without this change, the failure was hard to notice when it happened.

Change-Id: I99c3e8cea0d0cbd3bcfe79069410e6e870e225bf
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 16fa78b134]
2019-10-17 12:32:32 -04:00
Amber Lin 211742a1f7 libhsakmt: handle CPU cache info on non-NUMA sys
When CONFIG_NUMA is not enabled in the kernel config, only one CPU node
presents on the system and /sys/devices/system/node/nodeX directories
don't exist. Read CPU cache information from /sys/devices/system/cpu in
this situation.

Change-Id: I017ff17dd72678a0551edcc77446664501aa42ca
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 23541e0289]
2019-10-17 11:53:19 -04:00
Philip Cox 74fe695127 Remove debugger data reg accesses
The debug trap accesses the data0/data1 registers, so we do not
want the userspace to write values to it.  We remove the calls to
set the data0/data1 register values.

Change-Id: Iaba842a4c445f339f16a39fe1994526ff78a2f3c
Signed-off-by: Philip Cox <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: 6933540c81]
2019-10-10 14:32:54 -04:00
Philip Cox 4c3e49f243 Add functions to get the kfd debugger version info
To support adding new features to the kfd debugger, and not break
functionality, we need to be able to check the kfd debugger support
version info from the kernel.

Change-Id: Icd88e4edab8430c35eaed588e62d892c1b5c62ec
Signed-off-by: Philip Cox <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: dbbd189b33]
2019-10-10 14:32:54 -04:00
Amber Lin 637bbb5c9c libhsakmt: fix typo in error message
When fail to get CPU dirs from //sys/devices/system/node/nodeX directory,
the error message should print node_dir, not path.

Change-Id: If76a51918c8dd55fa6605a62f3d29f9efc6fadb3
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 5a09880620]
2019-09-30 14:29:39 -04:00
shaoyunl 677448a6ea Thunk : Add gfx1011 support from thunk side
Change-Id: I6b202b75fc1ad0e69576a35a6a3e499818137e04
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>


[ROCm/ROCR-Runtime commit: a1e399a3ff]
2019-09-25 11:02:33 -04:00
Philip Yang 45d37b9665 libhsakmt: correct number of NUMA nodes calculation
numa_max_node() return the highest node number available on the current
system, number of NUMA nodes should be numa_max_node() + 1.

Change-Id: I20a6c17af071e73e853cb5ea6d0304c8aca52681
Signed-off-by: Philip Yang <Philip.Yang@amd.com>


[ROCm/ROCR-Runtime commit: 71cf3cf5d3]
2019-09-16 16:25:57 -04:00