Граф коммитов

64562 Коммитов

Автор SHA1 Сообщение Дата
Marko Arandjelovic a8b1c12007 SWDEV-452308 - Enable Unit_hipVoteSync_All
Change-Id: If989e2d1cf609f3f644b8adfb6d31100a8a5ed7a


[ROCm/hip-tests commit: 862b8d6d1f]
2024-11-04 11:47:23 -05:00
Marko Arandjelovic 862b8d6d1f SWDEV-452308 - Enable Unit_hipVoteSync_All
Change-Id: If989e2d1cf609f3f644b8adfb6d31100a8a5ed7a
2024-11-04 11:47:23 -05:00
Vladana Stojiljkovic 5e41c48966 SWDEV-478472 - Fix tests to return hipErrorInvalidChannelDescriptor instead of hipErrorUnknown
Change-Id: I1dc3af072aed813173cc12e9976a34ddf8c7d6a8


[ROCm/hip-tests commit: 5fa9900949]
2024-11-04 11:25:54 -05:00
Vladana Stojiljkovic 5fa9900949 SWDEV-478472 - Fix tests to return hipErrorInvalidChannelDescriptor instead of hipErrorUnknown
Change-Id: I1dc3af072aed813173cc12e9976a34ddf8c7d6a8
2024-11-04 11:25:54 -05:00
Jaydeep Patel 9e080a303c SWDEV-483355 - hipDrvMemcpy2DUnaligned is not supported for inter GPU copy without p2p access.
Change-Id: Ie484efc5779b139e5ca2d504342fb49edfb6b30c


[ROCm/hip-tests commit: 7aff6567b7]
2024-11-04 11:23:39 -05:00
Jaydeep Patel 7aff6567b7 SWDEV-483355 - hipDrvMemcpy2DUnaligned is not supported for inter GPU copy without p2p access.
Change-Id: Ie484efc5779b139e5ca2d504342fb49edfb6b30c
2024-11-04 11:23:39 -05:00
Jaydeep Patel c442ee3990 SWDEV-479616 - hipMemcpyParam2D and hipMemcpy2D does not support inter gpu copy without p2p access.
Skip Unit_hipGetProcAddress_MemoryApisPeerToPeer if p2p access is not supported.

Change-Id: I9f8598b9d1edf1d189583c5600b2e4d937564ea4


[ROCm/hip-tests commit: 067e3836ee]
2024-11-04 11:18:58 -05:00
Jaydeep Patel 067e3836ee SWDEV-479616 - hipMemcpyParam2D and hipMemcpy2D does not support inter gpu copy without p2p access.
Skip Unit_hipGetProcAddress_MemoryApisPeerToPeer if p2p access is not supported.

Change-Id: I9f8598b9d1edf1d189583c5600b2e4d937564ea4
2024-11-04 11:18:58 -05:00
Li, Todd tiantuo 149d95ec0c SWDEV-472357 - fix 1D, 2D and 3D memCpy tests
on sync, stream and setDevice

Change-Id: I19bdb907977338cac67c1e3f6f01cda6f2b97ec6


[ROCm/hip-tests commit: 9e30678987]
2024-11-04 11:12:52 -05:00
Li, Todd tiantuo 9e30678987 SWDEV-472357 - fix 1D, 2D and 3D memCpy tests
on sync, stream and setDevice

Change-Id: I19bdb907977338cac67c1e3f6f01cda6f2b97ec6
2024-11-04 11:12:52 -05:00
Marko Arandjelovic 8b5dbca27c SWDEV-476486 - Add unit test for hipMemAllocHost
Change-Id: Ie77686b4e2a269b845b3187f27281a5a855bd731


[ROCm/hip-tests commit: a13da7ba02]
2024-11-04 05:12:05 -05:00
Marko Arandjelovic a13da7ba02 SWDEV-476486 - Add unit test for hipMemAllocHost
Change-Id: Ie77686b4e2a269b845b3187f27281a5a855bd731
2024-11-04 05:12:05 -05:00
Branislav Brzak 3b470cb067 SWDEV-465201 - Match negative hipModuleLoad return with Cuda
Change-Id: Id6c682e7f9ec8d34e9c8d5d5933f31e003c67e27


[ROCm/clr commit: 68e5aeb93d]
2024-11-04 03:58:06 -05:00
Branislav Brzak 68e5aeb93d SWDEV-465201 - Match negative hipModuleLoad return with Cuda
Change-Id: Id6c682e7f9ec8d34e9c8d5d5933f31e003c67e27
2024-11-04 03:58:06 -05:00
Vladana Stojiljkovic e6277881c3 SWDEV-486969 - Add macros for capturing sync APIs
Change-Id: I6d348c8b34b29021c281c32aa5a636960e234ccb


[ROCm/hip-tests commit: 70a7d3ab8b]
2024-11-04 03:52:51 -05:00
Vladana Stojiljkovic 70a7d3ab8b SWDEV-486969 - Add macros for capturing sync APIs
Change-Id: I6d348c8b34b29021c281c32aa5a636960e234ccb
2024-11-04 03:52:51 -05:00
Jaydeep Patel c03356b41a SWDEV-491409 - Handle DynCO path to delete DeviceVars.
Change-Id: I757185e9c7c12f236e266219b67daf5836d2a122


[ROCm/clr commit: c24bc05cac]
2024-11-04 01:52:26 -05:00
Jaydeep Patel c24bc05cac SWDEV-491409 - Handle DynCO path to delete DeviceVars.
Change-Id: I757185e9c7c12f236e266219b67daf5836d2a122
2024-11-04 01:52:26 -05:00
Jonathan R. Madsen 3e64cedc0c SDK: create CMake option for strict checks on CPU vs. GPU timestamps (#1159)
* SDK: create CMake option for strict checks on CPU vs. GPU timestamps

- Configurating CMake with `ROCPROFILER_BUILD_CI_STRICT_TIMESTAMPS=ON` will enable fatal errors if dispatch/memcpy timestamps on GPU are outside of the start/end time from the CPU
- `ROCPROFIELR_BUILD_CI_STRICT_TIMESTAMPS` defaults to the value of `ROCPROFILER_BUILD_CI`

* Formatting

* Disable async_copy frequency scaling

* Disable profiling dispatch time frequency scaling

* Support runtime configuration via env variables

- ROCPROFILER_CI_FREQ_SCALE_TIMESTAMPS env variable will enable scaling the timestamps based on the hsa timestamp period
- ROCPROFILER_CI_STRICT_TIMESTAMPS env variable will enable strict timestamp checks
  - when cmake is configured with ROCPROFILER_BUILD_CI_STRICT_TIMESTAMPS=ON, this env variable defaults to true

* ROCPROFILER_BUILD_CI_STRICT_TIMESTAMPS defaults to OFF

* Update cmake-target

* Common tracing::adjust_profiling_time

---------

Co-authored-by: Gopesh Bhardwaj <gopesh.bhardwaj@amd.com>

[ROCm/rocprofiler-sdk commit: ad48201912]
2024-11-01 23:12:51 -05:00
Jonathan R. Madsen ad48201912 SDK: create CMake option for strict checks on CPU vs. GPU timestamps (#1159)
* SDK: create CMake option for strict checks on CPU vs. GPU timestamps

- Configurating CMake with `ROCPROFILER_BUILD_CI_STRICT_TIMESTAMPS=ON` will enable fatal errors if dispatch/memcpy timestamps on GPU are outside of the start/end time from the CPU
- `ROCPROFIELR_BUILD_CI_STRICT_TIMESTAMPS` defaults to the value of `ROCPROFILER_BUILD_CI`

* Formatting

* Disable async_copy frequency scaling

* Disable profiling dispatch time frequency scaling

* Support runtime configuration via env variables

- ROCPROFILER_CI_FREQ_SCALE_TIMESTAMPS env variable will enable scaling the timestamps based on the hsa timestamp period
- ROCPROFILER_CI_STRICT_TIMESTAMPS env variable will enable strict timestamp checks
  - when cmake is configured with ROCPROFILER_BUILD_CI_STRICT_TIMESTAMPS=ON, this env variable defaults to true

* ROCPROFILER_BUILD_CI_STRICT_TIMESTAMPS defaults to OFF

* Update cmake-target

* Common tracing::adjust_profiling_time

---------

Co-authored-by: Gopesh Bhardwaj <gopesh.bhardwaj@amd.com>
2024-11-01 23:12:51 -05:00
David Galiffi 4e78cf9b8c Install LICENCE to ${CMAKE_INSTALL_DOCDIR} (#458)
* Install LICENSE to ${CMAKE_INSTALL_DOCDIR}
* Update tarball.yml to test for LICENSE file after the install

---------

Signed-off-by: David Galiffi <David.Galiffi@amd.com>

[ROCm/rocprofiler-compute commit: 50755de867]
2024-11-01 17:51:00 -04:00
David Galiffi 50755de867 Install LICENCE to ${CMAKE_INSTALL_DOCDIR} (#458)
* Install LICENSE to ${CMAKE_INSTALL_DOCDIR}
* Update tarball.yml to test for LICENSE file after the install

---------

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
2024-11-01 17:51:00 -04:00
David Galiffi e43db734fa Update VERSION to 3.0.0 (#457)
* Update VERSION  and README to 3.0.0
* Update version mismatch of profiling data to a warning.

Signed-off-by: David Galiffi <David.Galiffi@amd.com>

[ROCm/rocprofiler-compute commit: 152eff0df1]
2024-11-01 15:26:34 -04:00
David Galiffi 152eff0df1 Update VERSION to 3.0.0 (#457)
* Update VERSION  and README to 3.0.0
* Update version mismatch of profiling data to a warning.

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
2024-11-01 15:26:34 -04:00
Cole Ramos 14d90939da Give executable permission to rocprof-compute (#456)
Signed-off-by: coleramos425 <colramos@amd.com>

[ROCm/rocprofiler-compute commit: 8a88e8bd90]
2024-11-01 14:16:49 -04:00
Cole Ramos 8a88e8bd90 Give executable permission to rocprof-compute (#456)
Signed-off-by: coleramos425 <colramos@amd.com>
2024-11-01 14:16:49 -04:00
Saleel Kudchadker 35201ff32d SWDEV-483586 - Do not take pinned path for read/write
- When GPU_FORCE_BLIT_COPY_SIZE is set do not take pinned path

Change-Id: Iaa065db63cc8fda61f82e6c9701e9fdaec5c54cb


[ROCm/clr commit: f1e98ab6e4]
2024-11-01 12:55:15 -04:00
Saleel Kudchadker f1e98ab6e4 SWDEV-483586 - Do not take pinned path for read/write
- When GPU_FORCE_BLIT_COPY_SIZE is set do not take pinned path

Change-Id: Iaa065db63cc8fda61f82e6c9701e9fdaec5c54cb
2024-11-01 12:55:15 -04:00
Satyanvesh Dittakavi 01c73b561f SWDEV-491967 - Add the right VGPRs per SIMD and VGPR Granularity for gfx12
- Default values are being assigned causing occupancy calculation to go
wrong without the right values defined for gfx12 ASICs
- Also added the these values for gfx1105

Change-Id: I611cc3a8ed8c57f2def637310ce1c3a48c16a574


[ROCm/clr commit: a26dc29eb9]
2024-11-01 12:47:23 -04:00
Satyanvesh Dittakavi a26dc29eb9 SWDEV-491967 - Add the right VGPRs per SIMD and VGPR Granularity for gfx12
- Default values are being assigned causing occupancy calculation to go
wrong without the right values defined for gfx12 ASICs
- Also added the these values for gfx1105

Change-Id: I611cc3a8ed8c57f2def637310ce1c3a48c16a574
2024-11-01 12:47:23 -04:00
xuchen-amd 825440e7ba Rename Omniperf to ROCm Compute Profiler (#428)
- Update filenames.
- Update executable to `rocprof-compute` 
- Update update package to `rocprofiler-compute`
- Update name in application output and logs
- Update name in README files
- Update testing and workflows

---------

Signed-off-by: Xuan Chen <xuchen@amd.com>

[ROCm/rocprofiler-compute commit: 31b4de1a38]
2024-11-01 12:20:21 -04:00
xuchen-amd 31b4de1a38 Rename Omniperf to ROCm Compute Profiler (#428)
- Update filenames.
- Update executable to `rocprof-compute` 
- Update update package to `rocprofiler-compute`
- Update name in application output and logs
- Update name in README files
- Update testing and workflows

---------

Signed-off-by: Xuan Chen <xuchen@amd.com>
2024-11-01 12:20:21 -04:00
Rahul Manocha 5b40eefdac SWDEV-490864 - Optimize Alloc Node detection in graph
Change-Id: I6ac32f9abd0b44864071a0a9396463cb13f6941f


[ROCm/clr commit: 314d4a2c22]
2024-11-01 11:45:49 -04:00
Rahul Manocha 314d4a2c22 SWDEV-490864 - Optimize Alloc Node detection in graph
Change-Id: I6ac32f9abd0b44864071a0a9396463cb13f6941f
2024-11-01 11:45:49 -04:00
Konstantin Zhuravlyov 04628d2d1f SWDEV-428601 - Don't enforce 1 isa per device in rocm backend
- Device can have multiple isas as per HSA spec
  - First isa is most specific one, so this change is sort of a NOP

Change-Id: Ib332af21745f2e6a7c25db8986bf7717501059bc


[ROCm/clr commit: 3387f48b56]
2024-11-01 11:01:02 -04:00
Konstantin Zhuravlyov 3387f48b56 SWDEV-428601 - Don't enforce 1 isa per device in rocm backend
- Device can have multiple isas as per HSA spec
  - First isa is most specific one, so this change is sort of a NOP

Change-Id: Ib332af21745f2e6a7c25db8986bf7717501059bc
2024-11-01 11:01:02 -04:00
Tao Sang 5fe3dc5bf9 SWDEV-487356 - Fix AMD LOG issue in Win32
Change-Id: Ia1c19cf4ea24188cdb2d374b01f975f794e02dbf


[ROCm/clr commit: 802cacf3e9]
2024-11-01 08:26:25 -04:00
Tao Sang 802cacf3e9 SWDEV-487356 - Fix AMD LOG issue in Win32
Change-Id: Ia1c19cf4ea24188cdb2d374b01f975f794e02dbf
2024-11-01 08:26:25 -04:00
Satyanvesh Dittakavi b606e3dca7 SWDEV-489570 - Update AQL packet in hipDrvGraphExecMemsetNodeSetParams
After setting the new params in hipDrvGraphExecMemsetNodeSetParams, we
need to update the AQL packet as well, otherwise during the graph launch
it still dispatches the packet which has the original params and not the
updated one.

Change-Id: Ie49a641ba3f66c8085a29f92d88ac6ea6a1c0534


[ROCm/clr commit: ba2ebb3b99]
2024-11-01 07:01:10 -04:00
Satyanvesh Dittakavi ba2ebb3b99 SWDEV-489570 - Update AQL packet in hipDrvGraphExecMemsetNodeSetParams
After setting the new params in hipDrvGraphExecMemsetNodeSetParams, we
need to update the AQL packet as well, otherwise during the graph launch
it still dispatches the packet which has the original params and not the
updated one.

Change-Id: Ie49a641ba3f66c8085a29f92d88ac6ea6a1c0534
2024-11-01 07:01:10 -04:00
Jaydeep Patel 0f77eeaace SWDEV-491149 - OCL does not need to update scratch as it can't update stack size using API unlike hipDeviceSetLimit.
for HIP, Update should be only if compiler notifies use of stack size.

Change-Id: Ic781bcac6fcf586da39ec4aafd4809da3652ede3


[ROCm/clr commit: 4aa52155ee]
2024-11-01 01:05:07 -04:00
Jaydeep Patel 4aa52155ee SWDEV-491149 - OCL does not need to update scratch as it can't update stack size using API unlike hipDeviceSetLimit.
for HIP, Update should be only if compiler notifies use of stack size.

Change-Id: Ic781bcac6fcf586da39ec4aafd4809da3652ede3
2024-11-01 01:05:07 -04:00
adapryor 4e399dc383 [SWDEV-412505] Handle mclk permission errors as not supported
Signed-off-by: adapryor <Adam.pryor@amd.com>
Change-Id: I25c9af42ed62697f87c70ecaeb153abe53401091


[ROCm/rocm_smi_lib commit: 61ed9e13f4]
2024-10-31 15:18:03 -04:00
adapryor 61ed9e13f4 [SWDEV-412505] Handle mclk permission errors as not supported
Signed-off-by: adapryor <Adam.pryor@amd.com>
Change-Id: I25c9af42ed62697f87c70ecaeb153abe53401091
2024-10-31 15:18:03 -04:00
Vladana Stojiljkovic 30571de816 SWDEV-492768 - Match hipStreamAddCallback capture behavior with nvidia
Change-Id: I7a084d8eeffe8b5095f7eb9969a565a40e76bb4b


[ROCm/clr commit: f6c8bbf4dc]
2024-10-31 12:42:17 -04:00
Vladana Stojiljkovic f6c8bbf4dc SWDEV-492768 - Match hipStreamAddCallback capture behavior with nvidia
Change-Id: I7a084d8eeffe8b5095f7eb9969a565a40e76bb4b
2024-10-31 12:42:17 -04:00
Vladana Stojiljkovic 116effa83c SWDEV-491452 - Allow hipMemAdvise capturing only inrelaxed mode
Change-Id: I1ca5e050ff869b486e3a0a41d7f06390a88e1110


[ROCm/clr commit: 02bbe11e56]
2024-10-31 12:41:47 -04:00
Vladana Stojiljkovic 02bbe11e56 SWDEV-491452 - Allow hipMemAdvise capturing only inrelaxed mode
Change-Id: I1ca5e050ff869b486e3a0a41d7f06390a88e1110
2024-10-31 12:41:47 -04:00
Vladana Stojiljkovic 7ff9aa117d SWDEV-493526 - Create kernel node when hipLaunchByPtr is captured
Change-Id: Id3493485dfdb468436ab33e6d7cb19b6b0066fd4


[ROCm/clr commit: e08df57502]
2024-10-31 12:41:31 -04:00
Vladana Stojiljkovic e08df57502 SWDEV-493526 - Create kernel node when hipLaunchByPtr is captured
Change-Id: Id3493485dfdb468436ab33e6d7cb19b6b0066fd4
2024-10-31 12:41:31 -04:00