Set affinity to the closest node of the current GPU. This reduces
the latency to fetch kernel args since device would query the CPU cache
of core which did the dispatch. This behavior is controlled with
AMD_CPU_AFFINITY env var(disabled by default)
Change-Id: I65afba62cb818ea25a311b88d1c0dd5c51330292
[ROCm/clr commit: b192beea52]
Setting AMD_CPU_AFFINITY=1 will keep Async Handler thread within the
bounds set by numactl.
Change-Id: Id01b30df5127d65c29ac072bf74a04986b7128de
[ROCm/clr commit: cd21af757e]
The os.hpp header gets added to the include path of legacy llvm via the compiler lib. Having "windows.h" included causes a lot conflicts with LLVM headers, as they forward declare many Windows types. Best to not include it here.
Change-Id: I60c44a8d28660368f1a4a95741e1053ef3528fa1
[ROCm/clr commit: e1b916260a]
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.
Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef
[ROCm/clr commit: fdef6f722f]
e.g.:
warning: expression does not compute the number of elements in this
array; element type is '__cpu_mask' (aka 'unsigned long'), not
'uint32_t' (aka 'unsigned int') [-Wsizeof-array-div]
for (uint i = 0; i < sizeof(mask_.__bits) / sizeof(uint32_t); ++i) {
__bits is a __cpu_mask, which is a 64-bit type. These were accessed
through uint32_t pointers so the loop bound should have been
correct. These operations can be done directly on the 64-bit type so
we can leave the array size pattern, and eliminate the casts.
The case in getNextSet should probably be rephrased in terms of
__cpu_mask to avoid the pointer casting, but this is tricker than the
other cases so I used the easy option to quiet the warning.
Change-Id: I1332584fad58439ccd9d369589519a9918e1678e
[ROCm/clr commit: 72c435ea35]
Saleel Kudchadker
agunashe
Jason Tang
Rahul Garg
Vladislav Sytchenko
kjayapra-amd
Tao Sang
Michael LIAO
Matt Arsenault
Laurent Morichetti