31aa18f1a9
SWDEV-317716 - Add uuid in device info structure
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Change-Id: Ie7f48d0faf7d722bd9bb8bd0f8962a7832dbe4f6
[ROCm/clr commit: 824704c87b
2022-02-03 12:17:28 -05:00
1f9f598d92
SWDEV-297292 - add gfx90c:xnack+ support as gfx90d
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Change-Id: I90e28981a7cbc0f9a0105c16e9dda3ad8ac57f51
[ROCm/clr commit: fbbae8055f
2022-02-02 14:24:19 -08:00
d9a7a47f56
SWDEV-2 - Change OpenCL version number from 3417 to 3418
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[ROCm/clr commit: 00f724e465
2022-02-01 03:00:44 -05:00
d0e8d72bfa
SWDEV-301947 - Use new enum for CU count
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Use HSA_AMD_AGENT_INFO_COOPERATIVE_COMPUTE_UNIT_COUNT to get compute
units. This is needed to work around assymentric CU harvesting bug on
gfx90a. Add a new device property to get the max available CUs on the
device.
Change-Id: I878f38f14f16c1af01fc0a77157aea1e816a63b8
[ROCm/clr commit: 33aca5a4a6
2022-01-31 12:57:50 -05:00
7929d01be3
SWDEV-2 - Change OpenCL version number from 3416 to 3417
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[ROCm/clr commit: 87dd8dd0d7
2022-01-28 03:00:07 -05:00
9c0b3d2d2f
SWDEV-318505 - Update HSAIL xnack path
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Fix a typo with new line
Change-Id: I7fee63409b491a1f214117b68cfffa0492aa0743
[ROCm/clr commit: b169956c78
2022-01-27 13:07:11 -05:00
b3a7bda2cc
SWDEV-2 - Change OpenCL version number from 3415 to 3416
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[ROCm/clr commit: 87b6c5f14c
2022-01-27 03:00:09 -05:00
ef7dffc013
SWDEV-320486 - Correctly set HSAIL_ELFTOOLCHAIN_DIR
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Change-Id: Icb39b376eaf3a8132b210bd1bd4eeecaa97bea9d
[ROCm/clr commit: 511065e301
2022-01-26 18:38:25 -05:00
26d897966e
SWDEV-245531 - GLInterop adding svm support
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Change-Id: Id7f2a7a214f5ad692b4a7acf26cfb1dc423ed54a
[ROCm/clr commit: b473a80f6a
2022-01-26 08:17:58 -05:00
9a874b36d7
SWDEV-2 - Change OpenCL version number from 3414 to 3415
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[ROCm/clr commit: 7727ea394c
2022-01-26 03:00:06 -05:00
ea28025939
SWDEV-318505 - Update HSAIL xnack path
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Report proper target id for xnack in HSAIL path. Runtime
will use ISA table and report hsailName().
Fix offline compilation path for PAL.
Change-Id: Ic0250bf6b9c193d867aec9800a319da1bf00c3ee
[ROCm/clr commit: a543d4a860
2022-01-24 09:27:32 -05:00
22bf484635
SWDEV-2 - Change OpenCL version number from 3413 to 3414
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[ROCm/clr commit: e6225e07d0
2022-01-19 03:00:08 -05:00
055b618f15
SWDEV-312368 - Segmentation fault in test_gl
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When OCL failed to obtain function pointer from GL, we should not call it.
Change-Id: I50f69d270ce445386906a286e44c4e8c83722302
[ROCm/clr commit: 15101e704b
2022-01-14 17:35:31 -05:00
67592dfe94
SWDEV-2 - Change OpenCL version number from 3412 to 3413
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[ROCm/clr commit: d04fdd9356
2022-01-13 03:00:05 -05:00
85c2cac111
SWDEV-306939 - Fix vdi errors/warnings by CppCheck
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Change-Id: I56d910f8363787f1050d5d7e8064ed553c5827fd
[ROCm/clr commit: e20dd61932
2022-01-12 00:22:16 -05:00
0f38461bb6
SWDEV-2 - Change OpenCL version number from 3411 to 3412
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[ROCm/clr commit: 8b5b2a2d79
2022-01-08 03:00:04 -05:00
252c0e5032
SWDEV-316665 - Add ATI_BITS_32 define to cmake build
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Some logic in ROCclr relies on ATI_BITS_32 define
Change-Id: I2f0ef535e8d7717f9aa8646bdc80c09880bd2bee
[ROCm/clr commit: 5f98028a48
2022-01-06 13:14:19 -05:00
1202b80ccd
SWDEV-2 - Change OpenCL version number from 3410 to 3411
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[ROCm/clr commit: f892de68a3
2022-01-05 03:00:05 -05:00
b8ab281765
SWDEV-317061 - Fix 32-bit HSAIL complib load
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Use __stdcall decl to match the library defines
Change-Id: Id4178443d5a9bb4e5401d80b3b5d15c7bbea0330
[ROCm/clr commit: e0a4e0df0e
2022-01-04 16:48:18 -05:00
da523f184f
SWDEV-2 - Change OpenCL version number from 3409 to 3410
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[ROCm/clr commit: c04d650b67
2021-12-29 03:00:09 -05:00
74c05e9bc1
SWDEV-316150 - align with OCL to use wavefront64 on Navi21/22/23/24
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Change-Id: Ic47bc7cc6300c217c02c2bbbda9940a3b5c9597d
[ROCm/clr commit: 3d5d9e2691
2021-12-28 12:39:18 -08:00
729e99fc65
SWDEV-2 - Change OpenCL version number from 3408 to 3409
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[ROCm/clr commit: a6948a31f2
2021-12-19 03:00:03 -05:00
500f6a6513
SWDEV-313306 - Fix Co-operative groups dtests
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Add a state indicator to retain ExternalSignals when needed.
Co-operative group launch uses external signals to indicate a dependency
to the next command.
Change-Id: I6d0daa006e2377c3bbf4aeca0fd5b63c7ac8fbbb
[ROCm/clr commit: 1fbd75b825
2021-12-17 12:41:37 -08:00
27a162656e
SWDEV-2 - Change OpenCL version number from 3407 to 3408
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[ROCm/clr commit: e5122e3bc7
2021-12-15 03:00:05 -05:00
42625f0527
SWDEV-313306 - Clear external signals
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Crash was due to the fact that external signal structure was stale even
after destroyign the command. That is because we skipped wait due to a
missing check.
Detect external signals and dispatch a barrier in ReleaseGpuMemoryFence.
Also clear external_signals_ at ProfilingBegin.
Change-Id: I991387edcfe928b511bf5e780988ee131321ed5a
[ROCm/clr commit: 3239222516
2021-12-13 23:03:33 -08:00
09b628c4e0
SWDEV-2 - Change OpenCL version number from 3406 to 3407
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[ROCm/clr commit: 1b5de6e562
2021-12-11 03:00:08 -05:00
c759986e28
SWDEV-300515 - Apply CU granularity on the CU count
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Report granularity for possible app query
Change-Id: I98857c6f4cc7ae590927ea35ce57d181abe7860b
[ROCm/clr commit: f613831471
2021-12-10 10:47:28 -05:00
aac7266191
SWDEV-2 - Change OpenCL version number from 3405 to 3406
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[ROCm/clr commit: 7abd2827b5
2021-12-10 03:00:08 -05:00
248a738674
SWDEV-290298 - add a flag to indicate the primary context active status
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Change-Id: Ia31790706d3f855bc1eedf5ef874e471
[ROCm/clr commit: 439af94dd9
2021-12-09 23:28:54 -05:00
4630f3ade0
SWDEV-314254 - Fix for hipMemcpy3D test crash
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Change-Id: Iac70bfe0d351cfb5b56fefc9a6487d3f26f2b4ef
[ROCm/clr commit: aedbad0109
2021-12-09 11:46:52 -05:00
9b2abd8370
SWDEV-2 - Change OpenCL version number from 3404 to 3405
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[ROCm/clr commit: 84af5eed4e
2021-12-09 03:00:06 -05:00
5ad02b78c4
SWDEV-305016 - Improve MGPU scaling in Tensorflow
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Add a threshold for ROCR/SDMA P2P transfers. ROCR copy path
requires extra barriers in compute for synchronization. That costs
extra performance with tiny transfers.
Reduce active wait time to 10us. Tensorflow uses extra thread
per GPU with constant hipEventQuery() calls. Longer active waits
in ROCr affect CPU performance.
Change-Id: I9020358438615fa2d4617f862f00a562f0a588e7
[ROCm/clr commit: 008133cf41
2021-12-08 11:59:37 -05:00
421d659e35
SWDEV-2 - Change OpenCL version number from 3403 to 3404
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[ROCm/clr commit: 587cda0c91
2021-12-08 03:00:05 -05:00
41eef3076e
SWDEV-308644 - reorganize extra blit kernel in PAL stack
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Change-Id: I9d853e8d417ef75b522184d83646ec4b9fa8669b
[ROCm/clr commit: 376ea1e293
2021-12-07 14:55:20 -05:00
1b87d3a497
SWDEV-307109 - Don't force Persistent for HIP
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With SAM on, don't force Persistent for allocations
in HIP. This makes ROCCLR go down paths we don't want
for HIP.
Change-Id: If54cc16fa891d4cfdc761c6ab21ad707627e822a
[ROCm/clr commit: 5243552768
2021-12-06 12:16:08 -05:00
5dab7d3843
SWDEV-2 - Change OpenCL version number from 3402 to 3403
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[ROCm/clr commit: 1a677effa8
2021-12-03 03:00:05 -05:00
b219bf8292
SWDEV-309286 - save the max system mem size in device info
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Change-Id: I9955625aca6ceda059aef6354d909de636b610ba
[ROCm/clr commit: 9dabdcdc3e
2021-12-02 10:59:07 -05:00
fb217aa6d0
SWDEV-2 - Change OpenCL version number from 3401 to 3402
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[ROCm/clr commit: 1df0ddefe4
2021-12-02 03:00:03 -05:00
97456a157b
SWDEV-308843 - Increase MaxPinnedXferSize to 128
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This allows experimenting with env var GPU_PINNED_XFER_SIZE which is
still at a default of 32MB
Change-Id: I85ade700ed58d498eba29d1737601dc74d4c26a4
[ROCm/clr commit: 3f82b99f5d
2021-12-01 20:37:56 -05:00
02e46ec231
SWDEV-284895 - Adding kind metadata and launch init/fini marked kernels
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Change-Id: If2b21c4b98567632c426943e0b69aca8d6f1ec2a
[ROCm/clr commit: 102aa9d6d9
2021-12-01 08:17:44 -08:00
0ef7ea3ad9
SWDEV-2 - Change OpenCL version number from 3400 to 3401
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[ROCm/clr commit: 3d56881a14
2021-11-30 03:00:03 -05:00
c8a6920b91
SWDEV-310181 - Fix for AtoH Memcpy tests failure
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Change-Id: Ibf8c8c01257f0516088d50d5c9f82040ed8fa067
[ROCm/clr commit: 02dc6f9f9a
2021-11-29 22:55:23 -05:00
f75cfb049a
SWDEV-312822 - Fix the globalWorkSize to number of sizeof(var) instead of bytes.
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Change-Id: Ic6b2bbb2e8d4cb6aa8d906d4b93cd06a176160d8
[ROCm/clr commit: d4ad981c0c
2021-11-29 17:36:11 -05:00
861b9fb84c
SWDEV-294669 - Avoid stall when the new signal was created
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Stall in the host thread could occur earlier than the app expects.
Make sure rutnime can grow the signals to the queue size without
any stall. Also adding a new signal to the end of the pool could
break the dependency chain on signal reuse. The new logic will
insert the new signal after current to keep the chain intact.
Change-Id: I9c90b98515907db8b677528263c3e88cd9581a14
[ROCm/clr commit: 102c19adf3
2021-11-29 10:08:06 -05:00
ed0b9b60ed
SWDEV-2 - Change OpenCL version number from 3399 to 3400
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[ROCm/clr commit: bfcb47ca72
2021-11-29 03:00:05 -05:00
f74515778c
SWDEV-312822 - Revert "SWDEV-310187 - Change flag to keep track of aligned sizes instead of expanded patterns."
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This reverts commit 72202672112e9bc8f793
2021-11-28 23:39:40 -05:00
af0788d2e9
SWDEV-2 - Change OpenCL version number from 3398 to 3399
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[ROCm/clr commit: 2c23a1091f
2021-11-27 03:00:08 -05:00
b0b0c3049f
SWDEV-313126 - Use data() method for the base array address
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Reference for the first element can trigger an assert with
_GLIBCXX_ASSERTIONS build
Change-Id: I59c63c052831307edfe5dcc6384798a43e9596dd
[ROCm/clr commit: 6f2e7c3199
2021-11-26 09:51:57 -05:00
3577900318
SWDEV-2 - Change OpenCL version number from 3397 to 3398
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[ROCm/clr commit: e4be77cbef
2021-11-26 03:00:05 -05:00
ea2741f631
SWDEV-308644 - merge roc blit kernels
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Change-Id: I378e511959fe17c03fa45066022e9670a4d181f0
[ROCm/clr commit: f5c9ad5b1d
2021-11-25 10:07:51 -05:00
Satyanvesh Dittakavi
Todd tiantuo Li
Chauncey Hui
Saleel Kudchadker
German Andryeyev
Konstantin Zhuravlyov
Payam
Alex Xie
haoyuan2
Sarbojit Sarkar
Julia Jiang
Christophe Paquot
anusha GodavarthySurya
kjayapra-amd