c16578eb71
P4 to Git Change 1236419 by asalmanp@asalmanp-opencl-stg on 2016/02/11 11:36:16
...
SWDEV-79278 - [OpenCL][Ellesmere BU] Exposing Ellesmere in mainline for 16.20 release
ReviewBoardURL = http://ocltc.amd.com/reviews/r/9750/
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings.h#7 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_amdil.h#7 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_amdil64.h#6 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_hsail.h#6 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_hsail64.h#6 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings.h#39 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_amdil.h#34 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_amdil64.h#30 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_hsail.h#29 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_hsail64.h#24 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm32/lib/Target/AMDIL/AMDILSubtarget.cpp#8 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm32/lib/Target/AMDIL/Internal/InternalProcessors.td#8 edit
... //depot/stg/opencl/drivers/opencl/compiler/tools/driver/driver.cpp#59 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudefs.hpp#133 edit
... //depot/stg/opencl/drivers/opencl/tests/ocltst/module/runtime/OCLDeviceQueries.cpp#33 edit
2016-02-11 11:49:08 -05:00
f7b58ebd17
adding ability to build in llvm source tree, updated README
...
[ROCm/clr commit: bae0f00e69
2016-02-11 15:27:00 +03:00
bae0f00e69
adding ability to build in llvm source tree, updated README
2016-02-11 15:27:00 +03:00
1b85fb3c4a
adding ability to build in llvm source tree, updated README
...
[ROCm/hip commit: dca4a70bb7
2016-02-11 15:27:00 +03:00
dca4a70bb7
adding ability to build in llvm source tree, updated README
2016-02-11 15:27:00 +03:00
cd9dabd76d
P4 to Git Change 1236333 by johtaylo@johtaylo-JTBUILDER03-increment on 2016/02/11 03:00:10
...
SWDEV-2 - Change OpenCL version number from 2032 to 2033.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#1779 edit
[ROCm/clr commit: 837ab19841
2016-02-11 03:08:59 -05:00
837ab19841
P4 to Git Change 1236333 by johtaylo@johtaylo-JTBUILDER03-increment on 2016/02/11 03:00:10
...
SWDEV-2 - Change OpenCL version number from 2032 to 2033.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#1779 edit
2016-02-11 03:08:59 -05:00
f826c7aaae
Updated readme for test
...
[ROCm/clr commit: ed2d86f3a9
2016-02-11 13:06:58 +05:30
ed2d86f3a9
Updated readme for test
2016-02-11 13:06:58 +05:30
f8290141b1
Updated readme for test
...
[ROCm/hip commit: a87c7988e8
2016-02-11 13:06:58 +05:30
a87c7988e8
Updated readme for test
2016-02-11 13:06:58 +05:30
50260adbe0
Initial version of CLANG based HIPIFY tool for CUDA -> HIP sources conversion
...
[ROCm/clr commit: 9d10ae4325
2016-02-10 20:20:11 +03:00
9d10ae4325
Initial version of CLANG based HIPIFY tool for CUDA -> HIP sources conversion
2016-02-10 20:20:11 +03:00
4518a1de70
Initial version of CLANG based HIPIFY tool for CUDA -> HIP sources conversion
...
[ROCm/hip commit: 5f224280ce
2016-02-10 20:20:11 +03:00
5f224280ce
Initial version of CLANG based HIPIFY tool for CUDA -> HIP sources conversion
2016-02-10 20:20:11 +03:00
887b32fe86
Make hsaKmtAllocMemory more compliant with the Thunk spec
...
Allocations from GPU nodes will return VRAM, not system memory.
Only non-paged allocation from GPU nodes is supported. System
memory can only be allocated from CPU nodes (usually node 0).
The HostAccess flag is no longer used to distinguish the memory
type. It only indicates, whether the memory is mapped for CPU
access.
Maintain compatibility with broken KfdTests by returning system
memory for paged-memory requested from GPU nodes.
Change-Id: I514defede735f55e6de436f41944125b6f2c4ccf
2016-02-10 10:29:54 -05:00
03720306b9
Make hsaKmtAllocMemory more compliant with the Thunk spec
...
Allocations from GPU nodes will return VRAM, not system memory.
Only non-paged allocation from GPU nodes is supported. System
memory can only be allocated from CPU nodes (usually node 0).
The HostAccess flag is no longer used to distinguish the memory
type. It only indicates, whether the memory is mapped for CPU
access.
Maintain compatibility with broken KfdTests by returning system
memory for paged-memory requested from GPU nodes.
Change-Id: I514defede735f55e6de436f41944125b6f2c4ccf
[ROCm/ROCR-Runtime commit: 887b32fe86
2016-02-10 10:29:54 -05:00
7879d2f103
Initial commit
...
[ROCm/clr commit: f3a2e03a6b
2016-02-10 09:29:29 -06:00
f3a2e03a6b
Initial commit
2016-02-10 09:29:29 -06:00
48a445168b
Initial commit
...
[ROCm/hip commit: 09fe3cc7d4
2016-02-10 09:29:29 -06:00
09fe3cc7d4
Initial commit
2016-02-10 09:29:29 -06:00
cedd1c0947
Merge branch 'privatestaging' of https://github.com/AMDComputeLibraries/HIP-privatestaging into privatestaging
...
[ROCm/clr commit: 3139c72756
2016-02-10 17:21:53 +03:00
3139c72756
Merge branch 'privatestaging' of https://github.com/AMDComputeLibraries/HIP-privatestaging into privatestaging
2016-02-10 17:21:53 +03:00
1a9bd34ca2
Merge branch 'privatestaging' of https://github.com/AMDComputeLibraries/HIP-privatestaging into privatestaging
...
[ROCm/hip commit: 12d9d9be82
2016-02-10 17:21:53 +03:00
12d9d9be82
Merge branch 'privatestaging' of https://github.com/AMDComputeLibraries/HIP-privatestaging into privatestaging
2016-02-10 17:21:53 +03:00
2478fc078f
Formatting, no functional changes
...
[ROCm/clr commit: d9a94191f2
2016-02-10 17:21:18 +03:00
d9a94191f2
Formatting, no functional changes
2016-02-10 17:21:18 +03:00
3a032ff317
Formatting, no functional changes
...
[ROCm/hip commit: 254da4ec53
2016-02-10 17:21:18 +03:00
254da4ec53
Formatting, no functional changes
2016-02-10 17:21:18 +03:00
03c2768897
Remove test for atomicInc and atomicDec
...
[ROCm/clr commit: 90add185fd
2016-02-10 21:02:52 +08:00
90add185fd
Remove test for atomicInc and atomicDec
2016-02-10 21:02:52 +08:00
4c861f0284
Remove test for atomicInc and atomicDec
...
[ROCm/hip commit: 51bff8757c
2016-02-10 21:02:52 +08:00
51bff8757c
Remove test for atomicInc and atomicDec
2016-02-10 21:02:52 +08:00
a815a4337f
Disable scratch Host allocation - via debug registration flags.
...
Change-Id: Ia6e5f86ec3979c4a49800f7af4509442a4e5be27
Signed-off-by: Yair Shachar <Yair.Shachar@amd.com >
2016-02-10 07:52:32 -05:00
8359dc3119
Disable scratch Host allocation - via debug registration flags.
...
Change-Id: Ia6e5f86ec3979c4a49800f7af4509442a4e5be27
Signed-off-by: Yair Shachar <Yair.Shachar@amd.com >
[ROCm/ROCR-Runtime commit: a815a4337f
2016-02-10 07:52:32 -05:00
688a9a19a5
Updated readme for test
...
[ROCm/clr commit: 56f1832e70
2016-02-10 20:05:59 +08:00
56f1832e70
Updated readme for test
2016-02-10 20:05:59 +08:00
1c89a8853a
Updated readme for test
...
[ROCm/hip commit: 6f2a94fb93
2016-02-10 20:05:59 +08:00
6f2a94fb93
Updated readme for test
2016-02-10 20:05:59 +08:00
5d857b2bc3
Resolved test issues
...
[ROCm/clr commit: 2f8d56e903
2016-02-10 20:01:16 +08:00
2f8d56e903
Resolved test issues
2016-02-10 20:01:16 +08:00
837875df37
Resolved test issues
...
[ROCm/hip commit: 4035b71df4
2016-02-10 20:01:16 +08:00
4035b71df4
Resolved test issues
2016-02-10 20:01:16 +08:00
77053c3c72
P4 to Git Change 1235953 by johtaylo@johtaylo-JTBUILDER03-increment on 2016/02/10 03:00:10
...
SWDEV-2 - Change OpenCL version number from 2031 to 2032.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#1778 edit
[ROCm/clr commit: 4a8a26801c
2016-02-10 03:10:47 -05:00
4a8a26801c
P4 to Git Change 1235953 by johtaylo@johtaylo-JTBUILDER03-increment on 2016/02/10 03:00:10
...
SWDEV-2 - Change OpenCL version number from 2031 to 2032.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#1778 edit
2016-02-10 03:10:47 -05:00
91a5b0aa77
Removed atomicInc and atomicDec support from HIP
...
[ROCm/clr commit: 51f46d9ddf
2016-02-10 04:29:55 +05:30
51f46d9ddf
Removed atomicInc and atomicDec support from HIP
2016-02-10 04:29:55 +05:30
1ab2294657
Removed atomicInc and atomicDec support from HIP
...
[ROCm/hip commit: 8c40a4ace4
2016-02-10 04:29:55 +05:30
8c40a4ace4
Removed atomicInc and atomicDec support from HIP
2016-02-10 04:29:55 +05:30
027f022623
P4 to Git Change 1235782 by asalmanp@asalmanp-opencl-stg on 2016/02/09 15:30:16
...
SWDEV-68792 - [OpenCL][HWS/CWSR] Adding support for Hardware Scheduler and Compute Wave Save restore (CWSR) feature on ORCA
Adding a temporary w/a for a CP uCode bug in HWS mode. Due to this bug, CP uCode loops through a RUNLIST unless there is a submission on all queues in HWS mode. This causes some overhead and performance drop in PCMark8 on CZ in HWS mode. To work around this issue, it was suggested to submit a dummy packet during initialization on all available queues on HWS mode so that CP uCode can break the loop. This w/a should be removed once CP uCode provides a final fix for this issue.
ReviewBoardURL = http://ocltc.amd.com/reviews/r/9616/
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp#160 edit
[ROCm/clr commit: 45715f0c48
2016-02-09 17:25:20 -05:00
foreman
dfukalov
Maneesh Gupta
Felix Kuehling
Ben Sander
Evgeny Mankov
streamhsa
Yair Shachar
gargrahul