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374 Commits

Author SHA1 Message Date
sdashmiz e176e27bf7 SWDEV-334233 - add support for p2p in windows 
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I9109120b5444c400e65cfff869cb36e876ffd1fc
 2022-07-14 15:07:33 -04:00
Saleel Kudchadker 6a77f73050 SWDEV-301667 - Increase kern arg pool 
Change-Id: Ie4b087ae4aec08fccaaa7958cdf545e4e27ac5c1
 2022-07-12 18:42:29 -04:00
Tao Sang 1e26165cd0 SWDEV-286739 - Support hipDeviceAttributeWallClockRate 
Part 1: Query constant frequence of wall clock from RocR

Change-Id: I52cbba6d67d11cde6d019c5ab530059f426a9bf2
 2022-07-12 17:53:11 -04:00
Saleel Kudchadker 175ad024d3 SWDEV-260345 - Manage constant buffer for blit 
- Leverage managed buffer that would use chunks for fill pattern. Use a
different chunk for the next fill to avoid wait

Change-Id: I254483c867e112f66564ffd8f55e0a605d8896c9
 2022-07-12 12:41:02 -04:00
Saleel Kudchadker faaa41aab8 SWDEV-335626 - Use ROCr copy for IPC 
Detect IPC buffer and use ROCr copy api instead of blit

Change-Id: Ie6bdd6fc45dbd7457611011d81570b53d5fd5276
 2022-07-08 13:32:19 -04:00
German Andryeyev 6844b8c7e0 SWDEV-340703 - Use different status value for the callback event 
Change-Id: Ida725df53abfbf348b18e24c19edf011dc9192dd
 2022-06-30 11:03:02 -04:00
German Andryeyev d8e4a289b3 SWDEV-344280 - Use coarse grain sysmem for kernel arg on MI200 
Change-Id: I9596f0e8b88699538ec271b3a4345e5f75b968e3
 2022-06-29 13:04:46 -04:00
haoyuan2 0a43f6bff3 SWDEV-343162 - fix OCL test regression 
For OCL, keep original control logic
FOr HIP, keep the fix for SWDEV-338781

Change-Id: I89de8d1e73cd103b3b4f62206eed72d45695dd6e
 2022-06-24 13:23:10 -04:00
German Andryeyev 73ec7bada6 SWDEV-341316 - Copy image SRD only if it's valid 
Change-Id: I971a21fe99fd07b21cfd3dbe4e7ed33c0ea322f4
 2022-06-16 09:18:04 -04:00
haoyuan2 6937fcae3a SWDEV-338781 - fix blender crash issue on Navi1x 
remove incorrect control logic which caused seg fault on Navi1x

Change-Id: Ic56e8a73c53062bd86adcf57d0b66e00e21734ec
 2022-06-15 10:54:57 -04:00
Saleel Kudchadker 5df34a2f7a SWDEV-335780 - Indicate if handler is queued 
Maintain status of handler callback. For event records we no longer
submit callbacks to reduce the load on the async handler thread. However
without a callback we leak command memory/decrement refcounts. Indicate
status of the handler which we can use to queue a callback when
finish is called.

Change-Id: I89fd02f3d047a0e8162664ee17581a14795f1928
 2022-06-14 20:55:06 -04:00
German Andryeyev 4975f69337 SWDEV-339296 - Delay hidden heap allocation till the usage 
Move hidden heap creation to the kernel launch to make sure it's
allocated on the actual first usage.

Change-Id: I1b65a82fc06d9129ed45a69765bf14ea3d945b04
 2022-06-14 12:18:34 -04:00
German Andryeyev 830898753d SWDEV-336024 - Clear device heap to 0 in ROCr path 
Change-Id: Id100ca6d6d5bd7fb16ca8c98ff0b12c9df1d69ab
 2022-05-20 11:51:08 -04:00
German Andryeyev 07c1b9a998 SWDEV-336024 - Clear device heap to 0 
This reverts commit 04bfd93569.

Reason for revert: Fix regressions

Change-Id: I7d883e1c3cbd27bb64b581ec800243ad7dfe24fd
 2022-05-19 09:10:08 -04:00
Sarbojit Sarkar 51a00aeefe SWDEV-331066 - support for LimitStackSize 
Change-Id: Ie6ae74f008b4f72de83663194aafb0ebdddfc8b6
 2022-05-19 00:24:06 -04:00
German Andryeyev 04bfd93569 SWDEV-336024 - Clear device heap to 0 
The heap must be cleared once per device, but ROCclr doesn't
create a queue per device in HIP. Hence, the clear operation will
be performed during the first queue creation.

Change-Id: I52ceb06d67d11cde6d019c5ab510059f426a9bfb
 2022-05-11 11:03:56 -04:00
Christophe Paquot b4645c7d4e SWDEV-322620 - Virtual Memory Management 
Add a virtualMemoryManagement_ flag to device.info.

Change-Id: Iabd039010d83fc51b4bcef600c609f5c65e7b1ae
 2022-05-09 22:54:42 -07:00
kjayapra-amd 643ee46f28 SWDEV-331355 - Fixing the surface object on fillMemory function call. 
Change-Id: Ieaa359ea8f31b0251d54b720469cdefde202579f
 2022-05-04 14:24:03 -04:00
Saleel Kudchadker 02566677cf SWDEV-334152 - Set release as systemscope 
Set release scope as system for dispatch AQL when events are passed to
hip*LaunchKernelGGL*

Change-Id: I93b91591e0ab023f1ecc5247f7905eca26147358
 2022-04-29 13:19:29 -04:00
German Andryeyev 934149ff0a SWDEV-307184 - Fix a regression from 15f1632d 
Disable hostcall buffer in OCL for now. COv5 can add hostcallbuffer
metadata for unknown reason. OCL may fail the buffer allocation
and kernel launch.

Change-Id: I34a6a45bac86c57422b764c0d69760c96920d6c5
 2022-04-28 11:57:48 -04:00
Julia Jiang b7c7917256 SWDEV-334574 - Rename _bkendDevice in VDI 
Change-Id: I1c04dad226e08f02bca11fa0d1981fafa7ea2d2a
 2022-04-27 11:21:24 -04:00
Sarbojit Sarkar 6b15e0a1cc SWDEV-333438 - Fix for hipEnablePeerAccess segfault 
Change-Id: I60720d1d9b9c522d15fe17dcfbc609571a4fd266
 2022-04-26 05:21:52 -04:00
Ajay d2f837d25f SWDEV-332522 - streamOpsWrite & streamOpsWait to accept memory offset 
Change-Id: I4b6ecb4d80c093d038d86616a637c4bb465ae24e
 2022-04-25 14:59:36 -04:00
Jason Tang ed7737564e SWDEV-324411 - Use blit kernel for copyBufferRect if atomic is not supported 
Change-Id: I2e110fd3418117ee9c7ede379244d2c6c4f248b7
 2022-04-24 11:41:16 -04:00
Christophe Paquot 67657d6099 SWDEV-322620 - Virtual Memory Management 
Implement map/unmap for PAL backend
Create commands since PAL uses the IQueue to map/unmap

Change-Id: I97e26a7d28ae5e10774c9ca65307153100945621
 2022-04-22 18:09:26 -04:00
sdashmiz 15f1632dfa SWDEV-204804 - Detecing pcie atomic support 
- check pcie atomci support for printf functionality
- if not enabled printf wont work

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Ib366e8e71772b02210c4a830bca4bd8cc7a11664
 2022-04-22 08:53:16 -04:00
Saleel Kudchadker 8864e53265 SWDEV-333237 - Disable cache status 
Enable Cache status only for ROC_EVENT_NO_FLUSH

Change-Id: I0de4c5af2226bccd66fd704be23c2db33050f2e2
 2022-04-20 18:12:33 -04:00
Julia Jiang b1611e0123 SWDEV-330164 - Fix in conformance svm_enqueue_api crash 
Change-Id: I12eca6ca3e8d722b7534047fca79b289604aa2b0
 2022-04-20 13:20:18 -04:00
Saleel Kudchadker 9ec8a7306d SWDEV-332512 - Signal pool changes 
Create a new signal if the next set of signals are busy

Change-Id: I5108e68c88fe41e3a45bad4495ebdf3742e76dcd
 2022-04-18 15:58:38 -04:00
Saleel Kudchadker b6cbfaf499 SWDEV-301667 - Separate scope from marker_ts_ 
Change-Id: I19f4d394e898bfb8c9d9a2c2edf9d5bf5def3b08
 2022-04-16 19:26:31 -04:00
Christophe Paquot b5f555f9ec SWDEV-322620 - Virtual Memory Management 
Adding virtual memory management APIs to rocclr.
The HIP layer will handle virtual allocs on devices.

Change-Id: Ia978f105c2c3fed3959c77580ba228e845105754
 2022-04-15 00:10:02 -04:00
German Andryeyev 7975a07112 SWDEV-332512 - Add ROC_SIGNAL_POOL_SIZE 
Default value is 32 HSA signals in the pool.

Change-Id: Icb69413d3ff6ef228d9a9e22fd024e72c6d8ebe4
 2022-04-14 17:32:00 -04:00
Saleel Kudchadker 8eeaa998c0 SWDEV-301667 - Add cache state for a device 
- Add a global cache state for a device to indicate scopes of submitted
AQL packets
- Remove scopes for TS marker if hipEventReleaseToDevice is passed. Set
env ROC_EVENT_NO_FLUSH=1 to use NOP AQL for event records.
It would flush caches by default with system scope release.
- Calling finish() should ensure if caches are flushed, if not queue a
marker

Change-Id: Ibbbdbb1cd7ac61cb35649169212142545be159e0
 2022-04-12 12:27:31 -04:00
Maxime Chambonnet d45794e985 SWDEV-1 - ROC CLR typos 
This is cherry-picked from this github issue:
https://github.com/ROCm-Developer-Tools/ROCclr/issues/28

Change-Id: I236f4f25a2dabe05883159af0fab0bad06ab0fd0
 2022-04-11 14:24:39 -04:00
German Andryeyev 2be0b1e612 SWDEV-307184 - Report 1 for unused dimensions 
Remove assert for kernel arg size, because COv5 reports a value
bigger than the actual usage in the most of cases

Change-Id: I8e15bc45a9e21b58a5894f9977511ca84408ce61
 2022-04-08 13:43:37 -04:00
kjayapra-amd b3b88ef926 SWDEV-331104 - Size passed to fillBuffer should not be 0. 
Change-Id: Ifbc6047fafa0e55b5ab956cf3b7254c7e20b1e88
 2022-04-08 09:29:55 -04:00
German Andryeyev caa6110c29 SWDEV-307184 - Move local size calculation 
With COv5 local size calculation must occur before
runtime programs kernel arguments

Change-Id: I0726c6529bde69b8fcf5360aa83986cf84e04168
 2022-04-05 11:19:51 -04:00
kjayapra-amd 378a427d8c SWDEV-325776 - Adding device release scope for kernel dispatch packet 
Change-Id: I8ea763f4c0239c410143b748c05822e9f6694412
(cherry picked from commit ec4894f8a27a3330b895a0ded385ab96f5ef242d)
 2022-04-01 08:17:29 -04:00
kjayapra-amd 7fb80a027a SWDEV-305527 - Changes to handle memset blit kernel that takes width, height and depth. This also fixes SWDEV-317261. 
Change-Id: Ic85f63a95d9d8f48884fc8c7fd95cbb496dfbbca
 2022-03-31 09:02:33 -04:00
German Andryeyev 28597ec5b5 SWDEV-328670 - Enable arena for ROCr interops 
Add ROCR memory detection and enable arena mem object for possible
access in HIP

Change-Id: Icf86ac789176bfee4ea8d36b0970a817d4c6a2f7
 2022-03-30 16:46:36 -04:00
Saleel Kudchadker 61d0b999be SWDEV-301947 - Report regular CU count for OpenCL 
Change-Id: I3ea058bba98f3c6554cbde37173bbd772f489cf5
 2022-03-29 16:19:14 -04:00
Satyanvesh Dittakavi c1b95b09bf SWDEV-326397 - P2P copies to take SDMA path if there is no pending dispatch 
Change-Id: I50cfb8d77f7882151a20a1de7aaf5219b1695b7d
 2022-03-29 14:59:11 +00:00
Saleel Kudchadker 802c2c8a9f SWDEV-322225 - Use numa_allocate_bitmask 
- Fix a crash with AMD_CPU_AFFINITY=1 as numa_bitmask_alloc isnt the
right api to allocate bitmask
- Do not set affinity for ROCr thread. It worsens performance rather
than any improvement.
- Fix regression from my previous change for event handler.

Change-Id: I3ea75adc2a6333f29752283eddd5b555e9b58cc5
 2022-03-26 13:24:51 -04:00
Ajay 35877b1b13 SWDEV-301667 - return void in getTime(). Avoid warning treated as error 
Change-Id: I9445eec554e6f705fb8f248e6be7ff995f163f25
 2022-03-25 13:39:55 -04:00
Saleel Kudchadker 3c3c0ca4c5 SWDEV-301667 - Selectively queue handler 
- Queue handler for hipEventRecord(aka marker_ts_) only if there is a
callback associated with it.

Change-Id: I8a9877ae0e342556053abbaacc9510744a8e772a
 2022-03-24 19:46:28 -04:00
German Andryeyev 3af3fe10de SWDEV-307185 - Move memory allocation under device layer 
It can be too early to allocate memory at the begining of
Device::create() under PAL

Change-Id: I4bd76db7be3f6fb246243ea68022d8b0f860471d
 2022-03-21 16:17:22 -04:00
Sarbojit Sarkar 3c2dc1f646 SWDEV-325708 - Query for FineGrained support 
Change-Id: Idd20a71467595ab6577bf47c081c437a4b166988
 2022-03-16 05:09:42 -04:00
German Andryeyev 7b114a2b8b SWDEV-307185 - Create heap for device memory allocator 
Pass the allocated heap with the kernel arguments

Change-Id: Icdec09b7f937845c39e21cbca7071dc3ba791af9
 2022-03-04 00:44:41 -05:00
Saleel Kudchadker e888c9e491 SWDEV-301947 - Rename device Info element 
Rename maxBoostComputeUnits to maxPhysicalComputeUnits_.

Change-Id: I5941515ac4f1f4348b3b10478bf4e01444f0a864
 2022-02-25 16:48:15 -08:00
Saleel Kudchadker c02d3fd7d8 SWDEV-301667 - Fix maxNode size for get_mempolicy 
Change-Id: Ifd84c94394b86580cf39178ad0e7f85580b24edb
 2022-02-19 12:48:22 -05:00