3261e2a5fd
Adding User Buffer Registration support for Unit test ( #1199 )
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* Adding UBR support for UT SendRecv
Signed-off-by: Tim Hu <timhu102@amd.com >
* Update test/common/TestBedChild.cpp
Co-authored-by: corey-derochie-amd <161367113+corey-derochie-amd@users.noreply.github.com >
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Signed-off-by: Tim Hu <timhu102@amd.com >
Co-authored-by: corey-derochie-amd <161367113+corey-derochie-amd@users.noreply.github.com >
[ROCm/rccl commit: a4793286c7
2024-07-30 13:39:25 -04:00
da835cff9c
replacing rccl_bfloat16 with hip_bfloat16 ( #1126 )
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Co-authored-by: mberenjk <mberenjk@amd.com >
[ROCm/rccl commit: 428837ffe4
2024-04-11 11:30:37 -05:00
e373bd44bf
Enable fp8 support ( #1101 )
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* initial checkin
* resolve cr comments
* resolve the build issue
* fix the data correctless issue
* update fp8 header file and update the unit test for fp8 support
* remove fp16 from fp8 headers
* fix ut issue and catch up the latest code from develop
* udate according to cr comments
* update ut according to cr comments
* update num floats for each SumPostDiv from 4 to 6
* update fp8 header file name
* fix the typo
[ROCm/rccl commit: 6777e65c1d
2024-03-08 15:17:53 -08:00
826d20495f
Adding FP16 cases to unit tests( #1093 )
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Signed-off-by: Tim Hu <timhu102@amd.com >
[ROCm/rccl commit: 0d06b0f1de
2024-02-26 12:08:04 -05:00
0ca30fb88a
Updating files for missing licenses ( #637 )
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[ROCm/rccl commit: ebb8b5bf63
2022-10-14 13:49:16 -06:00
2cd63dac42
added stream synch after hipMemset ( #609 )
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[ROCm/rccl commit: 06bce9d0c9
2022-08-30 16:18:37 -06:00
b32b819151
introduce support for ncclFloat16/half in UT
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[ROCm/rccl commit: f6e00dec13
2022-08-24 15:28:24 +00:00
a182076a0e
Unit test refactor ( #500 )
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Refactoring and consolidating single-process / multi-process unit testing
[ROCm/rccl commit: 29ad0f5fbe
2022-02-25 08:59:07 -07:00
Tim
mberenjk
Andy li
gilbertlee-amd
akolliasAMD
Edgar Gabriel