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Author SHA1 Message Date
Vignesh Edithal 25b6bbbb3c Use github app for develop to amd-staging sync 
* Use the token for rocprofiler-compute-runner github app to perform
  auth to bypass amd-staging branch protection
 2025-02-03 13:41:14 -05:00
David Galiffi 78f1c9e179 Disable the weekly sync 
Disable the weekly sync from staging to mainline. We'll do this manually with CQE approval.

[ROCm/rocprofiler-systems commit: 80dc2efc50]
 2025-02-03 13:13:22 -05:00
David Galiffi 80dc2efc50 Disable the weekly sync 
Disable the weekly sync from staging to mainline. We'll do this manually with CQE approval.
 2025-02-03 13:13:22 -05:00
Choudhary, Rahul d70d3fb59f Create kws_caller.yml and rocm_ci_caller.yml (#1) 
Enabling per PR based KWS check and PSDB check
 2025-02-03 09:43:35 -08:00
Choudhary, Rahul 0f05d1e480 Create kws_caller.yml and rocm_ci_caller.yml (#1) 
Enabling per PR based KWS check and PSDB check

[ROCm/ROCR-Runtime commit: d70d3fb59f]
 2025-02-03 09:43:35 -08:00
Choudhary, Rahul c06176773c Merge pull request #1 from AMD-ROCm-Internal/rahchoud_amdeng-patch-1 
Create kws_caller.yml and rocm_ci_caller.yml

[ROCm/rocminfo commit: fad2fcda9f]
 2025-02-03 09:35:08 -08:00
Choudhary, Rahul fad2fcda9f Merge pull request #1 from AMD-ROCm-Internal/rahchoud_amdeng-patch-1 
Create kws_caller.yml and rocm_ci_caller.yml
 2025-02-03 09:35:08 -08:00
Jacob Lambert 2bd527c676 SWDEV-387063 - Use clang default for C++ version 
Instead of enforcing c++14 here, we can instead use the current
clang default

Change-Id: Ib0a178a53c1377f2910edf6fab82b2bac6567ac7


[ROCm/clr commit: 33e48b9629]
 2025-02-03 11:07:52 -05:00
Jacob Lambert 33e48b9629 SWDEV-387063 - Use clang default for C++ version 
Instead of enforcing c++14 here, we can instead use the current
clang default

Change-Id: Ib0a178a53c1377f2910edf6fab82b2bac6567ac7
 2025-02-03 11:07:52 -05:00
Young Hui - AMD 5c27ece3ff DOCs: update index and TOC to better organize how-to docs (#78) 
[ROCm/rocprofiler-systems commit: 10ba4b76de]
 2025-01-31 21:03:18 -05:00
Young Hui - AMD 10ba4b76de DOCs: update index and TOC to better organize how-to docs (#78) 2025-01-31 21:03:18 -05:00
Choudhary, Rahul 7c03610905 Update rocm_ci_caller.yml added amd-npi pull request trigger 2025-01-31 16:10:41 -08:00
Choudhary, Rahul 3842fe1e25 Update rocm_ci_caller.yml added amd-npi pull request trigger 
[ROCm/ROCR-Runtime commit: 7c03610905]
 2025-01-31 16:10:41 -08:00
Choudhary, Rahul 2b33ff1fbf Delete .github/rocm_ci_caller.yml 
[ROCm/rocminfo commit: 33ac653411]
 2025-01-31 16:06:10 -08:00
Choudhary, Rahul 33ac653411 Delete .github/rocm_ci_caller.yml 2025-01-31 16:06:10 -08:00
Choudhary, Rahul 6b5ce8f729 Create rocm_ci_caller.yml 
[ROCm/rocminfo commit: 6bd1718fd1]
 2025-01-31 16:05:53 -08:00
Choudhary, Rahul 6bd1718fd1 Create rocm_ci_caller.yml 2025-01-31 16:05:53 -08:00
Choudhary, Rahul b5e0d3473a Create rocm_ci_caller.yml 
[ROCm/rocminfo commit: 0e1d6396cc]
 2025-01-31 15:43:24 -08:00
Choudhary, Rahul 0e1d6396cc Create rocm_ci_caller.yml 2025-01-31 15:43:24 -08:00
Choudhary, Rahul 68f0c67d37 Create kws_caller.yml and rocm_ci_caller.yml 
Enabling ROCM CI workflow

[ROCm/rocminfo commit: 0f7c9495f4]
 2025-01-31 15:42:44 -08:00
Choudhary, Rahul 0f7c9495f4 Create kws_caller.yml and rocm_ci_caller.yml 
Enabling ROCM CI workflow
 2025-01-31 15:42:44 -08:00
Maisam Arif 5a9fb676bc Fixed description for amdsmi_get_gpu_virtualization_mode 
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: I9234a4e7b78f19e16484d7bd5fa078c38f0262ff
 2025-01-31 17:40:48 -06:00
Maisam Arif f5bf32554c Fixed description for amdsmi_get_gpu_virtualization_mode 
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: I9234a4e7b78f19e16484d7bd5fa078c38f0262ff


[ROCm/amdsmi commit: 5a9fb676bc]
 2025-01-31 17:40:48 -06:00
Pham, Gabriel e663bed7d6 [SWDEV-462952] Updated passthrough to use virtualization mode struct 
Signed-off-by: gabrpham <Gabriel.Pham@amd.com>
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Co-authored-by: Maisam Arif <Maisam.Arif@amd.com>
 2025-01-31 17:34:01 -06:00
Pham, Gabriel 5c1f610cc1 [SWDEV-462952] Updated passthrough to use virtualization mode struct 
Signed-off-by: gabrpham <Gabriel.Pham@amd.com>
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Co-authored-by: Maisam Arif <Maisam.Arif@amd.com>

[ROCm/amdsmi commit: e663bed7d6]
 2025-01-31 17:34:01 -06:00
Choudhary, Rahul c603d7164c Create rocm_ci_caller.yml 2025-01-31 14:25:18 -08:00
Choudhary, Rahul 751ebdfc0e Create rocm_ci_caller.yml 
[ROCm/ROCR-Runtime commit: c603d7164c]
 2025-01-31 14:25:18 -08:00
Choudhary, Rahul 460a28ed03 Create kws_caller.yml 2025-01-31 14:22:03 -08:00
Choudhary, Rahul e4e3c59968 Create kws_caller.yml 
[ROCm/ROCR-Runtime commit: 460a28ed03]
 2025-01-31 14:22:03 -08:00
Galantsev, Dmitrii 6dcb9322f9 update_wrapper.sh - Fix docker 
Change-Id: Icb0d80dacfe17222b32bf5616765abc08cafd085

Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
 2025-01-31 14:55:36 -06:00
Galantsev, Dmitrii 760c386dd8 update_wrapper.sh - Fix docker 
Change-Id: Icb0d80dacfe17222b32bf5616765abc08cafd085

Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>

[ROCm/amdsmi commit: 6dcb9322f9]
 2025-01-31 14:55:36 -06:00
Arif, Maisam fb3a9c2290 Bump Version 25.2.0 
Change-Id: I9a38e58c0c9ef9348312e4faf299518073a1c3c2

Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
 2025-01-31 15:50:34 -05:00
Arif, Maisam fb389b4943 Bump Version 25.2.0 
Change-Id: I9a38e58c0c9ef9348312e4faf299518073a1c3c2

Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>

[ROCm/amdsmi commit: fb3a9c2290]
 2025-01-31 15:50:34 -05:00
Jimbo Xie cc229f251f SWDEV-504383 - Cleaned up kForcedTimeout10us and removed IsHwEventReadyForcedWait 
Also removed active_wait_timeout

Change-Id: I7a429f003c09a4df267b5c0983050704260094c6


[ROCm/clr commit: 4872b420c9]
 2025-01-31 14:40:18 -05:00
Jimbo Xie 4872b420c9 SWDEV-504383 - Cleaned up kForcedTimeout10us and removed IsHwEventReadyForcedWait 
Also removed active_wait_timeout

Change-Id: I7a429f003c09a4df267b5c0983050704260094c6
 2025-01-31 14:40:18 -05:00
taosang2 40df900647 SWDEV-501963 - Add missing codes for gfx950 
Cherry-pick https://gerrit-git.amd.com/c/compute/ec/clr/+/1162997

Change-Id: I6b3c6bf55c61cffd43cd6f17b75998f751b75723


[ROCm/clr commit: 32daa8f384]
 2025-01-31 14:34:49 -05:00
taosang2 32daa8f384 SWDEV-501963 - Add missing codes for gfx950 
Cherry-pick https://gerrit-git.amd.com/c/compute/ec/clr/+/1162997

Change-Id: I6b3c6bf55c61cffd43cd6f17b75998f751b75723
 2025-01-31 14:34:49 -05:00
Justin Williams f106364fc7 Make README.md pretty 
Change-Id: I7c3341deaf3621ebbc9e495b023b1dd4971a5f1d
 2025-01-31 12:22:45 -06:00
Justin Williams 1a0e1ff280 Make README.md pretty 
Change-Id: I7c3341deaf3621ebbc9e495b023b1dd4971a5f1d


[ROCm/rdc commit: f106364fc7]
 2025-01-31 12:22:45 -06:00
Galantsev, Dmitrii bee9991c4a Revert "Dgalants/add auth script location (#108)" 
This reverts commit a70aa81cfd.
 2025-01-31 12:22:45 -06:00
Galantsev, Dmitrii 0bb38058e7 Revert "Dgalants/add auth script location (#108)" 
This reverts commit 2f68fe1efe.


[ROCm/rdc commit: bee9991c4a]
 2025-01-31 12:22:45 -06:00
Tao Sang 27c52062ae FEAT-62198 - Extend device scope for disabled cases 
Change-Id: I814e35c528d90ed2bbb34d77377f1b7fd3f1f11d


[ROCm/hip-tests commit: 267d120bb0]
 2025-01-31 11:42:13 -05:00
Tao Sang 267d120bb0 FEAT-62198 - Extend device scope for disabled cases 
Change-Id: I814e35c528d90ed2bbb34d77377f1b7fd3f1f11d
 2025-01-31 11:42:13 -05:00
taosang2 af99b5d52d FEAT-56803 - Fix ocltst slow issues 
Fix very slow issues of two ocltst test cases.

Cherry pick
 https://gerrit-git.amd.com/c/compute/ec/clr/+/1009383

Change-Id: I0228c5e87cdec366993fd4afb1c25e7f8161c2c5


[ROCm/clr commit: 4ec274c7d4]
 2025-01-31 10:45:43 -05:00
taosang2 4ec274c7d4 FEAT-56803 - Fix ocltst slow issues 
Fix very slow issues of two ocltst test cases.

Cherry pick
 https://gerrit-git.amd.com/c/compute/ec/clr/+/1009383

Change-Id: I0228c5e87cdec366993fd4afb1c25e7f8161c2c5
 2025-01-31 10:45:43 -05:00
Poag, Charis 3a94f5a880 Fix AttributeError: 'Namespace' object has no attribute 'cpu_pwr_svi_telemetry_rails' 
Updated missing references to cpu_pwr_svi_telemetry_rails

Change-Id: I1828ad3122a602dc5c4253500f83c3910b682cb3
Signed-off-by: Poag, Charis <Charis.Poag@amd.com>
 2025-01-31 08:12:42 -06:00
Poag, Charis 76a1641800 Fix AttributeError: 'Namespace' object has no attribute 'cpu_pwr_svi_telemetry_rails' 
Updated missing references to cpu_pwr_svi_telemetry_rails

Change-Id: I1828ad3122a602dc5c4253500f83c3910b682cb3
Signed-off-by: Poag, Charis <Charis.Poag@amd.com>


[ROCm/amdsmi commit: 3a94f5a880]
 2025-01-31 08:12:42 -06:00
Jatin Chaudhary b5c5d67f7a SWDEV-501779 - add host tests for fp16 
Change-Id: I47a117bb6fbfe1d5c7262238b97d9fccf7d4222c


[ROCm/hip-tests commit: 84a460d96b]
 2025-01-31 04:24:12 -05:00
Jatin Chaudhary 84a460d96b SWDEV-501779 - add host tests for fp16 
Change-Id: I47a117bb6fbfe1d5c7262238b97d9fccf7d4222c
 2025-01-31 04:24:12 -05:00
Jatin Chaudhary 9e607d2122 SWDEV-425090 - remove some tests 
Remove set of tests which checks for string "error" in clang's output.
This is something HIP can not control and can lead to failures when we
move around with C++ versions or clang decides to make some changes in
its error logging.

Change-Id: Iddbc3177d5a934bd4113e1475d0c759019270aed


[ROCm/hip-tests commit: 4ccc9677c0]
 2025-01-31 04:21:28 -05:00