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srawat 8a698a7e23 Update LICENSE
[ROCm/rdc commit: 0e53160bee]
2025-01-09 13:12:24 -06:00
Giovanni Baraldi f19bed4c8c SWDEV-508485: Adding MFMA F8 metric
Change-Id: I947d2645e8dc1544d198a4e0a02500feee10d89d
2025-01-09 12:18:02 -06:00
Giovanni Baraldi d63f98bd00 SWDEV-508485: Adding MFMA F8 metric
Change-Id: I947d2645e8dc1544d198a4e0a02500feee10d89d


[ROCm/rocprofiler commit: f19bed4c8c]
2025-01-09 12:18:02 -06:00
German Andryeyev 5a76761960 SWDEV-507019 - Change the function lock to the module lock
Multiple functions can be located in the same module.

Change-Id: Ia4ca3db64fe5b0822584059d3770c91103665c63


[ROCm/clr commit: 45a12208b6]
2025-01-09 12:35:29 -05:00
German Andryeyev 45a12208b6 SWDEV-507019 - Change the function lock to the module lock
Multiple functions can be located in the same module.

Change-Id: Ia4ca3db64fe5b0822584059d3770c91103665c63
2025-01-09 12:35:29 -05:00
Julia Jiang f43f10830b SWDEV-507714 - Update description for hip API hipDriverGetVersion
Change-Id: Icec9d8b8beed2745a7344734b2449d4a2b4f494f


[ROCm/hip commit: 808274984d]
2025-01-09 12:02:45 -05:00
Julia Jiang 808274984d SWDEV-507714 - Update description for hip API hipDriverGetVersion
Change-Id: Icec9d8b8beed2745a7344734b2449d4a2b4f494f
2025-01-09 12:02:45 -05:00
Kent Russell cc7ff73e7f kfdtest: Can't initialize variable-sized objects
Do a memset, since we can't initialize variable-sized objects

Change-Id: I57faf4a0581a29f9d30391aa387812c2b7bb5011
Signed-off-by: Kent Russell <kent.russell@amd.com>
2025-01-09 10:36:06 -05:00
Kent Russell f256811bab kfdtest: Can't initialize variable-sized objects
Do a memset, since we can't initialize variable-sized objects

Change-Id: I57faf4a0581a29f9d30391aa387812c2b7bb5011
Signed-off-by: Kent Russell <kent.russell@amd.com>


[ROCm/ROCR-Runtime commit: cc7ff73e7f]
2025-01-09 10:36:06 -05:00
Rambabu Swargam 80903662fc SWDEV-491360 - [catch2][dtest] hipGraphLaunch parallelism Tests
Tests for Alloc node detection optimization changes

Change-Id: I780553110b33887c65b7989490c9a72e796f1a62


[ROCm/hip-tests commit: 351ffa8378]
2025-01-09 00:02:07 -05:00
Rambabu Swargam 351ffa8378 SWDEV-491360 - [catch2][dtest] hipGraphLaunch parallelism Tests
Tests for Alloc node detection optimization changes

Change-Id: I780553110b33887c65b7989490c9a72e796f1a62
2025-01-09 00:02:07 -05:00
Galantsev, Dmitrii 207cb06783 OTF2 - Fix lib vs lib64 location on some systems (#68)
On my dev machine I use OpenSUSE Tumbleweed. For some reason OTF2 gets
installed into BUILD/external/otf2/lib64/, while cmake for the lib
searches BUILD/external/otf2/lib and cannot find it.

My fix sets the location to always match CMAKE_INSTALL_LIBDIR

Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>

[ROCm/rocprofiler-sdk commit: 271f017251]
2025-01-08 22:47:44 -06:00
Galantsev, Dmitrii 271f017251 OTF2 - Fix lib vs lib64 location on some systems (#68)
On my dev machine I use OpenSUSE Tumbleweed. For some reason OTF2 gets
installed into BUILD/external/otf2/lib64/, while cmake for the lib
searches BUILD/external/otf2/lib and cannot find it.

My fix sets the location to always match CMAKE_INSTALL_LIBDIR

Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2025-01-08 22:47:44 -06:00
Scaffidi, Salvatore 3793be7735 [SWDEV-463406] Update API with fields for gfx_clock_below_host_limit and low_utilization violations
Updated API with fields for gfx_clock_below_host_limit and low_utilization violations
Change-Id: I25647bae6e7b785f44dab024272767658688bcad

---------
Signed-off-by: Scaffidi, Salvatore <Salvatore.Scaffidi@amd.com>
Signed-off-by: Arif, Maisam <Maisam.Arif@amd.com>
Co-authored-by: Charis Poag <Charis.Poag@amd.com>
2025-01-08 22:07:23 -06:00
Scaffidi, Salvatore 6eeb06927d [SWDEV-463406] Update API with fields for gfx_clock_below_host_limit and low_utilization violations
Updated API with fields for gfx_clock_below_host_limit and low_utilization violations
Change-Id: I25647bae6e7b785f44dab024272767658688bcad

---------
Signed-off-by: Scaffidi, Salvatore <Salvatore.Scaffidi@amd.com>
Signed-off-by: Arif, Maisam <Maisam.Arif@amd.com>
Co-authored-by: Charis Poag <Charis.Poag@amd.com>


[ROCm/amdsmi commit: 3793be7735]
2025-01-08 22:07:23 -06:00
Madsen, Jonathan 247ba0afa1 Download perfetto trace_processor_shell (#105)
* Download perfetto trace_processor_shell

* Upgrade to perfetto-trace-processor-shell v0.0.4

* Fix run-ci.py warning

- warning message:

CMake Warning (dev) at /.../build/CTestCustom.cmake:16:
  Syntax Warning in cmake code at column 77
  Argument not separated from preceding token by whitespace.

* Update tests/pytest-packages/pytest_utils/perfetto_reader.py

---------

Co-authored-by: Jonathan R. Madsen <jonathanrmadsen@gmail.com>

[ROCm/rocprofiler-sdk commit: 2c3bdeaed9]
2025-01-08 20:32:48 -06:00
Madsen, Jonathan 2c3bdeaed9 Download perfetto trace_processor_shell (#105)
* Download perfetto trace_processor_shell

* Upgrade to perfetto-trace-processor-shell v0.0.4

* Fix run-ci.py warning

- warning message:

CMake Warning (dev) at /.../build/CTestCustom.cmake:16:
  Syntax Warning in cmake code at column 77
  Argument not separated from preceding token by whitespace.

* Update tests/pytest-packages/pytest_utils/perfetto_reader.py

---------

Co-authored-by: Jonathan R. Madsen <jonathanrmadsen@gmail.com>
2025-01-08 20:32:48 -06:00
Evgenii Averin ef2a812d0a SWDEV-505769 - Fix typo
Change-Id: I2d3f65ed68157718c4439a9da7d2dcdfcbb9f93d


[ROCm/clr commit: b62995ce1a]
2025-01-08 21:31:17 -05:00
Evgenii Averin b62995ce1a SWDEV-505769 - Fix typo
Change-Id: I2d3f65ed68157718c4439a9da7d2dcdfcbb9f93d
2025-01-08 21:31:17 -05:00
Tim Huang 7bad0cb4a1 kfdtest: add blacklist for gfx1153
Change-Id: I1f132858cb79c6d0561477fe8ce69aafd93ad351
Signed-off-by: Tim Huang <tim.huang@amd.com>
2025-01-08 21:20:17 -05:00
Tim Huang 910ccbbd32 kfdtest: add blacklist for gfx1153
Change-Id: I1f132858cb79c6d0561477fe8ce69aafd93ad351
Signed-off-by: Tim Huang <tim.huang@amd.com>


[ROCm/ROCR-Runtime commit: 7bad0cb4a1]
2025-01-08 21:20:17 -05:00
Arif, Maisam 490132748f Corrected spacing and simplified logic
Change-Id: I51c98339367d1cb9470a00ee05463ac8662d6b01

Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
2025-01-08 20:18:24 -06:00
Arif, Maisam c563c9c8d5 Corrected spacing and simplified logic
Change-Id: I51c98339367d1cb9470a00ee05463ac8662d6b01

Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>

[ROCm/amdsmi commit: 490132748f]
2025-01-08 20:18:24 -06:00
Galantsev, Dmitrii 5861ec7663 RVS - Add IET and PEBB tests
Change-Id: Ia032901d74c882e5cbfa5a3164199cd4d571341f
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2025-01-08 18:23:13 -06:00
Galantsev, Dmitrii b78295c8f8 RVS - Add IET and PEBB tests
Change-Id: Ia032901d74c882e5cbfa5a3164199cd4d571341f
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rdc commit: 5861ec7663]
2025-01-08 18:23:13 -06:00
Galantsev, Dmitrii b058cbecf1 RVS - Add memory bandwidth test
Change-Id: I4c8990170861f6a0f3853615db68634fdaa7a622
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2025-01-08 18:23:13 -06:00
Galantsev, Dmitrii 9d32387925 RVS - Add memory bandwidth test
Change-Id: I4c8990170861f6a0f3853615db68634fdaa7a622
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rdc commit: b058cbecf1]
2025-01-08 18:23:13 -06:00
David Belanger 9667af97d9 kfdtest: Add ExtendedCuMasking test case
New implementation of CU mask testing that focuses on correctness of
masking.  Unlike previous implementations, this new implementation does not
rely on performance measurements to decide on the results of the test.
Instead, this implementation checks if waves were executed on all the CUs
enabled and only the CUs enabled.

Test case initially supported on GFX12.

Signed-off-by: David Belanger <david.belanger@amd.com>
Change-Id: I5af8b890179bc9a415fc7f47e736f4971fc40c4a
2025-01-08 17:36:59 -05:00
David Belanger 80523eef97 kfdtest: Add ExtendedCuMasking test case
New implementation of CU mask testing that focuses on correctness of
masking.  Unlike previous implementations, this new implementation does not
rely on performance measurements to decide on the results of the test.
Instead, this implementation checks if waves were executed on all the CUs
enabled and only the CUs enabled.

Test case initially supported on GFX12.

Signed-off-by: David Belanger <david.belanger@amd.com>
Change-Id: I5af8b890179bc9a415fc7f47e736f4971fc40c4a


[ROCm/ROCR-Runtime commit: 9667af97d9]
2025-01-08 17:36:59 -05:00
Kanangot Balakrishnan, Bindhiya d0e770ffbc SWDEV-504130 Add temperature violation status to amd-smi monitor (#2)
Added boolean temperature violation status to amd-smi monitor.

Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>
2025-01-08 16:35:53 -06:00
Kanangot Balakrishnan, Bindhiya 67d5b8568a SWDEV-504130 Add temperature violation status to amd-smi monitor (#2)
Added boolean temperature violation status to amd-smi monitor.

Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>

[ROCm/amdsmi commit: d0e770ffbc]
2025-01-08 16:35:53 -06:00
Pham, Gabriel 129ad8ffad [SWDEV-502523] Made amd-smi reset command arguments mutually exclusive
Made reset arguments mutually exclusive so that users can only 
select one option at a time to prevent throwing of errors.

---------
Signed-off-by: Pham, Gabriel <Gabriel.Pham@amd.com>
2025-01-08 16:24:05 -06:00
Pham, Gabriel 9e4aa3a2e1 [SWDEV-502523] Made amd-smi reset command arguments mutually exclusive
Made reset arguments mutually exclusive so that users can only 
select one option at a time to prevent throwing of errors.

---------
Signed-off-by: Pham, Gabriel <Gabriel.Pham@amd.com>

[ROCm/amdsmi commit: 129ad8ffad]
2025-01-08 16:24:05 -06:00
Sourabh Betigeri 36f3d7647c SWDEV-505971 - Fix size mismatch of count type to uint32_t
Change-Id: Ie526f828f816e6681ef1735d5edb2db895dace57


[ROCm/clr commit: f5b2516f5d]
2025-01-08 12:47:36 -05:00
Sourabh Betigeri f5b2516f5d SWDEV-505971 - Fix size mismatch of count type to uint32_t
Change-Id: Ie526f828f816e6681ef1735d5edb2db895dace57
2025-01-08 12:47:36 -05:00
Elwazir, Ammar be43e753c6 Update Github Workflows (#2)
* Update sync-mainline.yaml

* Update sync-staging.yaml

* Update formatting.yml

[ROCm/rocprofiler-register commit: 11c9259043]
2025-01-08 09:50:04 -06:00
Elwazir, Ammar 11c9259043 Update Github Workflows (#2)
* Update sync-mainline.yaml

* Update sync-staging.yaml

* Update formatting.yml
2025-01-08 09:50:04 -06:00
Saleel Kudchadker d4594531ef SWDEV-506251 - Disable blit copy thresold for OpenCL
Change-Id: Id0ca43b13d5792791a42da263f6aa4496382cea6


[ROCm/clr commit: 39801b5750]
2025-01-08 02:46:01 +00:00
Saleel Kudchadker 39801b5750 SWDEV-506251 - Disable blit copy thresold for OpenCL
Change-Id: Id0ca43b13d5792791a42da263f6aa4496382cea6
2025-01-08 02:46:01 +00:00
Castillo, Juan 60492e754f [SWDEV-495169] Update err output to log_err (#24)
Update status type for EPERM and ENOENT based on feedback from ticket.
Update error output to LOG_ERR.

---------

Signed-off-by: Juan Castillo <juan.castillo@amd.com>
2025-01-07 17:35:39 -06:00
Castillo, Juan 90e148b499 [SWDEV-495169] Update err output to log_err (#24)
Update status type for EPERM and ENOENT based on feedback from ticket.
Update error output to LOG_ERR.

---------

Signed-off-by: Juan Castillo <juan.castillo@amd.com>

[ROCm/amdsmi commit: 60492e754f]
2025-01-07 17:35:39 -06:00
Williams, Justin 7323881957 [SWDEV-479339/SWDEV-498804] Added AMDSMI Dockerfile (#35)
Updated AMDSMI Dockerfile

Signed-off-by: Justin Williams <Justin.Williams@amd.com>
2025-01-07 17:28:16 -06:00
Williams, Justin bfcf37705d [SWDEV-479339/SWDEV-498804] Added AMDSMI Dockerfile (#35)
Updated AMDSMI Dockerfile

Signed-off-by: Justin Williams <Justin.Williams@amd.com>


[ROCm/amdsmi commit: 7323881957]
2025-01-07 17:28:16 -06:00
Meng, Li (Jassmine) dc400d916e [SWDEV-230863] add two new interfaces for background health check (#4)
1. Get the bad pages threshold of a processor.
2. Verify the checksum of RAS EEPROM

Signed-off-by: Meng Li <li.meng@amd.com>
2025-01-07 17:26:55 -06:00
Meng, Li (Jassmine) 1872c123d8 [SWDEV-230863] add two new interfaces for background health check (#4)
1. Get the bad pages threshold of a processor.
2. Verify the checksum of RAS EEPROM

Signed-off-by: Meng Li <li.meng@amd.com>

[ROCm/amdsmi commit: dc400d916e]
2025-01-07 17:26:55 -06:00
Huang, Tim d32f2a109a Add rust bindings for amdsmi c interface (#14)
It consists of two main steps:

1. Generating Bindings with `bindgen`:
- The `build.rs` script uses `bindgen` to generate Rust FFI (Foreign
Function Interface) bindings for the AMD SMI C library. This step
automatically exports all enums, structs, unions, and unsafe functions
from the C library into Rust. This provides a comprehensive low-level
interface to the AMD SMI library.

2. Implementing Safe Rust Wrappers:
- The generated bindings are then wrapped in safe Rust functions. These
safe wrappers handle error checking, resource management, and provide a
more idiomatic Rust interface. This ensures that users of the library
can interact with the AMD SMI functions without dealing with unsafe code
directly.

Change-Id: I7d5e49e59826164fc911ced04ef7ca5706b7cc05

Signed-off-by: Tim Huang <tim.huang@amd.com>
2025-01-07 17:19:46 -06:00
Huang, Tim 5e82aac4f8 Add rust bindings for amdsmi c interface (#14)
It consists of two main steps:

1. Generating Bindings with `bindgen`:
- The `build.rs` script uses `bindgen` to generate Rust FFI (Foreign
Function Interface) bindings for the AMD SMI C library. This step
automatically exports all enums, structs, unions, and unsafe functions
from the C library into Rust. This provides a comprehensive low-level
interface to the AMD SMI library.

2. Implementing Safe Rust Wrappers:
- The generated bindings are then wrapped in safe Rust functions. These
safe wrappers handle error checking, resource management, and provide a
more idiomatic Rust interface. This ensures that users of the library
can interact with the AMD SMI functions without dealing with unsafe code
directly.

Change-Id: I7d5e49e59826164fc911ced04ef7ca5706b7cc05

Signed-off-by: Tim Huang <tim.huang@amd.com>

[ROCm/amdsmi commit: d32f2a109a]
2025-01-07 17:19:46 -06:00
Kanangot Balakrishnan, Bindhiya 3897670757 [SWDEV-439701] Fix wrong error handling in MissingParameterValue (#32)
Error handling was not displaying the missing parameter details in
argument type validator functions. Fixed this by passing param name to
AmdSmiMissingParameterValueException.

Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>
2025-01-07 17:13:00 -06:00
Kanangot Balakrishnan, Bindhiya a1d60ef088 [SWDEV-439701] Fix wrong error handling in MissingParameterValue (#32)
Error handling was not displaying the missing parameter details in
argument type validator functions. Fixed this by passing param name to
AmdSmiMissingParameterValueException.

Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>

[ROCm/amdsmi commit: 3897670757]
2025-01-07 17:13:00 -06:00
Pham, Gabriel 5ed340c08b [SWDEV-502523] made set gpu arguments mutually exclusive (#31)
Signed-off-by: Pham, Gabriel <Gabriel.Pham@amd.com>
2025-01-07 16:48:01 -06:00