Commit Graph

1172 Commits

Author SHA1 Message Date
Saleel Kudchadker ae7e2ecb85 SWDEV-510186 - Improve logging of kernel names
- Demangle kernel names in logs

Change-Id: I9aa58e8c109becb45ef7fc747d991bd657c4190a


[ROCm/clr commit: 9b7e0ad48a]
2025-01-24 11:43:02 -05:00
taosang2 590465543d SWDEV-507969 - Fix wrong VGPRs for some devices
Change-Id: Ia8fc19564272e2c7171d991376bf896a99085a97


[ROCm/clr commit: 799e54aa0d]
2025-01-22 10:11:47 -05:00
Jatin Chaudhary 0795f00a14 SWDEV-341217 - Initial work to use SPIRV in HIP
Change-Id: If5c09b5e86b498e7ac5eb05adf28cb7a1fac8101


[ROCm/clr commit: 6a5d19059d]
2025-01-20 03:54:23 -05:00
Aidan Belton-Schure dc2fa93f37 SWDEV-482851 - Do not release last suballocator chunk
Change-Id: Ib28dc9df68e454ee0c0c699c1ff17588fd55f802


[ROCm/clr commit: 451b0ce768]
2025-01-13 10:14:40 -05:00
Daniel Livingston 50387f6eb5 SWDEV-489003 - [Ubertrace] OCL/HIP profiles are missing event instrumentation
Adds UberTrace support for pre-dispatch markers and barrier begin/end markers.

Moves shared definitions out of palgpuopen.hpp into shared header
palcapturemgr.hpp.

Change-Id: I9f464c689e7ff12c54eca043fc1ad65e1836a64f


[ROCm/clr commit: 541c449ce2]
2025-01-10 11:28:52 -05:00
Anusha GodavarthySurya 08c92f4793 SWDEV-480209 - Make internal callbacks non-blocking
Change-Id: Ic918d08f341abfd9a7c167d09f9c723cdc43157f


[ROCm/clr commit: 683a942364]
2025-01-10 02:16:11 -05:00
Saleel Kudchadker 16f14e4b00 SWDEV-504494 - Use system scope for D2H
- When using shader copy, make sure to use release scope for the AQL
  packet. This is a potential bug but is hidden as hipMemcpyAsync always
needs synchronization(which inserts a barrier with release scope). For
hipMemcpy we use a barrier packet to make sure its blocking. Eitherways
a barrier gets always used and hides in some ways a potential bug.

Change-Id: I57fb7f769c3179e76d712471c0905104c801d7ba


[ROCm/clr commit: c9dd95bf6c]
2025-01-10 00:34:08 -05:00
Evgenii Averin ef2a812d0a SWDEV-505769 - Fix typo
Change-Id: I2d3f65ed68157718c4439a9da7d2dcdfcbb9f93d


[ROCm/clr commit: b62995ce1a]
2025-01-08 21:31:17 -05:00
Sourabh Betigeri 36f3d7647c SWDEV-505971 - Fix size mismatch of count type to uint32_t
Change-Id: Ie526f828f816e6681ef1735d5edb2db895dace57


[ROCm/clr commit: f5b2516f5d]
2025-01-08 12:47:36 -05:00
Saleel Kudchadker d4594531ef SWDEV-506251 - Disable blit copy thresold for OpenCL
Change-Id: Id0ca43b13d5792791a42da263f6aa4496382cea6


[ROCm/clr commit: 39801b5750]
2025-01-08 02:46:01 +00:00
Saleel Kudchadker a18f2c549c SWDEV-504494 - Flush to systemscope when copying non-coherent mem
- When we use blit(compute) copies, two subsequent copies may read for
  the same source buffer, the buffer may get modified by the host in
between and if the src buffer was allocated with non-coherent flag, the
device may simply use stale value from previous cacheline fetch. This is
a corner case.

Change-Id: I2ce261c6f6fa4e5bb608f116548e5cc711ae6f3c


[ROCm/clr commit: b63005d550]
2025-01-07 12:49:22 -05:00
Jatin Jaikishan Chaudhary 8b1d0cff83 Revert "SWDEV-505971 - change setArgument arg from uint32_t to uint64_t"
This reverts commit 0830d95f6d.

Reason for revert: There needs to be memcpy size change

Change-Id: If4f51769731e54743ac705b19b4f81b2d5925d5a


[ROCm/clr commit: 446ed661a0]
2025-01-06 18:03:23 -05:00
Jatin Chaudhary 0830d95f6d SWDEV-505971 - change setArgument arg from uint32_t to uint64_t
We are passing this arg as an address, and memcpy complains about
overreading (8 bytes instead of 4).

Change-Id: Ica9207f6c5f6056a4bfc968280c76e779ded13ae


[ROCm/clr commit: a6f2a2c2af]
2025-01-06 08:16:59 -05:00
Pengda Xie 612ae28524 SWDEV-505833 - Provide functionality to avoid L2 flush for CPX mode for dispatch packets
- Added DEBUG_CLR_SKIP_RELEASE_SCOPE flag to force release scope to
   SCOPE_NONE in AQL packet header

Change-Id: Ife02cddb9d5cd4749103ce585d3d5fe9024c6868


[ROCm/clr commit: 8155943c5f]
2025-01-03 17:28:21 -05:00
Amit Pandey 81a25f9614 SWDEV-490256 - Fix uri_decode logic to handle Memory URI.
Uri decoder logic currently silently ignores processing of memory uri.
This patch enables the existing logic to handle the processing of offset
and size related to loaded code-object having memory URI.

Change-Id: If03579cefb11d91f667410464dc89404df9270a3


[ROCm/clr commit: 11cd37ce0b]
2024-12-25 11:07:16 -05:00
taosang2 da613fbbeb SWDEV-479958 - Support different address mode
Support different address modes in X, Y, Z directions

Change-Id: If1db5a8af33c92dd14b48968c3e8eceb97daea6c


[ROCm/clr commit: d82d6a78cf]
2024-12-23 16:39:54 -05:00
Saleel Kudchadker fda4ff1f9d SWDEV-504340 - Move cast of cl_mem inside the condition
Change-Id: I9c91f5d945a8d8bd2b2f55e3d11ede66afe4eef7


[ROCm/clr commit: fa63919a63]
2024-12-17 12:58:12 -05:00
Pengda Xie 17c7b3b270 SWDEV-503764 - Add wptr and rptr to ClPrint for dispatch barrier methods
- added wptr and rptr to ClPrint in dispatchBarrierPacket and dispatchBarrierValuePacket

Change-Id: I8a62289deb23c9f657a9b0ac6138bb55eafecba2


[ROCm/clr commit: 078fe7e5de]
2024-12-16 16:45:30 -05:00
Ioannis Assiouras 7670376748 SWDEV-489255 - Update stack size limit in rocvirtual
Change-Id: I2aac9d211f64b3d6c121d8b010d215dcbdeac3aa


[ROCm/clr commit: a808c4b23a]
2024-12-16 09:30:39 -05:00
Saleel Kudchadker 5255fd1fa3 SWDEV-301667 - Clear dispatch indicator signal flag
Change-Id: I9028df0bb73289791d169e7f064a1d0f615236a5


[ROCm/clr commit: 93f1e8ff60]
2024-12-12 21:20:05 -05:00
Sourabh Betigeri 7261404002 SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs
Change-Id: I5ac63a6626af8c2b4ac382c52dfe1aaf0b3716b8


[ROCm/clr commit: 03dbcd8ca7]
2024-12-12 19:29:24 -05:00
Tao Sang fb76b9620c SWDEV-496667 - Support gfx9-4-generic target
Support gfx9-4-generic target to cover mi3XX.
Support features sramecc and xnack in generic target.
Improve some code formats.
Add more log on compiler.

Change-Id: I6b3c6af55c60cffd43ce6f17b75998f751b75713


[ROCm/clr commit: 3ad8f1b811]
2024-12-12 14:43:39 -05:00
Michael Xie 945ae82918 SWDEV-499997 - Unify ManagedBuffer and KernelArg buffer implementation
Change-Id: I95421c87904dd62d7ee214539a57c7bda1097ff4


[ROCm/clr commit: cfcc743824]
2024-12-12 12:56:23 -05:00
Saleel Kudchadker 954c43d798 SWDEV-503761 - Reintroduce save-temps path for OpenCL
Change-Id: I5e111047242aed7d982b7a25c11ab52293af639d


[ROCm/clr commit: 23c21d5181]
2024-12-11 13:01:29 -05:00
German Andryeyev 185e95ae81 SWDEV-501757 - Clean-up signal creation
Use hsa_amd_signal_create() if settings.system_scope_signal_ is true.

Change-Id: I6d440155dfbcd5bf03658583a93827cb1c56537c


[ROCm/clr commit: 14f58fc74d]
2024-12-11 09:57:50 -05:00
Gerardo Hernandez d96c631de0 SWDEV-496392 - Remove references to ASIC Polaris22 in pal::Settings and pal::Device (it is being retired)
Change-Id: I6318abf3e46ed250d087a3d2266d2ae3d4c8c000


[ROCm/clr commit: 03e4057fce]
2024-12-10 06:01:32 -05:00
German Andryeyev 6604accdb3 SWDEV-501757 - Use signals without interrupts
In active wait mode use signals without interrupts by default and switch
to the interrupts only if a callback is required.

Change-Id: Ibcde8f7d44c70f8fb8fa5e0a7fdd8b08a2982a8e


[ROCm/clr commit: f4b9d3b7bd]
2024-12-09 15:16:15 -05:00
Ajay 7346f3bd29 SWDEV-498474 - APU: when total allocated is greater than 75% of invisible
Only when memory type is Local and the invisible memory is +ve
Should also fix SWDEV-490991

Change-Id: I78a4925a234ba90c63909bde5b7dc217568b4de3


[ROCm/clr commit: 7d763fb803]
2024-12-09 12:06:57 -05:00
Saleel Kudchadker 7d7aa8b69c SWDEV-497145 - Use rocr copyOnEngine API for staged copies
- Refactor blit code and clean ASAN instrumentation
- Use unified function for rocr copy
- Enable shader copy path for unpinned writeBuffer/readBuffer paths
- Set GPU_FORCE_BLIT_COPY_SIZE=16 which means we will use BLIT copy for
  pinned copies or unpinned H2D/D2H copies < 16KB

Change-Id: I42045cca79234b340dbf53dafb93044199736ae4


[ROCm/clr commit: 7863eb92dc]
2024-12-04 13:38:13 -05:00
Jimbo Xie 91a8ee1a96 SWDEV-485672 - LOG_INFO corrected to LOG_ERROR for errors
Change-Id: I8ab5f2117dfd7725bd4ed8b178e370096aa31018


[ROCm/clr commit: 6c755a4116]
2024-12-04 01:18:01 -05:00
Sourabh Betigeri 1712acdd2e Revert "SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs"
This reverts commit ab0ff9163d.

Reason for revert: hipInfo fails on windows. Updating llvm amd-mainline-closed

Change-Id: I57e1fa1945188b0bc0a799c4f3d540f2b7713003


[ROCm/clr commit: 2ca644cf22]
2024-12-02 16:46:12 -05:00
Aidan Belton-Schure 838cfe1d29 SWDEV-485827 release hostcall listener memory regardless of thread status
The early return if the thread is not alive causes memory leaks.
Neither doorbell_ or urilocator are released if the thread is not alive.

This change alters the logic so regardless of the thread status the
HostcallListener releases its memory.

Change-Id: Ie912360ec0e2ee257de9937b1a8d7375e6aebd83


[ROCm/clr commit: f0063ba8da]
2024-12-02 04:42:56 -05:00
Sourabh Betigeri ab0ff9163d SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs
Change-Id: I449ffca44bbb04d13348d112e896d603c70fd485


[ROCm/clr commit: bd5d8e9baf]
2024-11-30 17:54:32 -05:00
taosang2 f3e3d8178b SWDEV-447973 - Support generic targets
Change-Id: I32db83843e45e0f013591493aafd7a532c881e16


[ROCm/clr commit: f1f4f40c5b]
2024-11-29 10:12:10 -05:00
Anusha GodavarthySurya c34f55babb SWDEV-489084 - Avoid using queue colliding with the graph launch stream
Change-Id: I3ecaf8836c8e0883441275139041c702aba0937e


[ROCm/clr commit: 06e6561eb5]
2024-11-29 08:15:58 -05:00
Aidan Belton-Schure c59a9b3253 SWDEV-485827 release initial_heap_buffer_
This PR adds the initialization and release of initial_heap_buffer_
to prevent memory leaks.

Change-Id: I4ab8721b439a1a3a6f6e53d63d870e572f7c984a


[ROCm/clr commit: f42a87dc2f]
2024-11-28 10:31:26 -05:00
Anusha GodavarthySurya 04cc0ceeb1 SWDEV-491643 - AQL packets are captured for kernels disable sdma profiling
hsa_amd_profiling_async_copy_enable is taking 45us for the first call. Disable sdma profiling for enqueuing captured kernel packets and for accumulate command.
Change-Id: I80b51a58c46bccc9c1025e9331515f57c97b5a2a


[ROCm/clr commit: 9820480cbd]
2024-11-26 08:37:31 -05:00
Jaydeep Patel 177ef6b6f8 SWDEV-498816 - Detached thread might exit and pthread_t is invalid access to check if it is valid or not.
Hence, It is not required to check it if thread is already finished processing packets.

Change-Id: If1b43a169a06203f3e1ab0529cf592879496d7c4


[ROCm/clr commit: 3f3f3d0f1c]
2024-11-24 01:38:47 -05:00
Ioannis Assiouras a22553fb33 SWDEV-494409 - Fixed segfault caused by aligned_free called on unaligned memory
Change-Id: I8ddea5c309b568db25c92789bf71be341d19c3ba


[ROCm/clr commit: 2cc9f59774]
2024-11-22 03:08:04 +00:00
Saleel Kudchadker 7d8304e100 SWDEV-497886 - Fix unaligned size copy for kernel args
Change-Id: If6675b98178aeb35f376d6994555cbf941b048c3


[ROCm/clr commit: 2273a1dbdc]
2024-11-21 14:30:04 -05:00
German Andryeyev ca8ca0bc35 SWDEV-494231 - Revert TS optimization
Runtime may use checkGpuTime() for the wait and not just for the GPU time queries. Hence, the call can't be skipped if profiling isn't enabled.
More changes are required for this optimization.

Change-Id: I79e8918312e755d75f0d26685f2fdc604a8ffb18


[ROCm/clr commit: e2eeb20c00]
2024-11-19 10:17:38 -05:00
Saleel Kudchadker 4f83e7775a SWDEV-495987 - Use shared mutex for MemObj maps
- Remove binning logic, although useful it doesnt work in current
  scenario as there is no upper limit on the size of allocation. If an
app or framework uses entire VRAM and then creates suballocs, binning
would result in failure.

Change-Id: Icc27c13e433bb4a1f03e82028d8718488b43bfa5


[ROCm/clr commit: e4d29e228d]
2024-11-19 04:28:20 -05:00
Saleel Kudchadker 35201ff32d SWDEV-483586 - Do not take pinned path for read/write
- When GPU_FORCE_BLIT_COPY_SIZE is set do not take pinned path

Change-Id: Iaa065db63cc8fda61f82e6c9701e9fdaec5c54cb


[ROCm/clr commit: f1e98ab6e4]
2024-11-01 12:55:15 -04:00
Satyanvesh Dittakavi 01c73b561f SWDEV-491967 - Add the right VGPRs per SIMD and VGPR Granularity for gfx12
- Default values are being assigned causing occupancy calculation to go
wrong without the right values defined for gfx12 ASICs
- Also added the these values for gfx1105

Change-Id: I611cc3a8ed8c57f2def637310ce1c3a48c16a574


[ROCm/clr commit: a26dc29eb9]
2024-11-01 12:47:23 -04:00
Konstantin Zhuravlyov 04628d2d1f SWDEV-428601 - Don't enforce 1 isa per device in rocm backend
- Device can have multiple isas as per HSA spec
  - First isa is most specific one, so this change is sort of a NOP

Change-Id: Ib332af21745f2e6a7c25db8986bf7717501059bc


[ROCm/clr commit: 3387f48b56]
2024-11-01 11:01:02 -04:00
Jaydeep Patel 0f77eeaace SWDEV-491149 - OCL does not need to update scratch as it can't update stack size using API unlike hipDeviceSetLimit.
for HIP, Update should be only if compiler notifies use of stack size.

Change-Id: Ic781bcac6fcf586da39ec4aafd4809da3652ede3


[ROCm/clr commit: 4aa52155ee]
2024-11-01 01:05:07 -04:00
Alex Xie e751f00ca2 SWDEV-489468 - make resource cache bigger for APU
Change-Id: I065c712acd06c273a0b194fe792ec4f876fa9c46


[ROCm/clr commit: f8c56f6bac]
2024-10-31 09:55:01 -04:00
Tao Sang 2cce18fb38 SWDEV-492563 - Fix Ocl issues
1. Fix LDSSize type to be uint32_t.
2. Prevent clWaitForEvents running on complete events whose
   HostQueue have been destructed.

Change-Id: I829e915f56b37db2ba76bb876c9656166534f154


[ROCm/clr commit: 82dff9a67d]
2024-10-30 19:15:59 -04:00
Saleel Kudchadker a2b25be61c SWDEV-491375 - Improve MemObjMap perf
- Create bins each with its own map and lock. This would help cases
where the hash of a VA is differnet than ther one which falls in
different bin, and there is no lock contention
- Use STL shared mutexes, that way we can unique_lock for map updates
vs simple reads which can use shared_lock

Change-Id: I118818be65c6373700f5e511045babb6a398938a


[ROCm/clr commit: e23ff0520b]
2024-10-30 05:37:33 +00:00
German Andryeyev 3191f8e942 SWDEV-486602 - Add tracking of HSA handlers
Add an atomic counter to track the outstanding HSA handlers.
Wait on CPU for the callbacks if the number exceeds the value
in DEBUG_HIP_BLOCK_SYNC env variable.

Change-Id: I95dc8c4bf0258c7e59411b7504220709ed6898c5


[ROCm/clr commit: 403f624bf8]
2024-10-25 15:20:50 -04:00