Commit graph

149 Commits

Autor SHA1 Nachricht Datum
Emily Deng 46bb10ff2d kfdtest: Fix DeviceSnapshot return fail error for KFDDBGTest.HitMemoryViolation
For the case that the child goes to the second raise(SIGSTOP),
and parent sends PTRACE_CONT, than child exits. Parent will assert at
DeviceSnapshot, as in kfd_ioctl, couldn't get the mm from child pid.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>


[ROCm/ROCR-Runtime commit: 91ef44d3ec]
2025-03-13 13:38:46 +08:00
Apurv Mishra 1e279a19c3 kfdtest: limit GFX VRAM allocation to 1/4 sys mem
reduce the allocated memory for GFX VRAM as
KFD Evict test faced intermittent page faults,
which can be due to larger GFX CS BO size


[ROCm/ROCR-Runtime commit: 85c4b0020a]
2025-03-12 13:54:04 -04:00
Apurv Mishra 77f4bbfdf1 kfdtest: add blacklist for RHEL9 system
add tests for exclusion when running kfdtest
on RHEL9 system, tested with Navi 31

Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>


[ROCm/ROCR-Runtime commit: de8f8f076d]
2025-03-11 16:40:25 -04:00
Longlong Yao ef1740b88b libhsakmt: set node_id to 0 for OnlyAddress
Signed-off-by: Longlong Yao <Longlong.Yao@amd.com>


[ROCm/ROCR-Runtime commit: 5916467552]
2025-03-11 10:16:58 -04:00
Amber Lin fffdffc3ce kfdtest: Temporarily blacklist KFDNegativeTest
Blacklist KFDNegativeTest.BasicPipeReset from gfx950 until MEC can
support pipe reset on GC 9.5.0.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: fcf3f91379]
2025-03-10 10:37:19 -07:00
Jonathan Kim 8cbb23183c kfdtest: Add KFD SDMA queue reset testing
The KFD can per-SDMA queue reset similar to compute queue reset.
Add test.


[ROCm/ROCR-Runtime commit: c879fdefcf]
2025-03-06 14:04:42 -05:00
Jonathan Kim 36c69a6cff kfdtest: Add KFD SDMA queue reset testing
The KFD can per-SDMA queue reset similar to compute queue reset.
Add test.


[ROCm/ROCR-Runtime commit: ee890e7d2b]
2025-03-06 14:04:42 -05:00
Jonathan Kim 06b2c3aeb6 kfdtest: Allow user to modify packet size for SDMA write packets
This is primarily used for debug and negative testing for SDMA queue
reset and shouldn't be used for normal run cases.


[ROCm/ROCR-Runtime commit: d047708317]
2025-03-06 14:04:42 -05:00
Jonathan Kim 297e8f729e kfdtest: Add create SDMA queue by target engine
KFD supports SDMA queue creation by target engine.
Enable this for testing.


[ROCm/ROCR-Runtime commit: 9e57ce48e8]
2025-03-06 14:04:42 -05:00
Jonathan Kim 303cdb8f7e kfdtest: Add SDMA poll memory register packet support
The SDMA can wait on poll user memory.  This is being added to
support per-SDMA queue reset testing.


[ROCm/ROCR-Runtime commit: a957b24153]
2025-03-06 14:04:42 -05:00
Jonathan Kim 599a20ee2d hsakmt: Expose per-SDMA queue reset capabilities
Expose new capabilities field that flags per-sdma queue reset
support.


[ROCm/ROCR-Runtime commit: e3d09e30dc]
2025-03-06 14:04:42 -05:00
David Belanger 2c11a41adc kfdtest: Fix ExtendedCuMasking test case
Modify test case to support XL cards.

Change-Id: I6ad45a290d50a5238804ce7417bcdb33a3912872
Signed-off-by: David Belanger <david.belanger@amd.com>


[ROCm/ROCR-Runtime commit: 3ceb131df5]
2025-02-27 21:25:19 -05:00
James Zhu b42578b070 kfdtest: fix resource leakage
Resource allocated in SetUp/HsaNodeInfo::Init,
needs be delete in TearDown/HsaNodeInfo::Delete.

Signed-off-by: James Zhu <James.Zhu@amd.com>


[ROCm/ROCR-Runtime commit: f8d8b8011f]
2025-02-24 19:38:59 -05:00
Longlong Yao 082c6b7830 libhsakmt: allocate va in host path
Change-Id: I40a4395aca99ea8dfd8ff0ecde64eb2c3840d867
Signed-off-by: Longlong Yao <Longlong.Yao@amd.com>


[ROCm/ROCR-Runtime commit: 26f001d3cb]
2025-02-15 07:56:45 -05:00
Harish Kasiviswanathan 729f98b05f libhsakmt: gfx950: Add option to enable HIGH_PRECISION
Environment variable HSA_HIGH_PRECISION_MODE can be used to control MFMA
precision

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: Ib78dd9dd8867025e090a3cca96ab6db4f65dea12


[ROCm/ROCR-Runtime commit: 2a64fa5e06]
2025-02-10 16:05:25 -05:00
sonadeem 02edf09f87 cmake: Fix BUILD_SHARED_LIBS option and README for it
BUILD_SHARED_LIBS is a global flag so we don't need to set a default
option for it in both libhsakmt and hsa-runtime, only the top level
CMakeLists file. Also updated README to reflect that libhsakmt is
always built statically and gets linked to libhsa-runtime.

Change-Id: I1511f68a268032bec9758bc731d8074f33ec980f


[ROCm/ROCR-Runtime commit: ff01f62777]
2025-01-30 14:17:27 -05:00
David Belanger 75a060fc53 kfdtest: Convert ExtendedCuMask test to multi-GPU framework
Convert test to use multi-GPU framework.

Add mutex to fix intermixed log issue and annotate logging with
gpu node number.

Signed-off-by: David Belanger <david.belanger@amd.com>
Change-Id: Ic2beeadb1eb4b5a9a0710ac1dbd60b9bf1d84c33


[ROCm/ROCR-Runtime commit: f24d789dee]
2025-01-30 11:41:00 -05:00
Sv. Lockal d1507361ec Fix build issues for musl libc (#267)
Change-Id: Ia31330b0f96669966712b58986abeca754c2cbb9


[ROCm/ROCR-Runtime commit: 5d04bd42f3]
2025-01-29 14:31:05 +00:00
Lang Yu 85125b1054 kfdtest: update AtomicIncIsa for gfx12
"s_waitcnt 0" (deprecated in gfx12) is redundant here.

s_endpgm will wait for all outstanding instructions
to complete before executing.

Change-Id: Ia8b4dd0fd8dd713e7ba2cba9db85b7b12cee1dd4
Signed-off-by: Lang Yu <lang.yu@amd.com>


[ROCm/ROCR-Runtime commit: d159b29dc6]
2025-01-28 20:32:41 -05:00
James Zhu 647b705679 libhsakmt: increase default svm.alignment_order
Since GFX950 can support page table fragment up to 18 without
performance loss. So set GFX950  default svm.alignment_order to 18.

Change-Id: Ibcdb7f041fb07a38e924c471beec261ea227ca1d
Signed-off-by: James Zhu <James.Zhu@amd.com>


[ROCm/ROCR-Runtime commit: 9509af4b98]
2025-01-28 08:27:19 -05:00
Amber Lin e262729f6f kfdtest: Create gfx950 blacklist
This patch creates the blacklist for gfx950 by copying gfx942 but adding
KFDGWSTest.Semaphore as GWS support is completely removed from gfx950.

Change-Id: I5d7c17e57b8cfd9fae63780ecc9dd55662cfdade
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 0b6e457201]
2025-01-28 08:26:44 -05:00
Lancelot Six a95209dde6 libhsakmt: gfx950 uses same VGPR block size as gfx940
Make sure to use allocate the same amount of size for VGPR data in
gfx950 as it is done for gfx940.

Change-Id: I6a0820996389627ccbdfef856e5150c46fac92a1
Signed-off-by: Lancelot SIX <lancelot.six@amd.com>


[ROCm/ROCR-Runtime commit: 76052ba028]
2025-01-27 14:06:42 -05:00
Lancelot Six c7b1fd714e libhsakmt: Use the node info to determine LDS size
The CWSR area size needs to take into account the size of LDS each
active workgroup can have.  The current implementation uses a constant
for that.  This patch refactors this to use the HsaNodeProperties of the
device's the CWSR area is for to figure out the size of LDS.

Change-Id: Ib8585b2b7140ec5c99e7b7d62e67f785697c028a
Signed-off-by: Lancelot Six <Lancelot.Six@amd.com>
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: c51aa0d155]
2025-01-26 21:46:32 -05:00
Alex Sierra da483d7588 kfdtest: add support for gfx9.5.0 in shader store
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I48b98ff631bd1aa1a044b60583ff256e43b17423


[ROCm/ROCR-Runtime commit: 268054cd28]
2025-01-26 21:45:07 -05:00
Alex Sierra 840a613723 kfdtest: Add gfx 9.5 as FAMILY_AV
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: Ib5696eee1d4f64c9c87d714eae7c80fbbd1e2b23


[ROCm/ROCR-Runtime commit: e94ff8a36c]
2025-01-26 21:43:55 -05:00
Tony Gutierrez e82871f20b rocr: Generalize driver discovery
Generalize the driver discovery and move driver-specific
functionality to the concrete driver implementations.
Currently, this process is tightly coupled to the hsakmt
which is GPU and OS specific.

Change-Id: Ie1c53fef407a71b5ec4c6eaf3a3ed00871184409


[ROCm/ROCR-Runtime commit: 15107afb11]
2025-01-23 15:09:14 -05:00
Shweta Khatri c5822cee5a Revert "Revert "hsakmt: Only set exec flag when requested""
This reverts commit 5a8092bccf.

Reason for revert: This will put back the change ID - Id1154f08f6ba21c633905fd46b06053994d6f3cc to ROCR repo, which will prevent memory allocations from being automatically granted the 'executable' flag, addressing previously -  incorrect and unsafe behavior in ROCm driver.

Change-Id: I3d45c45859929a80f7791681b411251e099a1901


[ROCm/ROCR-Runtime commit: 2d4a578020]
2025-01-23 09:08:25 -05:00
Apurv Mishra 4ea98d22c4 hsakmt: move 'counter_id' array to heap
local variable 'counter_id' exceeded the max single
use of stack, thus move to heap to prevent overflow

also, use of a contiguous memory block for 2D array
to reduce space complexity, add error messages for
NO_MEMORY exits and check MAX_COUNTER limit for IDs

Change-Id: Id0249ca767a336b31c759c693a82d3f5c950a2fa
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>


[ROCm/ROCR-Runtime commit: ecf57310ca]
2025-01-13 16:29:16 -05:00
Harish Kasiviswanathan e004ab79f5 kfdtest: Fix KFDASMTest failure on older ASICs
HW_REG_HW_ID1 is only available from gfx12 onwards

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: Ibf4bd62e01ada3dee6dd88762ccb853bab63ff87


[ROCm/ROCR-Runtime commit: 1d71975fcc]
2025-01-13 15:22:20 -05:00
Harish Kasiviswanathan 0c461ee74a kfdtest: Add gfx12 to TargetList for AssembleShaders
Add gfx12 so that it gets tested when KFDASMTest.AssembleShaders is run.
GWS support has been removed for gfx12. Modify shaders to take that into
account.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I70e87febb6388852ea54d69cf9201339a7910581


[ROCm/ROCR-Runtime commit: f8ae5c47ba]
2025-01-13 15:22:15 -05:00
Lang Yu 6c18e6188d kfdtest: consolidate LoopIsa
1, Initialize the registers before using them is the best practice.
Though the use case here doesn't care whether the registers are
initialized or not, some emulators complain the "read_before_write"
behavior. Initialize the registers used to silence these complaints.

2, Update s_wait stuff for gfx12.

Change-Id: I462b2b0b5017dd2876a5954169d3b6b2f1c2a75b
Signed-off-by: Lang Yu <lang.yu@amd.com>


[ROCm/ROCR-Runtime commit: fe5f12342d]
2025-01-10 21:27:23 -05:00
Kent Russell f256811bab kfdtest: Can't initialize variable-sized objects
Do a memset, since we can't initialize variable-sized objects

Change-Id: I57faf4a0581a29f9d30391aa387812c2b7bb5011
Signed-off-by: Kent Russell <kent.russell@amd.com>


[ROCm/ROCR-Runtime commit: cc7ff73e7f]
2025-01-09 10:36:06 -05:00
Tim Huang 910ccbbd32 kfdtest: add blacklist for gfx1153
Change-Id: I1f132858cb79c6d0561477fe8ce69aafd93ad351
Signed-off-by: Tim Huang <tim.huang@amd.com>


[ROCm/ROCR-Runtime commit: 7bad0cb4a1]
2025-01-08 21:20:17 -05:00
David Belanger 80523eef97 kfdtest: Add ExtendedCuMasking test case
New implementation of CU mask testing that focuses on correctness of
masking.  Unlike previous implementations, this new implementation does not
rely on performance measurements to decide on the results of the test.
Instead, this implementation checks if waves were executed on all the CUs
enabled and only the CUs enabled.

Test case initially supported on GFX12.

Signed-off-by: David Belanger <david.belanger@amd.com>
Change-Id: I5af8b890179bc9a415fc7f47e736f4971fc40c4a


[ROCm/ROCR-Runtime commit: 9667af97d9]
2025-01-08 17:36:59 -05:00
Kent Russell fba20de05e kfdtest: Explicitly include tuple in KFDCWSR
We can inherit it from gtest, but not in ASAN builds. And we should be
including what we use, instead of hoping to inherit it through other
headers

Change-Id: Id47ab06a57e1c71c88f72da5f21a71f37db8a2f3
Signed-off-by: Kent Russell <kent.russell@amd.com>


[ROCm/ROCR-Runtime commit: eda54222ea]
2025-01-07 13:57:36 -05:00
James Zhu bf1d1606c9 libhsakmt: add spm buffer header
to send data back to user.

Change-Id: If11fb4147e32c0eed319ccf76bcde9d76815ff67
Signed-off-by: James Zhu <James.Zhu@amd.com>


[ROCm/ROCR-Runtime commit: b07a80e505]
2025-01-06 14:40:05 -05:00
Xiaogang Chen 6c592fa29e kfdtest: fix a regession on KFDEvictTest test case
The kfdtest multi-gpu extension only allows using the first gpu(in topology
order) as default gpu for KFDEvictTest test case. We should allow user
to select any gpu in system as default gpu to run KFDEvictTest test case.

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: I8848771d92ae2812fbb96e917454ab3b4a71a2fa


[ROCm/ROCR-Runtime commit: eafa929520]
2024-12-18 10:13:54 -06:00
Xiaogang Chen c1158a6c76 kfdtest: update run_kfdtest.sh when HSA_TEST_GPUS_NUM is enable
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: I68e4f4f8fd7397d3b39b3473638836e4531bef2b


[ROCm/ROCR-Runtime commit: ec457752dc]
2024-12-16 12:47:50 -05:00
Xiaogang Chen 2c102990ae kfdtest: Convert KFDSVMRangeTest into multi-GPU test framework
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: Ia4d55c38576c39b3768a847c60d70bda88f65740


[ROCm/ROCR-Runtime commit: cbb38606e3]
2024-12-16 12:47:44 -05:00
Xiaogang Chen bebd577f6a kfdtest: Convert KFDLocalMemoryTest into multi-GPU test framework
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: Iaf20ec15e85ed10998e9735881d3c029abedd3a4


[ROCm/ROCR-Runtime commit: 641f1f797d]
2024-12-16 12:47:39 -05:00
Xiaogang Chen efa2d187f1 kfdtest: Convert KFDMemoryTest into multi-GPU test framework
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: I29d7fbb156a88b4df5be5f2fa0c20fbc47b108ed


[ROCm/ROCR-Runtime commit: 10c9b98f6e]
2024-12-16 12:47:34 -05:00
Xiaogang Chen 3925a57cf2 kfdtest: Convert KFDQMTest into multi-GPU test framework
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: Ia3582ab5b802ead4df267eeb280b8e7d37eb0ac2


[ROCm/ROCR-Runtime commit: f229605b06]
2024-12-16 12:47:28 -05:00
Xiaogang Chen 513fa002e3 kfdtest: Convert KFDExceptionTest into multi-GPU test framework
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: I545ac485d13a3a56a3b352926ec71daa5b074862


[ROCm/ROCR-Runtime commit: dbccf11ef8]
2024-12-16 12:47:21 -05:00
Xiaogang Chen 8f28056009 kfdtest: Convert KFDEventTest into multi-GPU test framework
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: Id1dc91f654686f159adb1bc70907e11558ee4be0


[ROCm/ROCR-Runtime commit: 0357e2e139]
2024-12-16 12:47:14 -05:00
Xiaogang Chen 77aa32b913 kfdtest: Convert KFDCWSRTest into multi-GPU test framework
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: I51646ebd95b2ef4820f7b503bd642deb05a86930


[ROCm/ROCR-Runtime commit: fa31caddba]
2024-12-16 12:47:08 -05:00
Xiaogang Chen 92c4010903 kfdtest: Convert KFDGWSTest into multi-GPU test framework
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: I0901750b2ce55bd7f44425b01442d98f0faf12fd


[ROCm/ROCR-Runtime commit: 6c6daf66bf]
2024-12-16 12:47:01 -05:00
Xiaogang Chen a17b24b062 kfdtest: convert KFDGraphicsInterop into multi-GPU test framework
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: I590be9ea063b0d115641aa5b40be4c376377c1dd


[ROCm/ROCR-Runtime commit: 759ca45f54]
2024-12-16 12:46:55 -05:00
Xiaogang Chen 35939040ba kfdtest: convert KFDPerfCountersTest into multi-GPU test framework
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: I29124147394b69c7fb5533a0e54d375d06b1ec13


[ROCm/ROCR-Runtime commit: dd1801df41]
2024-12-16 12:46:49 -05:00
Xiaogang Chen 23a24fb48a kfdtest: Update KFDMultiProcessTest class to support kfdtest run on multiple gpu
Update KFDMultiProcessTest class to fork process on gpu wise.

Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: Ibb12d64b4cbc5f082d737fd8d8a74233b75be13e


[ROCm/ROCR-Runtime commit: c69e660e7a]
2024-12-16 12:46:42 -05:00
Xiaogang Chen 58e0937fb4 kfdtest: Implement an infracture to support kfdtest run on multi gpu
Update class KFDBaseComponentTest to have kfdtest run on multi gpu under google test framework.

Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: If139c4fc6cf062fb800ff171c69cbf9604f98278


[ROCm/ROCR-Runtime commit: b4943d718b]
2024-12-16 12:46:32 -05:00