نمودار کامیت

2795 کامیت‌ها

مولف SHA1 پیام تاریخ
Besar Wicaksono (xN/A) TX [TEXT] 869f361a0b Add AMD extension version
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1256102]


[ROCm/ROCR-Runtime commit: a03c5148a7]
2016-04-08 16:31:00 -05:00
Besar Wicaksono (xN/A) TX [TEXT] c8f0efbee1 Add global memory clock and width info on the agent attribute list and deprecate the ones in the memory region attribute list.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1256098]


[ROCm/ROCR-Runtime commit: 4ccc695b95]
2016-04-08 16:29:10 -05:00
Andres Rodriguez e4f1d95ef2 package: change install directory to /opt/rocm
Align with the rest of the driver stack on the new installation path
/opt/rocm/*

This mechanism for generating packages should be changed for something
nicer and more standards compliant in the future.

Change-Id: Ic31409b0d0b8f6ee4b25296d2580982a76aab564


[ROCm/ROCR-Runtime commit: 31861c838e]
2016-04-08 11:41:49 -04:00
Nikolay Haustov [TEXT] 6b9e626507 Cherry-pick CL 1250286 from SC stg.
HSA Finalizer: Add dumping of code object, ISA and executable to loader.

This is controlled by loader options -dump-all, -dump-isa, -dump-code, -dump-exec

The options can now also be set with env variable LOADER_OPTIONS_APPEND.

Added tests to finalizer_offline

Testing: smoke, dumping on hardware

Reviewed by: Konstantin Zhuravlyov

[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1255351]


[ROCm/ROCR-Runtime commit: a795909bca]
2016-04-07 06:01:20 -05:00
Besar Wicaksono (xN/A) TX [TEXT] b156bd28b9 Cleanup TODO format
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1255182]


[ROCm/ROCR-Runtime commit: 823c254d61]
2016-04-06 16:50:50 -05:00
Ramesh Errabolu (xN/A) TX cae56040bb Update Private Segment Size parameter of the dispatch packet
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1254638]


[ROCm/ROCR-Runtime commit: b93946790d]
2016-04-05 14:03:33 -05:00
Besar Wicaksono (xN/A) TX [TEXT] 2caa405817 Add environment flag to enable sdma workaround that will wait for the sdma queue to be idle before updating the write pointer. Add class to manage environment flags.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1254004]


[ROCm/ROCR-Runtime commit: c95f96a9e4]
2016-04-01 17:13:45 -05:00
James Edwards (xN/A) TX fae50d66a8 Branch Brig.h file into opensrc hsa-runtime directory.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1251455]


[ROCm/ROCR-Runtime commit: e3670a2bef]
2016-03-25 15:26:18 -05:00
Nikolay Haustov [TEXT] b69a730231 HSA Finalizer: Merge changes in libamdhsacode and loader from sc_prm into hsa/compiler/finalizer and hsa/runtime.
Testing: pre-checkin

[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1251389]


[ROCm/ROCR-Runtime commit: 46842a57e5]
2016-03-25 08:36:20 -05:00
Zhuravlyov, Konstantin (x21446) MA 92a990b426 Clean up extensions and provide public extension/API to query host address given device address:
- Partially remove 'amd_load_map' extension because it is not used and will not be used
- Remove 'hsa_amd_query_kernel_host_address' API
- Add 'hsa_ext_amd_loaded_code_object' extension
- Add 'hsa_ext_amd_loaded_code_object_query_host_address' API
	- Most likely to be used by debugger, profiler, and hcc (printf)
- Update affected sources
	- 'hsa_system_extension_supported'
	- 'hsa_system_get_extension_table'
	- SoftCP path
- Integrate CLs 1250699, 1251204, 1251214 from stg sc

ReviewBoardURL: http://ocltc.amd.com/reviews/r/10091/
Testing: smoke (ok), teamcity (ok), samples on fiji (AQL and SoftCP) (ok)

[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1251223]


[ROCm/ROCR-Runtime commit: f6565a2f70]
2016-03-24 19:00:30 -05:00
Besar Wicaksono (xN/A) TX [TEXT] 4d763ffe0e Always wait queue wrap around to finish and dont return not enough resource.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1251141]


[ROCm/ROCR-Runtime commit: 9fa0531950]
2016-03-24 15:52:45 -05:00
Sean Keely (xN/A) TX 9e27d8b95a Minor fix to hsa_amd_image_descriptor_t.
Change uint32_t data[0]; to uint32_t data[1];

[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1251050]


[ROCm/ROCR-Runtime commit: 1c7142c129]
2016-03-24 13:24:22 -05:00
David Ogbeide 9abf85c06b libhsakmt: get CPU model name from proc/cpuinfo
HSA thunk is currently only aware of GPU node
model info, CPU names are NULL.



Signed-off-by: David Ogbeide <davidboyowa.ogbeide@amd.com>
Change-Id: I3c2adbb8566a5048b44c39fff4fd8228912468ff


[ROCm/ROCR-Runtime commit: 682776d89a]
2016-03-23 11:11:18 -04:00
James Edwards (xN/A) TX 8504fcb6ca Separate open source core runtime code from DK makefiles.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1250152]


[ROCm/ROCR-Runtime commit: 7d2bc9d113]
2016-03-22 18:10:13 -05:00
James Edwards (xN/A) TX 6da3325470 Remove opensrc test files.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1249961]


[ROCm/ROCR-Runtime commit: 7d1e6c3a57]
2016-03-22 13:39:51 -05:00
James Edwards (xN/A) TX 67e6064a6a Check open source core runtime code into perforce. This includes license and README files.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1249136]


[ROCm/ROCR-Runtime commit: c9ffe0004e]
2016-03-20 15:39:40 -05:00
Felix Kuehling a8a5960095 Add environment variable to disable GPU caching
This option may help debug synchronization or coherency issues
involving the GPU caches. It works only on dGPUs, by changing the
cache policy of the GPUVM default aperture to "cohrent", which is
implemented as non-cached on current dGPU hardware.

Change-Id: I544ac9cc5c0cf1fa5c4e30f67aa42b3b5e44ae67


[ROCm/ROCR-Runtime commit: 06d391c6c9]
2016-03-17 18:51:47 -04:00
Harish Kasiviswanathan 718e3600b8 Add QPI or HT io_links
Create QPI or HT links among all NUMA nodes. For now, assume all the
NUMA nodes are interconnected with same Weight (=1).

Change-Id: Id48ba95b9d75515a186f7dc5006b19bd92743ae3


[ROCm/ROCR-Runtime commit: f1fbacca15]
2016-03-15 21:10:53 -04:00
Harish Kasiviswanathan 14e60b6ab3 Get processor vendor from /proc/cpuinfo
Change-Id: I9039385d268ef1693fab121cbf1caf442129a12e


[ROCm/ROCR-Runtime commit: ee1dd5d9c2]
2016-03-15 15:37:52 -04:00
Besar Wicaksono (xN/A) TX [TEXT] 2d78a85c21 Add IOLink support
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1247220]


[ROCm/ROCR-Runtime commit: 73d43224e9]
2016-03-14 18:42:31 -05:00
shaoyunl 0c6a45ca49 Add Imprecise flag for memory access fault
KFD may not be  able to provide the precise VM fault address and status.
This flag will indicate whether the event data has the fault details

Change-Id: I15ffd5c25f555003c6450cc0700efb769418f76b


[ROCm/ROCR-Runtime commit: 79077811f5]
2016-03-14 15:17:17 -04:00
Felix Kuehling a31106ee4c Report SVM heap in topology
The Runtime requested this information so they can tell easily
whether a pointer is part of HSA shared address space or not.


Change-Id: If2041ed34031636677d692bc2dc6625634027ed4


[ROCm/ROCR-Runtime commit: 0ed29f5191]
2016-03-14 11:52:36 -04:00
Harish Kasiviswanathan 2f015053b2 Sync IOLINK defines to thunk spec
Current thunk spec v1.07 dated Feb 1, 2016

Change-Id: Ie1821f7f1903ac48b76cb68d452a6073d3a3c8d9


[ROCm/ROCR-Runtime commit: 1c1bc32477]
2016-03-11 18:59:57 -05:00
Harish Kasiviswanathan dbe8c8faba Fix indirect io_links
Connect only (Peer-to-Peer) GPUs that belong to same NUMA node. Without
this additional check non direct GPUs would also get connected.

Change-Id: I9a5ed19b8f06cd0527854cbbdb51ede99eade28b


[ROCm/ROCR-Runtime commit: 8ff2bcd48d]
2016-03-11 18:54:32 -05:00
Felix Kuehling 68f1b37518 Fix lstopo
Lstopo doesn't have system memory mappings at low addresses. Make
sure we leave enough GPUVM address space for kernel allocations
(currently only CWSR) before the start of the user-managed SVM
aperture.

Change-Id: Ic197f7bd5a3cfb150a0da2bfdbc848664e7869be


[ROCm/ROCR-Runtime commit: cac0c08496]
2016-03-11 11:01:12 -05:00
Harish Kasiviswanathan 6409b00f8f Add indirect io_links
Connect (Peer-to-Peer) GPUs that belong to same NUMA node.
Connect all [GPU] <--> [Non Parent NUMA] node

Change-Id: Ib4b08a6545d28b7dce4c9b1a90378bfc51bed07e


[ROCm/ROCR-Runtime commit: 7042292c60]
2016-03-10 15:11:17 -05:00
Harish Kasiviswanathan 35e6692134 Allocate memory for indirect io_links
To simplify, allocate maximum needed memory for node_t->link array.
No need for realloc when indirect links are added. Trade off - for some
nodes more memory than required will be allocated.

This means the loop to compute the number of direct (reverse) io_links
for a CPU node is not necessary.

Change-Id: I2b2559142cbec3b262d0b4ea5fdebfd8f36c28fc


[ROCm/ROCR-Runtime commit: 1e729510d2]
2016-03-10 15:10:48 -05:00
Felix Kuehling 029002d073 Add support for hsaKmtRegisterGraphicsHandleToNodes
Change-Id: I6fd7154dea78188480d5cb89ac237bad572356c4


[ROCm/ROCR-Runtime commit: 61ec3df2f9]
2016-03-10 11:16:02 -05:00
Ben Goz c32a504b59 Support MapMemoryToGPUNodes on APU
Change-Id: Ie77a2eb23cd9fe6671ff9e0630977220218e55dd
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: b1393f8224]
2016-03-09 21:31:52 -05:00
Felix Kuehling e2d2d6bd32 Update kfd_ioctl.h from kernel
Change-Id: I9852ef2e33e1f3b24343747e3c1c09b0050ffdc1


[ROCm/ROCR-Runtime commit: cb0315d31d]
2016-03-09 10:55:12 -05:00
Felix Kuehling f171fef754 Clean up GPUVM aperture management
Non-canonical GPUVM aperture doesn't exist on dGPUs. Remove comments
and code that say otherwise.

Fix alignment of GPUVM aperture for gfx801. Requires the same workaround
as gfx802. It's not used for anything on gfx801 yet, but will be soon.

Change-Id: I88607fe7b340081cc0715b85f28fdbf5f1bb0ad7


[ROCm/ROCR-Runtime commit: b837c3e7b0]
2016-03-09 10:55:12 -05:00
Yair Shachar 4c543389c7 name unnamed struct within HsaMemMapFlagd union
For aligning with RT definitions

Change-Id: I4dca0c5818fdcea6c596a48c7516835fc595a289
Signed-off-by: Yair Shachar <Yair.Shachar@amd.com>


[ROCm/ROCR-Runtime commit: c42ec0b82c]
2016-03-07 18:43:03 +02:00
Harish Kasiviswanathan ac547f8cb2 Add reverse direct io_links
The Kernel only creates one way direct link -
	GPU(PCI_BUS) --> [Parent NUMA Node]

Create the reverse direct io_link here -
	[Parent NUMA Node] -->  GPU(PCI_BUS)

Change-Id: I829a1b1b7f34bda42871ede3472d60915e88418c


[ROCm/ROCR-Runtime commit: 1d1c30db7c]
2016-03-04 15:54:03 -05:00
Harish Kasiviswanathan 5fc05ab059 Add free_nodes() helper function
Change-Id: I18ae0ac91b05275d7ad9d93175bae06870080844


[ROCm/ROCR-Runtime commit: a80d2f2303]
2016-03-03 18:33:59 -05:00
Andres Rodriguez 682178796f README: spelling and date fixes
Change-Id: I51fa196971b91ea71fd8b0abe169fe23502ebb96


[ROCm/ROCR-Runtime commit: 7c376247b5]
2016-03-02 18:42:01 -05:00
Andres Rodriguez 08c4246009 readme: add an initial README.md file
This is a simple README.md since most of the details should be in the
ROCK project.

Change-Id: I3175e2a5ade0f9ecb913076a4842b528f14947f0


[ROCm/ROCR-Runtime commit: 35e8fc6b15]
2016-03-02 18:42:01 -05:00
Ben Goz 8baf22651d Align hsaKmtMapMemoryToGPUNodes according thunk spec
Change-Id: I507ba5c6029ca5e7088c25930d46f5221679ace4
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: e2fb4bc312]
2016-03-02 16:12:03 +02:00
shaoyunl 8067849931 Export libKmtSetTrapHandler symbol as global
Change-Id: I065dbecd05e992bc528128d893edaf636c1beff7


[ROCm/ROCR-Runtime commit: fea5ab9114]
2016-03-01 10:30:02 -05:00
Harish Kasiviswanathan 268045084d Fix io_links sysfs directory name typo
Change-Id: I4f6fb43c4a038b94c0f94f66ee383e83ad0ffa62


[ROCm/ROCR-Runtime commit: bf03058112]
2016-02-29 11:15:29 -05:00
Jay Cornwall 537f217f11 Fix race in dGPU event page setup
events_page is unprotected from multiple allocation. The first event
creation ioctl is unprotected from a race with args.event_page_offset
being set (for page setup) and null (all subsequent invocations).

Change-Id: I40ba712a17e9eff257785f90c553a74ad09c661d
Signed-off-by: Yair Shachar <Yair.Shachar@amd.com>


[ROCm/ROCR-Runtime commit: 3a662ac712]
2016-02-28 07:14:23 -05:00
Felix Kuehling d56931260a Fix address space leak in __fmm_release
Use the object size when freeing address space, instead of the
parameter passed in by the caller. The parameter may be incorrect
due to app or runtime bugs, or when the buffers is an AQL ring
buffer with double mapping workaround.


Change-Id: I00bb31d4520ef969a49d6d5ea723e8a33418acc3


[ROCm/ROCR-Runtime commit: 006f3ee41b]
2016-02-26 09:19:21 -05:00
Felix Kuehling 8ae4e547bc Use aligned size for looking up userptr object after allocation
The alignment performed in vm_find_object_by_address isn't sufficient
because it doesn't take into account the offset from the start of the
page.

This fixes a bug where certain unaligned userpointers and sizes fail
to register correctly.

Change-Id: I17872e264467a619f5e1bedb7e1ed3d994a856bf


[ROCm/ROCR-Runtime commit: 8a0161d6bb]
2016-02-25 19:47:05 -05:00
Ramesh Errabolu (xN/A) TX 4fb3765f77 Configure AQL packet header with System Scope for flush
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1240170]


[ROCm/ROCR-Runtime commit: f7693cf777]
2016-02-24 14:08:35 -05:00
Ben Goz 18953cfa9a Mapping public VRAM BO to cpu
Change-Id: I2ff62ff0784f8ce556ad80739a177b90d866f1b4
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 3f02a3cf0b]
2016-02-24 17:30:15 +02:00
Felix Kuehling 6d856ebbff Fix memory leaks due to stale CPU mappings
Use the aligned size of the buffer objects for CPU unmapping in
__fmm_release instead of relying on the unaligned size passed in by
the caller.

Change-Id: If986ec24e9a05d32981549fddbf143221fc40bac


[ROCm/ROCR-Runtime commit: 7a383f9d88]
2016-02-16 18:12:05 -05:00
Felix Kuehling 99325bf7c4 Add support for register/deregister memory for dGPU
Allocate SVM address space for the registered memory and use new
userptr support in KFD to create a system memory BO associated with
the given user pointer. Map this BO at the SVM address for CPU
access.

MapMemoryToGPU can be used with the registered user pointer and
will return the SVM address as alternate GPUVA.

Change-Id: I4886e193c51fb6870a567878870c36bf8b5c3748


[ROCm/ROCR-Runtime commit: 85f9efb1a0]
2016-02-16 18:12:05 -05:00
Ben Goz 89905c0cd7 Align gpu-id-array size to multiple of sizeof(uint32_t)
Change-Id: I9f46b6a331a8d928ef570b420fb60b99b2edfdd1
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 00386734b1]
2016-02-16 11:27:06 -05:00
Besar Wicaksono (xN/A) TX [TEXT] 62ea8e12e3 Modify MatrixMultiplication sample to use memory pool API
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1237420]


[ROCm/ROCR-Runtime commit: bbe0be05d4]
2016-02-16 11:12:25 -05:00
Besar Wicaksono (xN/A) TX [TEXT] f166016d8a Add sample application to use the new memory pool API.
Details:
- add HsaGetInfo program that prints out all available CPU, GPU and their respective memory pools.

[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1237219]


[ROCm/ROCR-Runtime commit: c494af9d49]
2016-02-15 18:11:44 -05:00
Harish Kasiviswanathan e8327090b9 gfx803: Add performance counter information
Change-Id: Id81b43e90029306f03c84752cef06dc336e3a4a9


[ROCm/ROCR-Runtime commit: 04b92b8e05]
2016-02-12 16:39:39 -05:00