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49f0546637d0f4fe5f63c6014cb718dfd248eaec
Граф коммитов

4178 Коммитов

Автор SHA1 Сообщение Дата
agunashe 49f0546637 SWDEV-293742 - Update copyright end year VDI repo 
Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261


[ROCm/clr commit: d96481fb36]
 2021-08-22 23:56:07 -07:00
Chauncey Hui 864b2ae76e SWDEV-2 - Change OpenCL version number from 3332 to 3333 
[ROCm/clr commit: b065eb2d00]
 2021-08-22 23:56:07 -07:00
Saleel Kudchadker ce26a73ca9 SWDEV-260448 - Honor NUMACTL for Direct Dispatch 
Setting AMD_CPU_AFFINITY=1 will keep Async Handler thread within the
bounds set by numactl.

Change-Id: Id01b30df5127d65c29ac072bf74a04986b7128de


[ROCm/clr commit: cd21af757e]
 2021-08-22 23:56:07 -07:00
German Andryeyev e58a6f3502 SWDEV-289378 - Avoid CPU TS overwrite if GPU TS is available 
Change-Id: I444ec284669b6a6fff31182e213b47c562c90192


[ROCm/clr commit: f4032401cf]
 2021-08-22 23:56:07 -07:00
German Andryeyev b5c9af9b52 SWDEV-289378 - Avoid CPU TS overwrite if GPU TS is available 
Change-Id: I2fc1a43c048b4fa1e42f27c4cf5c72fc7ae84e9c


[ROCm/clr commit: 4fd506cfe1]
 2021-08-22 23:56:07 -07:00
Chauncey Hui c1c9ba86f3 SWDEV-2 - Change OpenCL version number from 3331 to 3332 
[ROCm/clr commit: 50a50c66b9]
 2021-08-22 23:56:07 -07:00
jujiang e65cae7c46 SWDEV-286322 - Add .gitattribute 
Change-Id: I4ae4c4498765f10c98bb5f2443a083463b0e25af


[ROCm/clr commit: ed0e7f659d]
 2021-08-22 23:56:07 -07:00
Chauncey Hui 74ee98584f SWDEV-2 - Change OpenCL version number from 3330 to 3331 
[ROCm/clr commit: 1d9bf4f0b9]
 2021-08-22 23:56:07 -07:00
pvellien e23597d4a4 SWDEV-285333 - Introduce Address sanitizer hostcall service 
Change-Id: Id29aacd09d0a9934a027446c57c7095804e1a454


[ROCm/clr commit: c11c02f2c7]
 2021-08-22 23:56:07 -07:00
Chauncey Hui c073813460 SWDEV-2 - Change OpenCL version number from 3329 to 3330 
[ROCm/clr commit: ffa29fad01]
 2021-08-22 23:56:07 -07:00
German Andryeyev a738f7957b SWDEV-292018 - Avoid marker if queue is empty 
Change-Id: I40a42d67d2c911d2c9a0bf425f36bc795f9539c0


[ROCm/clr commit: 6ab8dcc682]
 2021-08-22 23:56:07 -07:00
Vladislav Sytchenko 6c612d8ce7 SWDEV-274815 - [PAL] Navi24 support 
Change-Id: I934797bda471618c3f69484a1552b37345ae638b


[ROCm/clr commit: f6c00765e7]
 2021-08-22 23:56:07 -07:00
Chauncey Hui c393c3ff8d SWDEV-2 - Change OpenCL version number from 3328 to 3329 
[ROCm/clr commit: a58ef5dd8f]
 2021-08-22 23:56:07 -07:00
Jason Tang f63a008110 SWDEV-287088 - Workaround VM page fault on Windows 
Some chunk memory are not guaranteed to be resident during
initial allocation. Use CPDMA to force resident.

Change-Id: If1a2da3e75f136caaa4c7a29d8f604d6af2639fa


[ROCm/clr commit: b793811ef6]
 2021-08-22 23:56:07 -07:00
Anusha GodavarthySurya a7c6b2d463 SWDEV-290901 - update ROC_ACTIVE_WAIT_TIMEOUT to 50us 
Change-Id: Iba2f2bb882c4786a432a523cb0954761e5359e7f


[ROCm/clr commit: 20e2153e8b]
 2021-08-22 23:56:07 -07:00
Chauncey Hui 473d53f1f2 SWDEV-2 - Change OpenCL version number from 3327 to 3328 
[ROCm/clr commit: 4e8c55829b]
 2021-08-22 23:56:07 -07:00
German Andryeyev 9f03f68a8a SWDEV-290160 - Switch to global HSA signals 
Runtime can't assign internal HSA signals for HIP events, because
HIP application can destroy the HIP stream or signal reuse may
occur internally. Switch to global HSA signals for HIP events.

Change-Id: Ieaea2d6b039e492b2e7c5112782a8f4e601e50a1


[ROCm/clr commit: ce8dad2ecc]
 2021-08-22 23:56:07 -07:00
Alex Xie bfc21e4a59 SWDEV-290122 - OpenGL tests fails with CL_MEM_ALLOCATION_ERROR 
Change-Id: I34d7063f05dd46c32cf59a88c455691ba5099679


[ROCm/clr commit: b5b1ccc990]
 2021-08-22 23:56:07 -07:00
Chauncey Hui d984c8ee22 SWDEV-2 - Change OpenCL version number from 3326 to 3327 
[ROCm/clr commit: 2dd18dc004]
 2021-08-22 23:56:07 -07:00
Saleel Kudchadker 14a113f69d SWDEV-247372 - Add logging for debug 
Change-Id: Id5a27034005a7deba37072d8a4c6f250104a96c8


[ROCm/clr commit: 8e08880cc3]
 2021-08-22 23:56:07 -07:00
Chauncey Hui 83dccf9010 SWDEV-2 - Change OpenCL version number from 3325 to 3326 
[ROCm/clr commit: 82e572c23f]
 2021-08-22 23:56:07 -07:00
Christophe Paquot dfbdbfecb5 SWDEV-240806 - Release resources in Command::terminate for HIP 
We do not want to release resources during setStatus in HIP because of Graphs

Change-Id: Idc7b188ab5f8be6975ea91005dd2bbf177401f8c


[ROCm/clr commit: 133287f31f]
 2021-08-22 23:56:07 -07:00
German Andryeyev 863a43abfc SWDEV-290160 - Don't send notification for batch markers 
Batch marker already has a barrier with HSA signal callback

Change-Id: I69fc63d72320c2e9cc2d2e59ebd3f07c0bd0e3b5


[ROCm/clr commit: c49f1069ab]
 2021-08-22 23:56:07 -07:00
Chauncey Hui b5b4da24dd SWDEV-2 - Change OpenCL version number from 3324 to 3325 
[ROCm/clr commit: 83ca0821af]
 2021-08-22 23:56:07 -07:00
Sourabh Betigeri cb9ec048f5 SWDEV-286446 - This patch enables stream operations on vega10, vega20, MI100 and MI200 
Change-Id: I6f07036d8ee6e4c6b55196a13288f8107488d824


[ROCm/clr commit: b2a1dc26ba]
 2021-08-22 23:56:07 -07:00
Chauncey Hui fa325ead15 SWDEV-2 - Change OpenCL version number from 3323 to 3324 
[ROCm/clr commit: eaf0da8af3]
 2021-08-22 23:56:07 -07:00
Saleel Kudchadker 8436f3ff1b SWDEV-247372 - Reset hasPendingDispatch 
Reset hasPendingDispatch_ if we insert barrier for time marker.

Change-Id: Id038fd4e1c910c0a657978fee00630e49c372321


[ROCm/clr commit: d3213eca90]
 2021-08-22 23:56:07 -07:00
Chauncey Hui a2d99a14e9 SWDEV-2 - Change OpenCL version number from 3322 to 3323 
[ROCm/clr commit: b5528c8121]
 2021-08-22 23:56:07 -07:00
Aaron Liu e1b277f4ce SWDEV-290474 - [Lnx][VanGogh] Add VanGogh support 
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Christophe Paquot <christophe.paquot@amd.com>
Change-Id: Iff0253a181bbfc1984304014a9e3b542b2556635


[ROCm/clr commit: fe2d7424e5]
 2021-08-22 23:56:07 -07:00
German Andryeyev 9da54443dd SWDEV-290371 - Add lock protection for signal 
Add lock protection for signal processing
If signal is reused, then disable reference to it from HIP
Increase the pool signal size to 32

Change-Id: I7d529b35910f83ce577c9eca6d3386759611ccc0


[ROCm/clr commit: a1629cad26]
 2021-08-22 23:56:07 -07:00
Saleel Kudchadker 8919f9f434 SWDEV-286092 - Use Barrier Header for event 
Change-Id: I9701fbab587e2ea31e58449e8c8b07341a7aa161


[ROCm/clr commit: 0af6ba9428]
 2021-08-22 23:56:07 -07:00
Alex Xie 5e002ce6f0 SWDEV-290306 - [LNX][Navi24][mainline]clinfo test failed on Navi24 
Add Navi 24 support

Change-Id: I7343384cf6fb8c532321e57e202c196ef054f459


[ROCm/clr commit: b818301d53]
 2021-08-22 23:56:07 -07:00
Saleel Kudchadker 9a3e9c9ad3 SWDEV-247372 - Active wait timeout env var 
- Create an env var ROC_ACTIVE_WAIT_TIMEOUT to set active wait timeout
- Record profiling informaion if marker_ts_ property is valid.

Change-Id: If0d8aec8d9b0715027cf0f7c3dc8a4c722a6bae6


[ROCm/clr commit: b416ad7b9d]
 2021-08-22 23:56:07 -07:00
Chauncey Hui f15554c73d SWDEV-2 - Change OpenCL version number from 3321 to 3322 
[ROCm/clr commit: 3b9b874947]
 2021-08-22 23:56:07 -07:00
Arya.Rafii 4f76f0293d SWDEV-289250 - Should return a nullptr for PAL so we can assume it's a host ptr 
Change-Id: I530eb39104bbe727c3e38186f6db4e64285b3fc8


[ROCm/clr commit: 8b22111f4b]
 2021-08-22 23:56:07 -07:00
Christophe Paquot b8de199652 SWDEV-276396 - Implement hipDeviceReset 
Add a Purge function to MemObjMap

Change-Id: Iac51dfda9a7b7c45f2f4a0dc35f7a623121aba1a


[ROCm/clr commit: d13581efa7]
 2021-08-22 23:56:07 -07:00
German Andryeyev a9abd850ea SWDEV-284671 - Add HW event wait to improve hipDeviceSynchronize 
If AMD event contains a reference to a HW event, then runtime
could check/wait for HW event. CPU status update will occur later
after HSA signal callback, but it's not important for the result.

Change-Id: I591391a953bbdba6a25ac07e2cd98aeb17cd4596


[ROCm/clr commit: 85c70a7495]
 2021-08-22 23:56:07 -07:00
Chauncey Hui 8d7a745246 SWDEV-2 - Change OpenCL version number from 3320 to 3321 
[ROCm/clr commit: 5fdf5d05df]
 2021-08-22 23:56:07 -07:00
Vladislav Sytchenko de280603a7 SWDEV-289548 - [PAL] Revive Raven 2 support 
Revert back to using the Raven (gfx902) target ID for Raven 2 (gfx909).
This is due to the HSAIL compiler not supporting gfx909.

In theory there should be no issue with running Raven isa on Raven 2.

Change-Id: I425edebc99075799eda5522fad231b8fb3184873


[ROCm/clr commit: 0b1481d4f1]
 2021-08-22 23:56:07 -07:00
Chauncey Hui 265747f004 SWDEV-2 - Change OpenCL version number from 3319 to 3320 
[ROCm/clr commit: 957b73c39e]
 2021-08-22 23:56:07 -07:00
Saleel Kudchadker c952deaace SWDEV-286092 - Enable handler for marker always 
For DD, send a NOP packet so that we leverage the handler to indicate
completion.

Change-Id: Ie57ea0124a8497d39cc49da1c4575c2cd86b9319


[ROCm/clr commit: 9d0846e732]
 2021-08-22 23:56:07 -07:00
Chauncey Hui 59a8423e04 SWDEV-2 - Change OpenCL version number from 3318 to 3319 
[ROCm/clr commit: 9dfc938118]
 2021-08-22 23:56:07 -07:00
kjayapra-amd 8f1e9bb054 SWDEV-288690 - Updating the return value with roc::Device::init 
Change-Id: I132fa424cf9bec608e5c8429e93d20e78b76c6f0


[ROCm/clr commit: d2bf9f9b58]
 2021-08-22 23:56:07 -07:00
German Andryeyev 88b7c2b990 SWDEV-240804 - Update ReadMostly attribute 
Switch HSA_AMD_SVM_ATTRIB_READ_ONLY to
HSA_AMD_SVM_ATTRIB_READ_MOSTLY to match Cuda. The new attribute
was just exposed in ROCr/KFD.

Change-Id: I2ee522d33c347ba52a4e272d2cd7f67960490cf7


[ROCm/clr commit: 89b69638d1]
 2021-08-22 23:56:07 -07:00
Vladislav Sytchenko bbc9b26788 SWDEV-273235 - Find UGL headers based on AMD_DRIVERS_PATH 
All KMD/asic_reg/UGL headers are located under the drivers folder. No
need for the AMD_UGL_PATH variable as it essentially is
${AMD_DRIVERS_PATH}/ugl.

Change-Id: I070d737d50f2096493b3e75ef9b9e824cb19d048


[ROCm/clr commit: 1423c1db64]
 2021-08-22 23:56:07 -07:00
Chauncey Hui 8c0e1ac8ea SWDEV-2 - Change OpenCL version number from 3317 to 3318 
[ROCm/clr commit: 7264e90fd1]
 2021-08-22 23:56:07 -07:00
cjatin 9587f79650 SWDEV-283267 - Fix a bug where rocclr appends compiler options twice 
Change-Id: I54ca6e8458cf6414c263df7a8bf61f7ce39a64df


[ROCm/clr commit: 228662bf3f]
 2021-08-22 23:56:07 -07:00
German Andryeyev c4ee688d6e SWDEV-240804 - Add coarse grain memory support 
Add an extension to memory advise to disable cache coherency for
better performance

Change-Id: I283703d81d9c36ddfa2c8fffa15eef60e2195056


[ROCm/clr commit: a9a1e21445]
 2021-08-22 23:56:07 -07:00
Chauncey Hui 1f214f9e32 SWDEV-2 - Change OpenCL version number from 3316 to 3317 
[ROCm/clr commit: 1d63bd0eb1]
 2021-08-22 23:56:07 -07:00
Vladislav Sytchenko f93ee8d319 SWDEV-273235 - Fix Windows CMake build 
Change-Id: I337b8d3b38a492b77b55602ab3a6bb3c05e693e0


[ROCm/clr commit: 77d6373502]
 2021-08-22 23:56:07 -07:00