AI/rocm-systems
2
0
Forc 0
Cód Saincheisteanna Iarratais Tarraingthe Gníomhartha Pacáistí Tionscadail Scaoileann Vicí Gníomhaíocht
14 Tiomáintí 3 Brainsí 0 Clibeanna
4bcfffbfcf757a746b80117a504ec6cf0adf56fb
Graf Tiomantas

14 Tiomáintí

Údar SHA1 Teachtaireacht Dáta
Jatin 4bcfffbfcf SWDEV-245414 - fix nvcc CI breakage 
Change-Id: I34ff533f34cfc2f60abefc0d8f6c6d8266d30f61


[ROCm/hipother commit: c0a0999d1a]
 2021-06-26 13:31:10 +05:30
Sarbojit Sarkar 0ff075e785 SWDEV-284435 - StreamOps mapping with cuda drv API 
Change-Id: I6ed9196cfe59d9004338206f6dd8d6fb367b3ffa


[ROCm/hipother commit: ef4d479169]
 2021-06-25 12:20:40 -04:00
Rahul Garg 62a54a9ad5 ROCMOPS-1956 - Push restructured code to hipamd 
hipamd will have AMD's ROCCLR based HIP backend implementation

Change-Id: Id7de9634519b4ce46fca71a1b61f3d5b1e3fc459


[ROCm/hipother commit: b2f4e62135]
 2021-06-07 21:42:44 +00:00
Rahul Garg 7d8b728f8c SWDEV-288707 - Merge HIP refactored code to staging 
These changes move-
- rocclr based implementation inside src/hipamd/src
- platform specific (both nvidia and amd) headers inside
src/hipamd/include/hip

Change-Id: Ia29791a727244952591fe1d813dcef0303b73a9e


[ROCm/hipother commit: 358b6fe5c4]
 2021-06-07 00:07:24 +00:00
Satyanvesh Dittakavi 4871d8275e SWDEV-283388 - Fix hipMemRangeGetAttributes on Nvidia Platform 
Change-Id: I5daeacd9dd5c6ce7f914d6e6e45dd41fb2a675a5
hipMemRangeGetAttributes was returning hipErrorInvalidValue due to improper
mapping of the arguments to cudaMemRangeGetAttributes.


[ROCm/hipother commit: 5165e3650a]
 2021-04-29 06:06:03 -04:00
Satyanvesh Dittakavi d801edf316 SWDEV-281789 - Add missing HMM attributes on CUDA path 
Change-Id: I11167eea006301e01a1f91708bf6d0ac832d8b7f


[ROCm/hipother commit: 49f81037f3]
 2021-04-26 13:54:01 -04:00
Anusha GodavarthySurya c026b01835 SWDEV-282361 - HIP support for NVRTC 
Change-Id: I82869af8194b595f9a2fb64ad034630786189335


[ROCm/hipother commit: fff92fd60e]
 2021-04-20 09:28:58 -07:00
Tao Sang 7dda6f8a28 SWDEV-279657 - Fix hipMallocManaged-N256M failure 
Add concurrentManagedAccess detection in hipMallocManaged test.
Skip test when device doesn't support concurrentManagedAccess.

Change-Id: Ie54046feef3baba857a7068972ec1fc1a60c2dfd


[ROCm/hipother commit: 4fc75f9536]
 2021-04-20 09:07:31 -04:00
Satyanvesh Dittakavi 1aef9bf915 SWDEV-274404 - Add hipDrvMemcpy3D* and hipMemcpy2DFromArray* APIs on HIP CUDA 
Change-Id: I4aba2bff60a7bae6b01b6e471968227b0df8e192


[ROCm/hipother commit: c9f5e744f3]
 2021-03-08 13:14:25 -05:00
Satyanvesh Dittakavi b4d4054a61 SWDEV-271491 - Fix flags for hipSetDeviceFlags on HIP-CUDA path 
Change-Id: I29446d5cc5a26a4b83fa45175ccdf1d8f3a9ea40


[ROCm/hipother commit: 6086537b5d]
 2021-02-25 12:06:33 -05:00
Maneesh Gupta d861759609 SWDEV-271416 - Keep HIP_DYNAMIC_SHARED macro for compat with existing HIP apps 
Change-Id: I536e0c65d6e8696cbc369082350834abd710abca


[ROCm/hipother commit: 27378a4341]
 2021-02-16 00:09:48 -05:00
Julia Jiang 1004be98d5 SWDEV-271416 - Remove HIP_DYNAMIC_SHARED macro in hip 
Change-Id: I12f39ea8438eb7ce76d8ffb2151b4faa93689048


[ROCm/hipother commit: 1bb69ec78a]
 2021-02-08 13:17:46 -05:00
Satyanvesh Dittakavi 9349ef2f10 SWDEV-269784 - managed memory support for HIP CUDA 
Change-Id: I01f9fc64573f402031eceab24395e5cbd93007f9


[ROCm/hipother commit: eeaf35eda3]
 2021-01-28 07:51:52 -05:00
Tao Sang f4e86dd924 Remove hip-hcc codes: Part three 
1.Rename include/hip/hcc_detail/ as include/hip/amd_detail/

2.Rename include/hip/nvcc_detail/ as include/hip/nvidia_detail/

3.Create __HIP_PLATFORM_AMD__ to replace __HIP_PLATFORM_HCC__

4.Create __HIP_PLATFORM_NVIDIA__ to replace __HIP_PLATFORM_NVCC__

After hcc_detail, nvcc_detail, __HIP_PLATFORM_HCC__ and __HIP_PLATFORM_NVCC__
have been removed from upstream, they will be removed from hip runtime.

Change-Id: I1ae457effd739d6c25bca203c1724b026be21fce


[ROCm/hipother commit: 49e3b900bb]
 2021-01-05 10:39:31 -05:00