Commit Graph

316 Commits

Author SHA1 Message Date
Tony Tye 001fd66cac Rename device access functions
Rename functions that access devices to reflect the derived device
they return. This includes the base device::Device and the derived
gpu/pal/roc device classes in both NullDevice and Device forms. Change
to use the least derived versions to clarify what operations will be
available.

Change-Id: I1abb6bfed7efa24852bc8d0d49acaea357d8b5d0
2021-01-13 08:24:28 +00:00
Tony Tye f679b05df7 Move declaration of kMaxAsyncQueues in rocdefs.h
Move declaration of kMaxAsyncQueues in rocdefs.h into the roc
namespace and adjacent to the other definitions.

Change-Id: Ibd319e3cc191945bacb9c06e1b31967717c1c87c
2021-01-13 08:24:28 +00:00
Tony Tye 8992f9e18d [NFC] Reorder some system includes alphebetically
Change-Id: I5245eb8482b447f6ce95e1c0b686d09ca7d20deb
2021-01-13 08:24:28 +00:00
Tony Tye eb16dc5ef3 [NFC] Correct comments and line spacing
- Correct spelling mistakes or working in comments.
- Adding missing line separators.
- Add missing comments for namespace closing brace.

Change-Id: If09cdd38aa088b0f68f750dfdef81351eb8c4935
2021-01-13 08:24:28 +00:00
German Andryeyev 7d3aaa7a39 Explicit page table update on all devices
HMM with xnack enabled should automatically update page tables,
but currently it doesn't perform that. For now, runtime will
force page table update on all devices unconditionally.

Change-Id: Idfa6e1c145e6c114856214dce042b8a8349e5c58
2021-01-12 23:16:46 -05:00
Jason Tang 020da898b2 Remove incorrect assert
Change-Id: I7697c688c5c50a38d9d339971d4a03e9b57fcae4
2021-01-11 20:59:36 -05:00
German Andryeyev 8698aeef0d Add HSA signal global tracking logic.
Implement the global class for signals tracking per device queue.
Switch to the new tracking mechanism.

Change-Id: I3c4dda04b34e6d18d6a95510d84102909633b415
2021-01-08 12:57:33 -05:00
Sarbojit Sarkar 7648b2a61b SWDEV-264116: Optimize signal pool size
Change-Id: I4b9cef04d18fbbe453db924bcd88837c0e5924de
2021-01-06 02:14:23 -05:00
German Andryeyev d524514f6a Update comments in the code
Make sure the comments in the code match the actual behavior.
HDP read has internal HDP read cache and doesn't use L2.

Change-Id: I667a4643b0e0d6529008f5e1a0a3269456c55b4e
2020-12-17 09:43:23 -05:00
Sarbojit Sarkar 673f483879 SWDEV-262734: Fix for Numa policy bug
Change-Id: I4be62c1fc45a59d09aa043af1c998b9e308da604
2020-12-16 11:22:32 -05:00
Payam f134b90199 SWDEV-257937 - ROC_BARRIER_SYNC fix for missing SDMA flush
Change-Id: I93e8902bfcb16bac8ea594e16ea397b1ceafbd79
2020-12-15 00:54:33 -05:00
Jason Tang d4316141b7 SWDEV-263539 - More Target ID fix in GSL path
On behalf of Tony Tye. The bootleg passes CQE Baffin/Ellesmere test.

Change-Id: I4c21d21b3aaba360682ef15b8a4dda239f8af276
2020-12-14 16:48:55 -05:00
German Andryeyev 18a821acde Add L2 flush/invalidate after CPU copy
CPU read updates L2 with the latest values and requires
invalidation after, because SDMA doesn't use L2 and data can become
out of sync.

Change-Id: I98d1c91ca78a103fa5409e638f97485d62d5b11e
2020-12-11 23:05:49 -05:00
Alex Xie 2505d68eba SWDEV-256126 - Linux pro Nuke app crash with "Out of memory"
Out of memory while running RIP plugin test

Change-Id: I8d6859a45b871f96ac027f8c7274f716e8524a3c
2020-12-10 11:44:54 -05:00
German Andryeyev 1fde842703 Fix a deadlock in ROCr backend
When OCL ROCr backend performs CL_MEM_COPY_HOST_PTR it may attempt
to have access to amd::Memory object it's currently creating,
but it's not ready yet. The logic creates a temporary dummy object
to perform a copy transfer. The new change will make sure runtime
skips allocation of the same device::Memory object second time.

Change-Id: I14c6a00a3941fdcaa6aea299e9f096e4c3f5cadf
2020-12-09 13:23:17 -05:00
Saleel Kudchadker 59c6cb0268 Use barrier packets for event profiling
Use barrier packets for every profile marker that gets submitted
and use the completion signal to get GPU ts. This gives most accurate
dispatch time. Club cache flushes with profile marker if there is a
pending dispatch that needs cache flush. This optimization saves on
extra barrier and helps wall time

Change-Id: Ib62d6d7aabf4743827b561be6c9c5afa813203da
2020-12-03 13:45:14 -05:00
German Andryeyev 4af8b53846 Enable GPU memory in HMM by default
Change-Id: Ifec4733dc7a932163d921ebe1ae9fbd594ea1ef2
2020-11-30 12:39:18 -05:00
German Andryeyev 08b846ae12 Remove obsolete terminate() method
Change-Id: I66b4a74f17977f1af320f402402a2f1b602e9911
2020-11-30 11:46:09 -05:00
Aryan Salmanpour 72277c29b0 don't update maxComputeUnits_ if any exception occurs during conversion of global CU mask string
Change-Id: I7664809fe84d7422b18b1272ffeb642e03a39f1a
2020-11-23 09:51:19 -05:00
Aryan Salmanpour d03ee6eff6 Add an environment variable for setting a global CU mask
Change-Id: I773b152023c7b8e1e679a42015748f9b23fd946d
2020-11-20 10:05:09 -05:00
Alex Xie f5ce682ac3 SWDEV-258132 [LNX][Navi23] Segmentation fault when run clinfo
Change-Id: Ic8833726214b32f70a35f3922baf2afae87b25af
2020-11-03 14:40:31 -05:00
Jason Tang 1da0fe4263 SWDEV-254181 - Fix ocl min_max_image_buffer_size regression.
ROCr is now reporting the actual HW addressing limits for HIP, so OpenCL will have to impose lower limit.

Change-Id: I60c2ce27ed1d1f45f16fb76438965a236ba872c6
2020-10-26 09:15:31 -04:00
German Andryeyev bd340d8cbf Correct reported info in ROC profiler
OCL can't distinguish different copy types, but ROC profiler
expects SDMA transfer visibility. Add extra code to detect
a transfer with the host memory and substitute OCL command

Change-Id: I5290acd0e10bc082e00c1d4ae1474a075de7f165
2020-10-23 18:29:48 -04:00
Alex Xie e5588f188c SWDEV-256126 - Linux pro Nuke app crash with "Out of memory "while running Rip plugin test
We unmap a memory with a different pointer.
ROCr runtime might be confused and silently ignore the unmap request

Change-Id: Ic5a1387a426cf02a985a4ef8ff8ff05e6a870cbf
2020-10-21 11:33:42 -04:00
Jason Tang 25cc965c76 Change file mode 755 back to 644
Change-Id: I4ba5d66997ffd3331c56674d4bf805160dcdf049
2020-10-19 15:09:32 -04:00
German Andryeyev a5661192b6 Reduce the number of allocated signals
Enable this optimization when the barrier is disabled, since
reuse requires a signal wait.
Use the size of pending AQL signals as the size of signal pool.

Change-Id: I2754a0f8b67e19d2601c58945e10fdf0e8be1624
2020-10-15 16:39:33 -04:00
Alex Xie e4e6c46356 SWDEV-251360 - Add tracing for memory allocation/free.
This can be used to debug VM fault

Change-Id: I7685485b0450ea84d10b710639ad7b6c5ec2fcf3
2020-10-15 15:38:55 -04:00
Rahul Garg a224dc2a7b Fix PCI bus domain ID
SWDEV-256338

Change-Id: I09afdca4f1a08f99ce662a4c4ed8a51d85500699
2020-10-15 14:59:57 -04:00
Rahul Garg c0f8b52f06 Add image1DMaxWidth_ for maxTexture1D property
Needed by SWDEV-254068

Change-Id: Ic650dfb6e5b38d7544ba647c53de52deda39b92d
2020-10-14 17:30:43 -04:00
Jason Tang b38317cb3c Add COMGR_DYN_DLL to device/rocm/CMakeLists.txt
Now rocm/rocdevice.cpp also includes comgrctx.hpp, and we don't want to statically link against comgr when buidling shared libs.

Change-Id: Ic330bd860559b3e07b776c951afe6126b0f43f7d
2020-10-14 09:28:37 -04:00
German Andryeyev c05de4f2f9 Add ROCr queries for HMM support
Change-Id: I2b5508bf0faf8f48dd7348d6a5202fb28de09876
2020-10-13 09:12:00 -04:00
German Andryeyev d9397590de Add option to skip AQL barrier
The change reuses HSA signals for dispatches as a wait signal.
Skipping the barrier requires to  disable L2 cache for sysmem
allocations and extra tracking for HDP access with the large bar.
ROC_BARRIER_SYNC=0 activates the new logic. Barrier sync is
still used by default.
ROC_ACTIVE_WAIT=1 enables unconditional active wait in ROCr.
The change also consolidated ROCr wait logic under single function.

Change-Id: I6bd1be30aa88258da1b1f9de319ef5a45852afd8
2020-10-06 08:37:12 -04:00
Sarbojit Sarkar 4a025e1a87 [perf]hipMalloc performance optimization
Change-Id: I6e8a918cc1c4cafad197b09e10755cd180e11ead
2020-10-06 03:19:41 -04:00
German Andryeyev df63547906 Add support for CPU device in advise
Change-Id: I7250e0183580c14cd3d6050ef85f9ce26e36f4a8
2020-10-05 12:52:46 -04:00
Tao Sang bc7291e85c Fix empty cpu agent on raven system
Change-Id: I30f5e65367613152ce96b80b13e1c9f2a28da807
2020-10-05 10:54:57 -04:00
German Andryeyev af8426b0e4 Revert "Reduce the default size of the signal pool"
This reverts commit e68d671a51.

Reason for revert: a regression

Change-Id: I78180ba011f45af9a4cce110b14f379aa10f7d3a
2020-10-01 09:56:05 -04:00
Jatin Chaudhary d0f009a0ee Adding and populating available registers per cu value
Change-Id: Ide012038a9d74b20166ce1e69a9f2c0cbdce0d73
2020-09-28 05:30:23 -04:00
Aryan Salmanpour 2e199bd492 Fix a crash when printf used in a kernel launched on a stream with custom CU mask
SWDEV-249719 - root cause: queues with custom CU mask are not inserted
into queuePool_ (i.e., queue of reusable HSA queues) of ROC device class
causing a crash when creating hostcall buffers for printf

Change-Id: Ieee7005d9a5a30b3113394ce23ee65927126d0d6
2020-09-25 09:25:19 -04:00
kjayapra-amd 18352d189b SWDEV-253063 - Code changes to make Image Buffer Workaround only for targets gfx 10.1
Change-Id: I17044a1c0775f427b9ba712eb3fd5ab21ed88b0e
2020-09-23 11:07:15 -04:00
kjayapra-amd 7462e39954 SWDEV-252542 - Fixing Win Compilation on SWDEV-241902.
Change-Id: If76f79002b265dccf6da4acef1ff9372d8b0a2ff
2020-09-18 12:11:56 -04:00
Satyanvesh Dittakavi 90c694988b set free mem to zero avoding underflow
Change-Id: I964b41695fb41712624146c5959a35b37eacf52d
2020-09-18 11:56:57 -04:00
kjayapra-amd a66c56d641 SWDEV-241902 - Changes to pass file descriptor and offset to load code object.
Change-Id: I0243cccdeaa533b2a56fde42f12d5424c3b63a3b
2020-09-15 07:54:24 -04:00
kjayapra-amd 11b723a605 SWDEV-251941 - Adding gfx1030,gfx1031 support to mainline
Change-Id: I752dff86651a55f4fbf719e84ee7d3ec49f5f207
2020-09-14 09:07:44 -04:00
Jason Tang 740f1ba0aa SWDEV-252095 - Fix progvar_prog_scope_misc test Aborted (core dumped)
The progvar_prog_scope_misc test expects CL_DEVICE_MAX_MEM_ALLOC_SIZE to be multiple of integer.

Change-Id: Ic0690f5ab06ffa3feafb718beabbcf83ab53978c
2020-09-11 12:36:39 -04:00
Laurent Morichetti 5d4b6f74d3 Use std::atomic
Replace amd::Atomic with std::atomic. Remove make_atomic uses by
converting the variable to std::atomic and making sure the memory
order is relaxed when synchronizes-with is not needed.

Delete utils/atomic.hpp.

Change-Id: I0b36db8d604a8510ac6e36b32885fd16a1b8ccfa
2020-09-09 14:55:29 -04:00
German Andryeyev e68d671a51 Reduce the default size of the signal pool
Implement dynamic signal pool grow per allocated queue

Change-Id: Ie8b17937d72c29cc49e59639c4b2023ea984b14c
2020-09-09 09:53:52 -04:00
Jason Tang 5ecce5c287 Remove gfxipVersion_ from device level
Change-Id: I11485beffdb9371a20d7abcaa1d1774c102db574
2020-09-07 11:33:49 -04:00
Alex Xie 2c2665665d SWDEV-250136 - [LNX][Navi21][OCL over ROCr] OpenCL-GL sharing failed
Change-Id: Id61f649f035964d14f6399dbea03137c11f8eaea
2020-09-06 10:40:56 -04:00
kjayapra-amd 0163d8acc0 SWDEV-240800 - P2P device attributes support
Change-Id: I2b060a66715f676dfb7136940e69e21288f509d8
2020-09-03 14:41:53 -04:00
Sarbojit Sarkar 8ac8384aea Fix for HIP_VISIBLE_DEVICE [SWDEV-247751]
Change-Id: Iff0ca6646f9d97b1ffa378c3cdc44159b6bf8ad0
2020-09-02 02:08:56 -04:00