Use the database provided by libdrm-amdgpu,as this is maintained by AMD
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: I319a46d833cb23173a77fdff1deae69ea58588b8
[ROCm/ROCR-Runtime commit: cb1c84d99b]
The major version of the debug ioctl functions has been updated to 10.
Change-Id: Iddc8656ad07c92aa30c6a7a99add28ab3a3f5a80
[ROCm/ROCR-Runtime commit: d0ae4b1f3f]
If lookup is successful, device info from find_hsa_gfxip_device() is
used to populate props->EngineId.ui32 gfx version fields and node CAL
name (props->AMDName).
If unsuccessful, uses gfx_target_version sysfs field if present
(otherwise results in error), and sets the node CAL name to
"GFX<GFX_VERSION>" (e.g. 9.0.8 -> GFX090008).
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id39c521b769aebbe40c934f19e03150a66884cce
[ROCm/ROCR-Runtime commit: bb8deeae11]
Some g_system and Node ID checks already performed by validate_nodeid().
Fixes bug where hsaKmtGetNodeProperties() would return on
validate_nodeid() error without releasing lock. Switches some
conditionals to return INVALID_NODE_UNIT instead of INVALID_PARAMETER if
NodeId >= NumNodes. Removes some g_system assertions to return error
code rather than trigger a hard fault.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id1604b20c2cef8808b98cdad61bd47aa7ea3d229
[ROCm/ROCR-Runtime commit: 29369753f5]
All conditional logic previously dependent on asic_family now dependent
on gfx version. As such, HSA_FORCE_ASIC_TYPE is now deprecated and
HSA_OVERRIDE_GFX_VERSION should be used instead.
device_info structs containing asic_family, eop_buffer_size, and
doorbell_size removed (alongside dev_lookup_table[]). eop_buffer_size
and doorbell_size now determined via macro, with eop_buffer_size and
full gfx version field being added to queue struct.
Certain funcs previously dependent on DID or GPU ID now dependent on
Node ID (due to use of get_gfxv_by_node_id()).
Fixes sleeper bug where ctl_stack_size and debug_memory_size were being
incorrectly programmed on gfx90a.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Iaabdc5c73920ad83b4b379cd6086992357b8ff10
[ROCm/ROCR-Runtime commit: 8f883d0830]
get_block_properties() switch statement now based on major GFX version
instead of asic_family. Addition for NPI bringup only needed on major
GFX revisions unless differing perf_counter_block assignment necessary.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Ia02676d2a3a8f968b67feeafbab534ef4c01c0dd
[ROCm/ROCR-Runtime commit: 0b46d418c3]
Add defines for converting between full gfx version (in decimal) to
major/minor/stepping values, and major/minor/stepping values to full gfx
version (in hex). The first is to be used when grabbing the gfx version
from sysfs, the second when returning the gfx version in
get_gfxv_by_node_id() for comparisions in Thunk.
Add enum for defines of full gfx versions for various cards. These are
to be used in conditionals to replace CHIP_*/asic_family comparisons. On
NPI bringup, addition to this enum will not be required for
functionality unless explicitly needed for a conditional. Most ASICs in
this enum simply for completeness.
Add get_gfxv_by_node_id(): returns full gfx version in hex.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I9d1dba7fdd4a587a000eea2f4141a1d301bf4776
[ROCm/ROCR-Runtime commit: 8880610265]
Expand check control stack size for Beige Goby, Van Gogh and Yellow Carp.
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: I6c8345bbb751eb9179fc740fe1674504b4295a5f
[ROCm/ROCR-Runtime commit: fc216a3668]
Put CHIP_gfx90a next to CHIP_gfx908 to keep all the GFXv9
chips together.
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: I32b4b7f7746ae4bdaff7e178f13307c1bcfa93e1
[ROCm/ROCR-Runtime commit: 80e4cb6261]
hsaKmtQueryPointerInfo return vm_obj flags for all below registered
memory types other than hsaKmtAllocMemory, and set the CoarseGrain flag
correctly for:
Graphics: always coarse grain.
Shared: hsaKmtShareMemory pass mflags with export handle to KFD to store
in KFD objs, hsaKmtRegisterSharedHandle get mflags from KFD with import
handle.
Userptr: it is already coarse-grain by default, or based on mflags
provided in hsaKmtRegisterMemoryWithFlags call.
Change-Id: Idc23e8b0cf599b02580737639da2f9ef4ccd0c0d
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: fa7b4a6268]
Query pointer info returns KFD_IOC_ALLOC_MEM_FLAGS_* flags, it should
return HsaMemFlags, fix it by renaming vm_obj->flags to mflags and
always saving HsaMemFlags.
Use consistent function parameter and variable name to avoid confusion:
mflags for HsaMemFlags and ioc_flags for KFD_IOC_ALLOC_MEM_FLAGS_*
flags.
AMDKFD_IOC_GET_DMABUF_INFO return ioc_flags, translate it to mflags
using new helper fmm_translate_ioc_to_hsa_flags.
Change-Id: If9e117c507139c0166abb1ab0df8c233ef7e48a1
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 2c796e62be]
0x73E3 DID was missing, add it.
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: Id1ae2f268e0e8b5cfec5ae2065153fe73854b93a
[ROCm/ROCR-Runtime commit: ed62c7aa1c]
Add hsaKmtRuntimeEnable and disable.
Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Change-Id: I083f9293948e975546a1b3c1334cb41499b9ab1f
[ROCm/ROCR-Runtime commit: 1ce548829b]
The debugger and debug agent no longer use the Thunk API.
Remove all deprecated functions and keep commented
references for future KFD tests.
Update and the keep the version checks for future use
and hsaKmtRuntimeEnable/Disable.
Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Change-Id: Ia2f10d82f5ac36d0bd1bda233810f26e8a154d55
[ROCm/ROCR-Runtime commit: 31ac82617c]
Update hsaKmtCreateQueue to initialize the new save area header with the
exception payload and event ID.
Signed-by-off: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Reviewed-by: Sean Keely <sean.keely@amd.com>
Change-Id: Icd38062dc982cb29b30644699014eeb0b3e26d00
[ROCm/ROCR-Runtime commit: 96c7a5c9dc]
__fmm_release is sometimes called with the aperture lock, and sometimes
without. Consistently call it with the aperture lock held and remove the
lock/unlock calls from this function.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I80dddc64cc0703e5eed8e9f1eb65b75a2c7ae2eb
[ROCm/ROCR-Runtime commit: 5fac7dcc3b]
Unlock mutex if MMIO mapping fails. This happens on all GFXv8 GPUs.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I1dee1cbddefd9185c24ea79377f49f8ae2c5ff57
[ROCm/ROCR-Runtime commit: 19536080a8]
This patch is to add yellow carp support on thunk.
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: Icfecc3fd1f472c9924f934c6a5352448356d83df
[ROCm/ROCR-Runtime commit: a55551309c]
Warn that HSA_FORCE_ASIC_TYPE may be needed if the engine major id
assertion fails.
Change-Id: I67e01e99c3d1bdc84630ccfae489dce5e77961b5
[ROCm/ROCR-Runtime commit: 408fca0278]
Aperture locking is too fine-grained, it has race between find userptr
and allocate userptr object.
Change _fmm_allocate_device and fmm_allocate_memory_object to not take
the aperture lock, the callers take it, this implements an atomic find
userptr or allocate a new one.
Change-Id: I6773404e22c1f4382a211c5a9817df23c5534a2a
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: c4d5ee28f0]
it is to optimize memory allocation latency, which
changes alignment from 2MB to 1GB.
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: I7818e9f13b17e2c0992e75b17f978dc03a018a57
[ROCm/ROCR-Runtime commit: 973b35bc06]
Device cgroup can limit accessible devices. Handle the cases where
p2p_links are not accessible
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I513dc75ad14e4f2d426cf2fbd301bcba12b4ee54
[ROCm/ROCR-Runtime commit: e28b3fe8b3]
It is gfx90a VF device ID, for virtualization support.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I9e51d6b58c702d185e6758a9c511e9b8bc72c2f5
[ROCm/ROCR-Runtime commit: d8d8e3ddd6]
XNACK API for GPUs that support this mode. This API
makes calls to amdgpu driver to configure xnack mode.
It supports set xnack mode and query the current mode used.
Change-Id: If865fd0e3f900f008243dc49504e1a0694e1791a
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: bb441d0bdd]
Query the KFD interface version once and store it in a global variable.
This makes it more efficient for KFD APIs to query the API version
later.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I267f3465f754e78fb21a7c42c5877cd68eaa9d05
[ROCm/ROCR-Runtime commit: 43ce63b68b]
This reverts commit a247255a6a.
SVM is not ready yet. This was merged by accident.
Change-Id: I372f7d293fd38429ec570bc0e0add7e612871594
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: 4ebda913cd]
This reverts commit 2c1c2cfdf8.
SVM is not ready yet. This was merged by accident.
Change-Id: I7c0d835a0d3a448f2ac1094f818601e5d6363045
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: a8f4c43fef]
Set the KFD_IOC_ALLOC_MEM_FLAGS_COHERENT flag and
KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED flag to allocate
uncached coherent memory when HSA_DISABLE_CACHE
environment variable is set. At KFD driver,
Single KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED flag is
not sufficient to allocate uncached memory. We
have to use both two flags to allocate uncached
memory.
Change-Id: Ie490f37b2e696314e60048f5b1b57442431696e9
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
[ROCm/ROCR-Runtime commit: ae0e74095e]
Before gfx90a, coherent memory is uncached. So it was reasonable
when environment variable HSA_DISABLE_CACHE is set, memory is mapped
as coherent. On gfx90a, coherent memory can be cached, so mapping
memory as coherent can't guarantee memory is uncached. When
HSA_DISABLE_CACHE is set, we have to map memory as uncached.
Change-Id: Ia5ed4cf0ad6aef5644dc8c9e6632b52d606f06f4
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
[ROCm/ROCR-Runtime commit: f132fb2cd0]
This change might be redundant if ROCr takes care of it
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I7b67143a8ad21baa61b7eda7b8e5fe0ac1e33830
[ROCm/ROCR-Runtime commit: 10674916e4]
This change is for the A+A bring-up branch as it needs to made more
generic to handle all ASICs.
For A+A all the system buffers are mapped as NC (non coherent) unless
explicitly marked as UC (uncached). The coherency is then expected to be
handled by shader by explicitly using acquire/release instructions.
However, CP doesn't have same feature. The buffers used by CP thus have
to UC. For now queue buffer and Signal handler memory is marked as UC.
This change shouldn't affect other ASICs since Uncached flag is not used
in those. However, this change still need to be made more generic.
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I56c37a809913f7f08c94d01b0572d0f4864939aa
[ROCm/ROCR-Runtime commit: 7c05c5240f]
On gfx9, the maximum number of wavefronts per queue is the minimum of
40 waves per compute units, or 512 waves per shader engine. On gfx10,
there can only be 32 waves per compute units.
Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Change-Id: I148d1a4fe6c07cdbfaa1f77939eb29311c81c008
[ROCm/ROCR-Runtime commit: 4cf11c3a7e]
Reserve some space in the context save area for the debugger's
use. There should be 32 bytes per wave for a given queue.
Change-Id: I65ddb6123d0f6afd3149844617ad19023009101d
[ROCm/ROCR-Runtime commit: a83f9b67ce]
XNACK API for GPUs that support this mode. This API
makes calls to amdgpu driver to configure xnack mode.
It supports set xnack mode and query the current mode used.
Change-Id: If865fd0e3f900f008243dc49504e1a0694e1791a
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: 3f45f602d4]
Chengming Gui
Jinzhou Su
Mike Li
Tony Tye
Graham Sider
Aaron Liu
chen gong
Philip Yang
Kent Russell
Jonathan Kim
Felix Kuehling
Sean Keely
Alex Sierra
Harish Kasiviswanathan
Oak Zeng
Laurent Morichetti