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13 Commits

Author SHA1 Message Date
Danylo Lytovchenko f7338717ae SWDEV-470698 - fix formatting, add format check workflow (#657) 2025-08-20 19:58:06 +05:30
Sourabh Betigeri e3c4a81b69 SWDEV-502219 - Adds validity checks for negative parameters passed 
Change-Id: Ib8a531533306a27143d74b81c074de81051eb896


[ROCm/clr commit: c460b0541b]
 2025-01-24 16:32:29 -05:00
Sourabh Betigeri 7261404002 SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs 
Change-Id: I5ac63a6626af8c2b4ac382c52dfe1aaf0b3716b8


[ROCm/clr commit: 03dbcd8ca7]
 2024-12-12 19:29:24 -05:00
Sourabh Betigeri 1712acdd2e Revert "SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs" 
This reverts commit ab0ff9163d.

Reason for revert: hipInfo fails on windows. Updating llvm amd-mainline-closed

Change-Id: I57e1fa1945188b0bc0a799c4f3d540f2b7713003


[ROCm/clr commit: 2ca644cf22]
 2024-12-02 16:46:12 -05:00
Sourabh Betigeri ab0ff9163d SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs 
Change-Id: I449ffca44bbb04d13348d112e896d603c70fd485


[ROCm/clr commit: bd5d8e9baf]
 2024-11-30 17:54:32 -05:00
Anusha GodavarthySurya 3bdedf0cc7 SWDEV-351966 - Dispatch table for hip runtime 
Change-Id: Ie4a44fa8cf1ff9c152146070bbbf6b0636d4e325


[ROCm/clr commit: 5e21f0c6bd]
 2023-11-22 01:11:19 -05:00
Ioannis Assiouras 2633e62801 SWDEV-381402 - Derive hip::Stream from amd::HostQueue 
Change-Id: I6c1aca5eb350c32d974ae4ffcc725705355956d8


[ROCm/clr commit: e3633dc8f4]
 2023-02-21 18:12:03 -05:00
Satyanvesh Dittakavi 25ff252d73 SWDEV-362371 - Uninitialized stream error checks 
Change-Id: I7e04ef46f0cf2b0c45caf42d5b2ee31cb68e93eb


[ROCm/clr commit: bded3d8d1f]
 2022-10-20 21:57:11 -04:00
sdashmiz a320f27ea1 SWDEV-341993 - correct parameters checks 
flags, ptr and stream

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I306be503e8c15db1641eaeeae73e349a99f871ae


[ROCm/clr commit: 683b28d573]
 2022-06-22 04:22:55 -04:00
Sourabh f1486e33e4 SWDEV-292525 - [hipamd] Use a blit to streamWait 
Implementation to use a blit kernel to perform
a hipStreamWait instead of an AQL packet.

Change-Id: I9d9bc1dd793c1454e91e68afb793460749e10d2e


[ROCm/clr commit: 4177d20877]
 2021-09-27 13:59:21 -04:00
Sourabh Betigeri c396ebad94 SWDEV-292523 - [hipamd]Change in the signature of streamOperations APIs, particularly 'value' arg to unsigned 'value' 
Change-Id: I7e31508622865b9986c886c4218ba394ffe9cf9e


[ROCm/clr commit: cbbf627662]
 2021-07-22 16:24:27 -04:00
agunashe fae697b4d6 SWDEV-293742 - Update copyrights end year for hipamd 
Change-Id: I08f620f84563a9214b59f1b943ed091b67229eab


[ROCm/clr commit: d9d9e81acb]
 2021-07-09 12:08:39 -04:00
Rahul Garg dd95d3d23c ROCMOPS-1956 - Push restructured code to hipamd 
hipamd will have AMD's ROCCLR based HIP backend implementation

Change-Id: Id7de9634519b4ce46fca71a1b61f3d5b1e3fc459


[ROCm/clr commit: 19c84bc604]
 2021-06-07 21:42:44 +00:00