Commit Graph

16 Commits

Author SHA1 Message Date
Alex Xie 6c5a42b33c SWDEV-232894 Port hipMemcpy optimizations from HCC to VDI
Apply the optimization to change for OpenCL too.
Clean up some unnecessary checks.

Change-Id: I840261fe35baeeadeba7388e86779d482f509aad
2020-04-30 11:06:28 -04:00
Christophe Paquot b54c3f7db9 Couple of cleanups.
Remove queue limitation since we loop through HW queues now.
Add a DevLogError if we fail to create the hsa_queue. A ticket showed a regression there.

Change-Id: I4f58e405f88e75600a762f6d6352838c969cdb5e
2020-04-29 09:18:07 -07:00
agodavar f149fe0803 P2PStating buffer allocation when P2P is not enabled between all GPUs
SWDEV-232580 & SWDEV-232580
Allocate p2p statging buffer when full P2P access is not available between all devices.
p2p staging buffer will eventually be used when required.

Change-Id: If8490ba7b1c52c432c1e942ae95421b9d2ec7097
2020-04-28 07:10:57 -04:00
Alex Xie 009d0b5f55 SWDEV-232894 Port hipMemcpy optimizations from HCC to VDI
Change-Id: I6bebe9ac503a9f80d067aeea8a848409ad210338
2020-04-27 14:53:58 -04:00
German Andryeyev 082cbfa1f5 Don't attempt to reuse the cooperative queue
Change-Id: I0e98e292a562715a7b395118f899af859f3e42bb
2020-04-27 09:18:05 -04:00
Michael LIAO 97f55b5c7f [vdi] Add device assertion support.
- Once device assertion occurs, abort the host execution as well.
- TODO: This's the initial support. As we need to drain hostcall queue
  to ensure device assertion message being flushed out, hostcall
  listener needs an interface to explicitly drain its queue.

Change-Id: I8a04400aa7109bfd054ae5777c41a4abbf0db4a9
2020-04-22 10:03:55 -04:00
kjayapra-amd 7458bf9964 SWDEV-229840 - Improve error messages on ROCCLR Layer.
Change-Id: Iab7d9156cdc206db86385aa05023a0095ed40f92
2020-04-19 20:01:49 -04:00
German Andryeyev 481d526859 SWDEV-184709 - support hipLaunchCooperativeKernel()
- Enable cooperative groups support, based on ROCr capability

Change-Id: I975bcea0af7865009eaed24454ce71d897ea8fc4
2020-04-01 12:13:33 -04:00
German Andryeyev 7ef8dfdfe7 SWDEV-184709 - support hipLaunchCooperativeKernel()
Add ROCr cooperative queue allocation

Change-Id: I1384482692f4080d31255b09e0f68a21ccad3da8
2020-03-30 16:09:09 -04:00
Vladislav Sytchenko 52046e41b2 SWDEV-224023
Correct typo.

Change-Id: I72131a6e0210e7b961e586cd0ae18608d21fc529
2020-03-15 16:37:25 -04:00
Vladislav Sytchenko e76d867740 SWDEV-224023
Each WGP consists of 2 CU, so the number of available SIMD units is doubled.

Change-Id: I43978a8a9139c33f5f776b344a36bee927cc187d
2020-03-06 13:43:36 -05:00
Saleel Kudchadker 0730b39adb Implement HIP_HIDDEN_FREE_MEM env var
Set value to 256Mb to reflect what HIP/HCC reserves
Change-Id: Icaadf79f60d3916965ac168da237d15b975b1fe4
2020-02-14 12:57:11 -05:00
Karthik Jayaprakash 7fb53890b8 SWDEV-210443 - For Numa nodes pick up the CPU that has Memory pool.
Change-Id: If52852b6f12053e4dfe8a83b8aa5743137c3d6dc
2020-02-13 20:48:37 -05:00
Laurent Morichetti d9d9c69399 Replace cl_* integral types with standard types.
cl_bool -> bool
cl_int -> int32_t
cl_uint -> uint32_t
cl_long -> int64_t
cl_ulong -> uint64_t
cl_float -> float
cl_double -> double
cl_bitfield -> uint64_t

Change-Id: I840c8993b55f98f5b745d21e27f5f28233647a58
2020-02-12 13:16:06 -08:00
Laurent Morichetti b4c6143a2f Update copyright info
Change-Id: Ia4f9ff0f5f873b4223a8cca154188bb0d2f1abba
2020-02-04 09:26:14 -08:00
Laurent Morichetti 20c7173849 Merge branch 'origin/pghafari/vdi-prototype' into lmoriche/amd-master
Change-Id: Id3b833d405596735becb3346f3b08c6da57033fe
2020-01-30 20:12:13 -08:00