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5 Commits

Author SHA1 Message Date
agodavar 53a0b62f82 SWDEV-268552 - HIP sample segfaults during hipModuleLoad, fix mmap bug 
Change-Id: I51c6061e7ac6b2524586d96fdd69b9f084b1906a


[ROCm/clr commit: 2d2f127b8a]
 2021-01-27 23:39:50 -05:00
agodavar 83c5482710 SWDEV-268552 - HIP sample hipDispatchEnqueueRateMT segfaults, updated to use hipModuleLoadData 
Change-Id: Ibf34c780d5bd4278adcedba1d6e057637c258485


[ROCm/clr commit: f4edf51736]
 2021-01-19 09:32:14 -05:00
Tao Sang 2c1c9f78d6 Remove hip-hcc codes: Part three 
1.Rename include/hip/hcc_detail/ as include/hip/amd_detail/

2.Rename include/hip/nvcc_detail/ as include/hip/nvidia_detail/

3.Create __HIP_PLATFORM_AMD__ to replace __HIP_PLATFORM_HCC__

4.Create __HIP_PLATFORM_NVIDIA__ to replace __HIP_PLATFORM_NVCC__

After hcc_detail, nvcc_detail, __HIP_PLATFORM_HCC__ and __HIP_PLATFORM_NVCC__
have been removed from upstream, they will be removed from hip runtime.

Change-Id: I1ae457effd739d6c25bca203c1724b026be21fce


[ROCm/clr commit: 8a2b0b7424]
 2021-01-05 10:39:31 -05:00
Rahul Garg 608fded501 Fix hipDispatchEnqueueRateMT sample 
Change-Id: I7ade0dcf8b32ac90a311022d12339740b2b3df44


[ROCm/clr commit: ee3dbfac49]
 2020-08-14 18:56:39 -04:00
Rahul Garg 50395502b6 [sample] Add hipDispatchEnqueueRateMT (#1869) 
* [sample] Add hipDispatchEnqueueRateMT



[ROCm/clr commit: 893ccc4ddf]
 2020-02-13 23:21:40 -08:00