Commit Graph

5330 Commits

Author SHA1 Message Date
Tao Sang 7803594aea SWDEV-458943 - Add fast path in wait()
wait() is redesigned with two pathes:
fast path: Use spinlock to wait for notify signal. If the
 signal hasn't been received for some loops, go to slow path.
slow path: Use condition_variable's wait().

Improve monitor wrapper for better performance.

Fix some bugs left from name removing patch.

Change-Id: I893a8353121a25d11e37c8e631caf31cc1fc1f24


[ROCm/clr commit: f2ff56af9c]
2025-01-28 12:19:55 -05:00
Saleel Kudchadker c6eef97e3e SWDEV-504494 - Set active engine for SDMA
Change-Id: I4cec84e71903c5813a7063e8b9ff1ea4473f4720


[ROCm/clr commit: d208e8052f]
2025-01-27 17:54:36 -05:00
Jacob Lambert d7371306b0 SWDEV-360440 - Prepare CLR CMake for Comgr V3 transition
Change-Id: Ia279928fd3549a45bae561d0d2d8fcf110d8c245


[ROCm/clr commit: 1fc7c6bb9a]
2025-01-27 01:09:23 -05:00
Ioannis Assiouras 8169855390 SWDEV-510319 - Fixed random segfaults in graph tests
This change fixes random segfaults in graph tests that
are seen after the change make internal callbacks non-blocking.
The callback thread that decreases the GraphExec ref count
may now run after the runtime shutdown. This can cause a segfault
because the hip::device that is accessed in GraphExec destructor
is already destroyed during runtime shutdown. This patch ensures
that the hip::device object  stays alive until after the
callback thread completes.

Change-Id: I75a6ac01f27a0b2250bbd10ed389ebfb322927af


[ROCm/clr commit: 21c223f8df]
2025-01-25 09:54:15 -05:00
Saleel Kudchadker ae7e2ecb85 SWDEV-510186 - Improve logging of kernel names
- Demangle kernel names in logs

Change-Id: I9aa58e8c109becb45ef7fc747d991bd657c4190a


[ROCm/clr commit: 9b7e0ad48a]
2025-01-24 11:43:02 -05:00
taosang2 590465543d SWDEV-507969 - Fix wrong VGPRs for some devices
Change-Id: Ia8fc19564272e2c7171d991376bf896a99085a97


[ROCm/clr commit: 799e54aa0d]
2025-01-22 10:11:47 -05:00
Pengda Xie 86921cd750 SWDEV-508590 - Fix segfault issue with hipModuleLoad
- Ensuring devProgram pointer isn't nullptr

Change-Id: Ia5786d0a2441f3a512d79b4998eb314beb98b35e


[ROCm/clr commit: f76733e5b8]
2025-01-21 11:38:37 -05:00
Sourabh Betigeri ac32b2e77e SWDEV-507104 - Removes alignment requirement for Semaphore class to resolve runtime misaligned memory issues
Change-Id: I1be3eb6e9fdcf12e995c8fe8ee30592c94f7f97a


[ROCm/clr commit: e4ba0b6262]
2025-01-20 11:27:47 -05:00
Jatin Chaudhary 0795f00a14 SWDEV-341217 - Initial work to use SPIRV in HIP
Change-Id: If5c09b5e86b498e7ac5eb05adf28cb7a1fac8101


[ROCm/clr commit: 6a5d19059d]
2025-01-20 03:54:23 -05:00
Branislav Brzak 05057b2a88 SWDEV-508743 - [6.4 Preview] Add ROCm 7.0 breaking change fields
Change-Id: I07bff42731e74a4c409505cf8981342e22ce26be


[ROCm/clr commit: 3fd46a3783]
2025-01-17 06:25:27 -05:00
Aidan Belton-Schure dc2fa93f37 SWDEV-482851 - Do not release last suballocator chunk
Change-Id: Ib28dc9df68e454ee0c0c699c1ff17588fd55f802


[ROCm/clr commit: 451b0ce768]
2025-01-13 10:14:40 -05:00
Daniel Livingston 50387f6eb5 SWDEV-489003 - [Ubertrace] OCL/HIP profiles are missing event instrumentation
Adds UberTrace support for pre-dispatch markers and barrier begin/end markers.

Moves shared definitions out of palgpuopen.hpp into shared header
palcapturemgr.hpp.

Change-Id: I9f464c689e7ff12c54eca043fc1ad65e1836a64f


[ROCm/clr commit: 541c449ce2]
2025-01-10 11:28:52 -05:00
Anusha GodavarthySurya 08c92f4793 SWDEV-480209 - Make internal callbacks non-blocking
Change-Id: Ic918d08f341abfd9a7c167d09f9c723cdc43157f


[ROCm/clr commit: 683a942364]
2025-01-10 02:16:11 -05:00
Saleel Kudchadker 16f14e4b00 SWDEV-504494 - Use system scope for D2H
- When using shader copy, make sure to use release scope for the AQL
  packet. This is a potential bug but is hidden as hipMemcpyAsync always
needs synchronization(which inserts a barrier with release scope). For
hipMemcpy we use a barrier packet to make sure its blocking. Eitherways
a barrier gets always used and hides in some ways a potential bug.

Change-Id: I57fb7f769c3179e76d712471c0905104c801d7ba


[ROCm/clr commit: c9dd95bf6c]
2025-01-10 00:34:08 -05:00
Evgenii Averin ef2a812d0a SWDEV-505769 - Fix typo
Change-Id: I2d3f65ed68157718c4439a9da7d2dcdfcbb9f93d


[ROCm/clr commit: b62995ce1a]
2025-01-08 21:31:17 -05:00
Sourabh Betigeri 36f3d7647c SWDEV-505971 - Fix size mismatch of count type to uint32_t
Change-Id: Ie526f828f816e6681ef1735d5edb2db895dace57


[ROCm/clr commit: f5b2516f5d]
2025-01-08 12:47:36 -05:00
Saleel Kudchadker d4594531ef SWDEV-506251 - Disable blit copy thresold for OpenCL
Change-Id: Id0ca43b13d5792791a42da263f6aa4496382cea6


[ROCm/clr commit: 39801b5750]
2025-01-08 02:46:01 +00:00
Saleel Kudchadker a18f2c549c SWDEV-504494 - Flush to systemscope when copying non-coherent mem
- When we use blit(compute) copies, two subsequent copies may read for
  the same source buffer, the buffer may get modified by the host in
between and if the src buffer was allocated with non-coherent flag, the
device may simply use stale value from previous cacheline fetch. This is
a corner case.

Change-Id: I2ce261c6f6fa4e5bb608f116548e5cc711ae6f3c


[ROCm/clr commit: b63005d550]
2025-01-07 12:49:22 -05:00
Jatin Jaikishan Chaudhary 8b1d0cff83 Revert "SWDEV-505971 - change setArgument arg from uint32_t to uint64_t"
This reverts commit 0830d95f6d.

Reason for revert: There needs to be memcpy size change

Change-Id: If4f51769731e54743ac705b19b4f81b2d5925d5a


[ROCm/clr commit: 446ed661a0]
2025-01-06 18:03:23 -05:00
Jatin Chaudhary 0830d95f6d SWDEV-505971 - change setArgument arg from uint32_t to uint64_t
We are passing this arg as an address, and memcpy complains about
overreading (8 bytes instead of 4).

Change-Id: Ica9207f6c5f6056a4bfc968280c76e779ded13ae


[ROCm/clr commit: a6f2a2c2af]
2025-01-06 08:16:59 -05:00
Pengda Xie 612ae28524 SWDEV-505833 - Provide functionality to avoid L2 flush for CPX mode for dispatch packets
- Added DEBUG_CLR_SKIP_RELEASE_SCOPE flag to force release scope to
   SCOPE_NONE in AQL packet header

Change-Id: Ife02cddb9d5cd4749103ce585d3d5fe9024c6868


[ROCm/clr commit: 8155943c5f]
2025-01-03 17:28:21 -05:00
Amit Pandey 81a25f9614 SWDEV-490256 - Fix uri_decode logic to handle Memory URI.
Uri decoder logic currently silently ignores processing of memory uri.
This patch enables the existing logic to handle the processing of offset
and size related to loaded code-object having memory URI.

Change-Id: If03579cefb11d91f667410464dc89404df9270a3


[ROCm/clr commit: 11cd37ce0b]
2024-12-25 11:07:16 -05:00
taosang2 da613fbbeb SWDEV-479958 - Support different address mode
Support different address modes in X, Y, Z directions

Change-Id: If1db5a8af33c92dd14b48968c3e8eceb97daea6c


[ROCm/clr commit: d82d6a78cf]
2024-12-23 16:39:54 -05:00
sonadeem ad3d2b0679 SWDEV-503436 - Fix incorrect OptionGroup for FSanitize option
NOPTION is meant for component options or alias runtime options so
the option group must not be OA_RUNTIME or OA_MISC_ALIAS must be set,
otherwise we incorrectly assume that it has an option variable and
attempting to write to it causes corruption of OptionVariables.

Change-Id: Iafb5a8f743e5ed0f87be36061c44578178f6cfde


[ROCm/clr commit: caa10572cb]
2024-12-20 10:14:51 -05:00
Saleel Kudchadker fda4ff1f9d SWDEV-504340 - Move cast of cl_mem inside the condition
Change-Id: I9c91f5d945a8d8bd2b2f55e3d11ede66afe4eef7


[ROCm/clr commit: fa63919a63]
2024-12-17 12:58:12 -05:00
Ioannis Assiouras 2c8805e536 SWDEV-483134 - Remove hipExtHostAlloc API
Change-Id: I60777ef5c56b60dd8100d0d794ca10fb3b96a555


[ROCm/clr commit: e8b2fdab96]
2024-12-16 17:13:49 -05:00
Pengda Xie 17c7b3b270 SWDEV-503764 - Add wptr and rptr to ClPrint for dispatch barrier methods
- added wptr and rptr to ClPrint in dispatchBarrierPacket and dispatchBarrierValuePacket

Change-Id: I8a62289deb23c9f657a9b0ac6138bb55eafecba2


[ROCm/clr commit: 078fe7e5de]
2024-12-16 16:45:30 -05:00
Ioannis Assiouras 7670376748 SWDEV-489255 - Update stack size limit in rocvirtual
Change-Id: I2aac9d211f64b3d6c121d8b010d215dcbdeac3aa


[ROCm/clr commit: a808c4b23a]
2024-12-16 09:30:39 -05:00
Saleel Kudchadker 5255fd1fa3 SWDEV-301667 - Clear dispatch indicator signal flag
Change-Id: I9028df0bb73289791d169e7f064a1d0f615236a5


[ROCm/clr commit: 93f1e8ff60]
2024-12-12 21:20:05 -05:00
Sourabh Betigeri 7261404002 SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs
Change-Id: I5ac63a6626af8c2b4ac382c52dfe1aaf0b3716b8


[ROCm/clr commit: 03dbcd8ca7]
2024-12-12 19:29:24 -05:00
Tao Sang fb76b9620c SWDEV-496667 - Support gfx9-4-generic target
Support gfx9-4-generic target to cover mi3XX.
Support features sramecc and xnack in generic target.
Improve some code formats.
Add more log on compiler.

Change-Id: I6b3c6af55c60cffd43ce6f17b75998f751b75713


[ROCm/clr commit: 3ad8f1b811]
2024-12-12 14:43:39 -05:00
Michael Xie 945ae82918 SWDEV-499997 - Unify ManagedBuffer and KernelArg buffer implementation
Change-Id: I95421c87904dd62d7ee214539a57c7bda1097ff4


[ROCm/clr commit: cfcc743824]
2024-12-12 12:56:23 -05:00
Saleel Kudchadker 954c43d798 SWDEV-503761 - Reintroduce save-temps path for OpenCL
Change-Id: I5e111047242aed7d982b7a25c11ab52293af639d


[ROCm/clr commit: 23c21d5181]
2024-12-11 13:01:29 -05:00
German Andryeyev 185e95ae81 SWDEV-501757 - Clean-up signal creation
Use hsa_amd_signal_create() if settings.system_scope_signal_ is true.

Change-Id: I6d440155dfbcd5bf03658583a93827cb1c56537c


[ROCm/clr commit: 14f58fc74d]
2024-12-11 09:57:50 -05:00
Gerardo Hernandez d96c631de0 SWDEV-496392 - Remove references to ASIC Polaris22 in pal::Settings and pal::Device (it is being retired)
Change-Id: I6318abf3e46ed250d087a3d2266d2ae3d4c8c000


[ROCm/clr commit: 03e4057fce]
2024-12-10 06:01:32 -05:00
German Andryeyev 6604accdb3 SWDEV-501757 - Use signals without interrupts
In active wait mode use signals without interrupts by default and switch
to the interrupts only if a callback is required.

Change-Id: Ibcde8f7d44c70f8fb8fa5e0a7fdd8b08a2982a8e


[ROCm/clr commit: f4b9d3b7bd]
2024-12-09 15:16:15 -05:00
Ajay 7346f3bd29 SWDEV-498474 - APU: when total allocated is greater than 75% of invisible
Only when memory type is Local and the invisible memory is +ve
Should also fix SWDEV-490991

Change-Id: I78a4925a234ba90c63909bde5b7dc217568b4de3


[ROCm/clr commit: 7d763fb803]
2024-12-09 12:06:57 -05:00
Marko Arandjelovic 12dc02b4f8 SWDEV-495609 - Change include path for rocclr/utils
- Header files inside rocclr/utils when included from hipamd or opencl should be included as #include "rocclr/utils/xxx.h" instead of "utils/xxx.h"

Change-Id: Ic0760c33b9d091f5620dec67e5482c9698d22093


[ROCm/clr commit: 78f62d3230]
2024-12-05 11:44:20 -05:00
Saleel Kudchadker 7d7aa8b69c SWDEV-497145 - Use rocr copyOnEngine API for staged copies
- Refactor blit code and clean ASAN instrumentation
- Use unified function for rocr copy
- Enable shader copy path for unpinned writeBuffer/readBuffer paths
- Set GPU_FORCE_BLIT_COPY_SIZE=16 which means we will use BLIT copy for
  pinned copies or unpinned H2D/D2H copies < 16KB

Change-Id: I42045cca79234b340dbf53dafb93044199736ae4


[ROCm/clr commit: 7863eb92dc]
2024-12-04 13:38:13 -05:00
Jatin Chaudhary 5bc1cfa2d9 SWDEV-485945 - use union to convert values
this shows up in some compilers as warnings.

Change-Id: I862cd6baf2edb8161757adc54abb787530489481


[ROCm/clr commit: 063f7ef32a]
2024-12-04 11:15:03 -05:00
Jimbo Xie 91a8ee1a96 SWDEV-485672 - LOG_INFO corrected to LOG_ERROR for errors
Change-Id: I8ab5f2117dfd7725bd4ed8b178e370096aa31018


[ROCm/clr commit: 6c755a4116]
2024-12-04 01:18:01 -05:00
Sourabh Betigeri 1712acdd2e Revert "SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs"
This reverts commit ab0ff9163d.

Reason for revert: hipInfo fails on windows. Updating llvm amd-mainline-closed

Change-Id: I57e1fa1945188b0bc0a799c4f3d540f2b7713003


[ROCm/clr commit: 2ca644cf22]
2024-12-02 16:46:12 -05:00
Aidan Belton-Schure 838cfe1d29 SWDEV-485827 release hostcall listener memory regardless of thread status
The early return if the thread is not alive causes memory leaks.
Neither doorbell_ or urilocator are released if the thread is not alive.

This change alters the logic so regardless of the thread status the
HostcallListener releases its memory.

Change-Id: Ie912360ec0e2ee257de9937b1a8d7375e6aebd83


[ROCm/clr commit: f0063ba8da]
2024-12-02 04:42:56 -05:00
Sourabh Betigeri ab0ff9163d SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs
Change-Id: I449ffca44bbb04d13348d112e896d603c70fd485


[ROCm/clr commit: bd5d8e9baf]
2024-11-30 17:54:32 -05:00
taosang2 f3e3d8178b SWDEV-447973 - Support generic targets
Change-Id: I32db83843e45e0f013591493aafd7a532c881e16


[ROCm/clr commit: f1f4f40c5b]
2024-11-29 10:12:10 -05:00
Anusha GodavarthySurya c34f55babb SWDEV-489084 - Avoid using queue colliding with the graph launch stream
Change-Id: I3ecaf8836c8e0883441275139041c702aba0937e


[ROCm/clr commit: 06e6561eb5]
2024-11-29 08:15:58 -05:00
Aidan Belton-Schure c59a9b3253 SWDEV-485827 release initial_heap_buffer_
This PR adds the initialization and release of initial_heap_buffer_
to prevent memory leaks.

Change-Id: I4ab8721b439a1a3a6f6e53d63d870e572f7c984a


[ROCm/clr commit: f42a87dc2f]
2024-11-28 10:31:26 -05:00
Satyanvesh Dittakavi 5a16db0cd5 SWDEV-477584 - Match hipGetLastError behavior with CUDA using env var
Change-Id: I4c5acff180ae904028f7c5fdf4e109ffd1f0c4ef


[ROCm/clr commit: e3b8754448]
2024-11-28 01:33:52 -05:00
Anusha GodavarthySurya 04cc0ceeb1 SWDEV-491643 - AQL packets are captured for kernels disable sdma profiling
hsa_amd_profiling_async_copy_enable is taking 45us for the first call. Disable sdma profiling for enqueuing captured kernel packets and for accumulate command.
Change-Id: I80b51a58c46bccc9c1025e9331515f57c97b5a2a


[ROCm/clr commit: 9820480cbd]
2024-11-26 08:37:31 -05:00
Jaydeep Patel 177ef6b6f8 SWDEV-498816 - Detached thread might exit and pthread_t is invalid access to check if it is valid or not.
Hence, It is not required to check it if thread is already finished processing packets.

Change-Id: If1b43a169a06203f3e1ab0529cf592879496d7c4


[ROCm/clr commit: 3f3f3d0f1c]
2024-11-24 01:38:47 -05:00