Граф коммитов

467 Коммитов

Автор SHA1 Сообщение Дата
Aditya Atluri 14dcdff8f4 Fixed Hawaii link issues
1. Split hip_ir.ll to hip_hc.ll and hip_hc_gfx803.ll
 a. hip_hc.ll contains arch generic ir implementations
 b. hip_hc_gfx803.ll contains gfx803 (fiji, polaris) specific ir
2. HIPCC can now parse --amdgpu-target=*.
 a. Usage: hipcc --amdgpu-target=gfx803 --amdgpu-target=gfx701
 b. TODO: Convert to --amdgpu-target=gfx803,gfx701
3. With LLC in HCC able to generate native f16 isa, removed inline half asm math ops
4. Fixed threadfence and threadfence_block to use functions in rocdl

Change-Id: Ic9a9e3e04139b0d75d2c2a263c030ca77adc1019


[ROCm/clr commit: 60ec83c683]
2017-02-08 12:04:05 -06:00
Aditya Atluri 3937b398e9 changed __global__ attribute
1. Moved around tests and added them to HIT

Change-Id: I5d75280c42a5af852670ebabc7305ee56721ec7b


[ROCm/clr commit: f009f3533d]
2017-02-03 10:53:36 -06:00
Aditya Atluri f36992067b fixed symbol memcpy issue
Change-Id: I89d7401be51d194bcbf771020ba66e3d3b6a18f8


[ROCm/clr commit: 0d4e6ae60a]
2017-02-01 17:54:59 -06:00
Aditya Atluri 6c272debb9 fixed threadfence ir
Change-Id: Ia3afb54bdb50864e678d849608d72a3c321edba1


[ROCm/clr commit: 537dc7597b]
2017-01-27 08:42:26 -06:00
Ben Sander b46ee1d193 Add HIP_FAIL_SOC.
Fail sub-optimal-copies rather than perform them slowly.
SOC occur on async copy of unpinned memory, or P2P copy between GPUs
that are not peers.


[ROCm/clr commit: 1a24178c78]
2017-01-25 21:53:17 -06:00
Ben Sander ad2ba66ce6 Read HCC_OPT_FLUSH and optimize dispatch accordingly.
If HCC is in this mode, we can use less aggressive flushes in some
cases.


[ROCm/clr commit: 2f7a8ec39c]
2017-01-25 21:50:52 -06:00
Ben Sander 2ea139e30f Show dynamic shared mem usage not static.
[ROCm/clr commit: 27447f10c2]
2017-01-23 22:34:41 -06:00
Ben Sander a55362f753 Move core env var processing to env.cpp
[ROCm/clr commit: bc809460f5]
2017-01-23 22:34:41 -06:00
Ben Sander 57e1efebab Add debug tips to docs
[ROCm/clr commit: 4de3df746c]
2017-01-23 22:34:41 -06:00
Ben Sander 1ff12d95a6 Log error with ihipLogError. Cleans up CXL trace display.
[ROCm/clr commit: d19c4767b7]
2017-01-23 22:34:41 -06:00
Aditya Atluri 35631ea2a2 added ir code sad u8
Change-Id: Ie0d454b3bb9a6c9a028c091ad3aa969719b02cc9


[ROCm/clr commit: 9952117d64]
2017-01-20 17:21:51 -06:00
Aditya Atluri b6f4fedaaf fixed compilation issues for vector types and math functions
1. Added math_functions.h to hip_runtime.h
2. Changed operator overloading classifier static to static inline
3. Added vector types test for gpu
4. Seperated __host__ and __device__ for math functions in headers

Change-Id: I499862fad5d7b10da686da9011d7ecefe523f8e2


[ROCm/clr commit: 02190736e3]
2017-01-20 09:49:11 -06:00
Ben Sander 81488d5d00 Add HIP_SYNC_HOST_ALLOC, HipReadEnv
[ROCm/clr commit: db3f4889ca]
2017-01-19 23:55:24 -06:00
Ben Sander 7a992b9fc3 Change ihipDeviceSetState,ihipDevice* so it doesn't log error
Cleans up debug trace.


[ROCm/clr commit: 6de88d4293]
2017-01-19 23:55:24 -06:00
Ben Sander 48bd62db9a Doc update - describe debug techniques
Also tweak sample to remove unneeded HIP_KERNEL_NAME.
Comment update


[ROCm/clr commit: ca1cef4e06]
2017-01-19 12:40:45 -06:00
Ben Sander 3bc2e3ba02 Fix debug display for Module launch kernels
[ROCm/clr commit: 2ffc9f4e22]
2017-01-19 12:40:45 -06:00
Aditya Atluri 69903887a4 fixed compilation issues
1. Fixed compilation issues for tests
2. Added missing intrinsics + math functions
3. Disabled some device functions as they are causing linking error with HCC

Change-Id: I79d52c4c7a539cc8ef40580247ad97ffcb975f09


[ROCm/clr commit: 41a46effef]
2017-01-18 11:53:47 -06:00
Aditya Atluri 42c627fbe8 Moved device code to mimic cuda header behavior
1. All fp32, fp64 math device/host functions should be in math_functions.h/.cpp
2. All fp32, fp64 fast math intrinsics for device/host functions should be in device_functions.h/.cpp
3. All the device code implementations should be in device_util.h/.cpp
4. Hence, made changes appropriately by moving code and creating new header files
5. Added math_functions.cpp/.h
6. Changed #ifndef signature to make sure no conflicts between headers with same names in hip/hip_runtime.h and hip/hcc_detail/hip_runtime.h
7. Changed tests to fit the code changes, making them to include appropriate headers
8. Added math_functions.cpp to CMakeLists.txt
9. Some of the tests are still broken, mostly host math functions will fix them in next commit
10. TODO: FIX compilation issues for host math functions

Change-Id: I7a17637d7e294a7d224ffba932c1a08668febd26


[ROCm/clr commit: d23b6b8694]
2017-01-17 14:57:51 -06:00
Aditya Atluri 968f2e9489 enabled integer intrinsics tests
Change-Id: I5d28d556f228240eda2fc0098121ed3b29b041e7


[ROCm/clr commit: 3f9a9d9318]
2017-01-17 09:59:08 -06:00
Aditya Atluri d259da2e42 v1: Working on Integer Intrinsics
1. Half way through
2. May not work
3. No test written

Change-Id: I705b743a78b142ff068e2521870e73fca7ad2b1c


[ROCm/clr commit: feba9fe213]
2017-01-16 14:55:29 -06:00
Aditya Atluri 65552aa2c5 moved most of the fp16 code inside hip_fp16.cpp
1. As we use holder data structure, we move all the cmp, math, cvt apis to cpp file
2. All the tests passed
3. Add more extensive testing for half

Change-Id: I92c6399dace602a0a24432728e3f2a07124e6fb1


[ROCm/clr commit: e95456eee8]
2017-01-16 12:32:35 -06:00
Aditya Atluri d9845446ef Added type conversion intrinsics
1. Added all type conversion intrinsics
2. NO TESTS have been added. (Will add in next commit)
3. Sanatized code in hip_runtime.h
4. Added passed() to hipTestHalf to make it pass on HIT

Change-Id: I0987963c802fc7ff4d7e07d7b88d86da35da53c9


[ROCm/clr commit: d496576b55]
2017-01-16 12:10:05 -06:00
Aditya Atluri 4756cf7c16 added half2 math operations
1. They use SDWA + LLVM IR
2. Added these functions to test
3. Need to do exp, exp10, log, log10, rint

Change-Id: I06176acc6cb8bb054495310531777406a41b54e4


[ROCm/clr commit: eff68c989a]
2017-01-13 12:27:11 -06:00
Aditya Atluri d1f7c4e048 added packed math fp16 native device functions
1. Added SDWA implementation inside IR file
2. Added device functions to header + used them in test

Change-Id: Ib4e059a58eee201cc82438689e3e9bc5f9d26653


[ROCm/clr commit: eeef055469]
2017-01-12 14:10:51 -06:00
Aditya Atluri 5317ffa9ec Started adding native half math library support
1. Removed HIP_EXPERIMENTAL env variable so that device code will be accessed from LLVM IR
2. Removed soft support from headers and moved to hip_fp16.cpp
3. Added LLVM IR + inline asm to hip_ir.ll
4. Added test for fp16
5. Added barriers for hcc 3.5 and hcc 4.0 for half support
a. Which means, hcc 4.0 can parse __fp16 but hcc 3.5 cant
b. HCC 4.0 code is implemented now, hcc 3.5 will be added later

Change-Id: Ic37859b2688ebb02e168bab643d1882bf4727952


[ROCm/clr commit: c286bf6f8a]
2017-01-12 11:30:20 -06:00
Aditya Atluri a86633f210 changed copyright year from 2016 to 2017 in src directory
Change-Id: Idb97db509b2b4b1656b2df7a14a62ade38c9d574


[ROCm/clr commit: e9ff23e5f9]
2017-01-11 18:05:41 -06:00
Aditya Atluri fe2d13c861 Added proper device data types
Change-Id: I42029635ff68c3c13a764a3eda6447e6c77878c6


[ROCm/clr commit: 4e57822d95]
2017-01-11 15:06:25 -06:00
Ben Sander 13bf4c39cc Add HIP_MAX_QUEUES feature.
Includes some tricky manipulation of the locks for contexts and streams.
issue is that stealing a stream requires we lock the context to
walk the streams to find a victim.  To avoid deadlock, we can't
have a stream locked when we lock the context.  This implementation
releases the stream lock, then acquires the context and selects the
victim.
A more stable implemenation might be to copy the stream list
from a context so that a lock is not required to walk all streams.
Smart shared_ptr could be used to prevent the streams from being
deallocated during the walk.


[ROCm/clr commit: b29fbf736d]
2017-01-09 21:02:56 -06:00
Ben Sander 82cf0397c5 First pass at virtualized queue support.
Also updated stream debug messages to consistently use trace_helper.


[ROCm/clr commit: c9f5fe34e6]
2017-01-09 21:02:53 -06:00
Ben Sander 9d22c4f727 tolerate spaces in hip args
[ROCm/clr commit: 49d1477b9d]
2017-01-09 20:57:13 -06:00
Rahul Garg 0aabd435a9 Added state for hipDevice.
Change-Id: Idbc3c04cd054a01b634856a1e0a23ff172e991aa


[ROCm/clr commit: 090eadd0bd]
2017-01-09 23:54:01 +05:30
Ben Sander 4ad8744139 Support size_t in memset kernel.
Add disable for HSA_AMD_AGENT_INFO_MAX_WAVES_PER_CU
Remove one copy of completion_future in memset.


[ROCm/clr commit: fd5b0c68b1]
2016-12-22 12:25:09 -06:00
Ben Sander 693bfc85bc Increment API sequence number.
Change name to tls_tidInfo


[ROCm/clr commit: cf338d716b]
2016-12-21 15:30:36 -06:00
Rahul Garg 7121e56949 Fix for HCSWAP-67
Change-Id: I0b2ce5ab933237947fb41d89769db3da16e5be6a

Conflicts:
	src/hip_hcc.cpp


[ROCm/clr commit: 4988975b59]
2016-12-19 16:19:51 +05:30
Ben Sander 8ab567e331 Add name for function
[ROCm/clr commit: 5d815937de]
2016-12-17 08:54:09 -06:00
Ben Sander c59c82916a Remove HSA dependency from hipFunction_t
Place _groupSegmentSize and _privateSegmentSize inside Function,
remove hsa_executable_symbol_t.


[ROCm/clr commit: 2bd70ff345]
2016-12-17 07:22:56 -06:00
Ben Sander a3064807b5 Remove USE_DISPATCH_HSA_KERNEL=0 path.
[ROCm/clr commit: 06d382bc6d]
2016-12-17 07:22:56 -06:00
Ben Sander 68d861e8c5 Refactor Module and Function APIs.
- hipFunction_t is now returned by value.  This eliminates dynamic
      allocation / memory management complexity in the module.  Removed
the kernel
      name so the structure is just 16 bytes now.

    - Moved the hsa_executable_load_module and hsa_executable_freeze
      calls to the hipModuleLoad and hipModuleLoadData calls.

    - Apply sharedMemBytes in hipModuleLaunchKernel to group segment
      size (not private).


[ROCm/clr commit: 3f9404d0e1]
2016-12-17 07:22:33 -06:00
Rahul Garg 8acb6a623d Mapped hipDevice_t to int
Change-Id: I6cfa56c42b7cd04aa0e0bce510c0d72d34ea211a


[ROCm/clr commit: bddaa0e81c]
2016-12-17 16:53:03 +05:30
Aditya Atluri 3e3db78eb0 disabled half native support as inline asm is not working
Change-Id: I3073d8ae39eed321987f0f2f0e689eec4cdbb48c


[ROCm/clr commit: c673aec971]
2016-12-16 09:24:59 -06:00
Ben Sander 8288cbdae4 fix copyright
[ROCm/clr commit: b53ba931e8]
2016-12-15 14:42:52 -06:00
Aditya Atluri 1844a95003 fixed compilation issues
Change-Id: I96692538736e2e4f2da9dba9c8c29a164aec4c0d


[ROCm/clr commit: a1d1fcfdac]
2016-12-14 16:50:16 -06:00
Aditya Atluri 657739b19f added half2 support
Change-Id: I0f3b9b7037fed97e80ec99f5369c75a63f001aae


[ROCm/clr commit: c20a86d866]
2016-12-14 14:18:48 -06:00
Aditya Atluri a86ef4e577 added simple half math ops
Change-Id: I10b1d1023a9e5f2ba63f28c4a2bbe60ee49a8aee


[ROCm/clr commit: 01ed8e91e9]
2016-12-13 20:20:58 -06:00
Aditya Atluri b26857a631 disabled compiler flag hcc 4.0 for half support
Change-Id: I32175113f4c05d43310b3a05c2a14e12f6d48b09


[ROCm/clr commit: 26934a920c]
2016-12-13 20:06:56 -06:00
Ben Sander 1f638c1da6 Add USE_IPC to disable use of IPC APIs. Set to 0.
[ROCm/clr commit: 5eed20be12]
2016-12-13 15:07:04 -06:00
Aditya Atluri 9691299b0d added few type reinterpret cast device functions
1. __int_as_float
2. __hiloint2double

Change-Id: Id247c196887b24a12090f0521bf91e13afeec733


[ROCm/clr commit: 7a712aa76b]
2016-12-13 14:41:36 -06:00
Aditya Atluri c865d93792 added half math addition ISA support
Change-Id: I293b771f695b499b795d7e53f600c9e4fe2a2071


[ROCm/clr commit: 02eab122c5]
2016-12-13 09:18:34 -06:00
Aditya Atluri 4c61746162 Changed threadfences to match target parsing by hcc
Change-Id: I28fcabbaacd13495b707f263fd09afaead0665fa


[ROCm/clr commit: 812cf130b6]
2016-12-12 10:16:58 -06:00
Rahul Garg f45c6facf0 Fixed build error due to GetPCIBusId overloaded function
Change-Id: I626446f2c72c8143f08c95367bc1c528abeaf69d


[ROCm/clr commit: a6b2f9c3a0]
2016-12-08 14:35:58 +05:30