SWDEV-2 - Change OpenCL version number from 2032 to 2033.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#1779 edit
Allocations from GPU nodes will return VRAM, not system memory.
Only non-paged allocation from GPU nodes is supported. System
memory can only be allocated from CPU nodes (usually node 0).
The HostAccess flag is no longer used to distinguish the memory
type. It only indicates, whether the memory is mapped for CPU
access.
Maintain compatibility with broken KfdTests by returning system
memory for paged-memory requested from GPU nodes.
Change-Id: I514defede735f55e6de436f41944125b6f2c4ccf
Allocations from GPU nodes will return VRAM, not system memory.
Only non-paged allocation from GPU nodes is supported. System
memory can only be allocated from CPU nodes (usually node 0).
The HostAccess flag is no longer used to distinguish the memory
type. It only indicates, whether the memory is mapped for CPU
access.
Maintain compatibility with broken KfdTests by returning system
memory for paged-memory requested from GPU nodes.
Change-Id: I514defede735f55e6de436f41944125b6f2c4ccf
[ROCm/ROCR-Runtime commit: 887b32fe86]
SWDEV-2 - Change OpenCL version number from 2031 to 2032.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#1778 edit
SWDEV-68792 - [OpenCL][HWS/CWSR] Adding support for Hardware Scheduler and Compute Wave Save restore (CWSR) feature on ORCA
Adding a temporary w/a for a CP uCode bug in HWS mode. Due to this bug, CP uCode loops through a RUNLIST unless there is a submission on all queues in HWS mode. This causes some overhead and performance drop in PCMark8 on CZ in HWS mode. To work around this issue, it was suggested to submit a dummy packet during initialization on all available queues on HWS mode so that CP uCode can break the loop. This w/a should be removed once CP uCode provides a final fix for this issue.
ReviewBoardURL = http://ocltc.amd.com/reviews/r/9616/
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp#160 edit
For HCC path concurrentKernels is set to true since all ROCR hardware supports this feature.
For NVCC path concurrentKernels is obtained from CUDA's device property cudaDeviceProp::concurrentKernels.
For HCC path concurrentKernels is set to true since all ROCR hardware supports this feature.
For NVCC path concurrentKernels is obtained from CUDA's device property cudaDeviceProp::concurrentKernels.
SWDEV-2 - Change OpenCL version number from 2030 to 2031.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#1777 edit
SWDEV-86836 - Enhance caching library class to prepare one-stage kernel caching by:
0. Moving cache storage setup into constructor
1. Controlling cache storage size
2. Explicit cache cleanup
a. -kcache-wipe is off by default; when turned on, the caching directory would be wiped off
b. Here it's just an option. The implementation (the call of wipeCacheFolders()) will be added in the compiler library
3. Enforcing cache miss (actual compilation enforcing and adding a new entry to the cache storage).
a. -kcache-enforce-miss is off by default; when turned on, the real compilation will be enforced
b. Here it's just an option. The implementation will be added in the compiler library
ReviewBoardURL = http://ocltc.amd.com/reviews/r/9726/
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/OPTIONS.def#134 edit
... //depot/stg/opencl/drivers/opencl/compiler/tools/caching/cache.cpp#12 edit
... //depot/stg/opencl/drivers/opencl/compiler/tools/caching/cache.hpp#7 edit
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