74110bbd43
[hit] Rename RUN -> TEST & RUN_NAMED -> TEST_NAMED
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Change-Id: I75e24f15129973cee15fc9dac65d678bd2172074
[ROCm/clr commit: 53dd1df3fa
2019-05-09 09:59:18 +05:30
840d5c5fe0
Add missing interop with volatile. Fix unit tests.
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[ROCm/clr commit: 208f5a41c6
2018-05-31 15:27:12 +01:00
7a480af716
Move converting constructor from _Float16 under macro guard. Refactor.
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[ROCm/clr commit: 40dad93426
2018-05-25 19:46:41 +01:00
bfbc4f6587
Update hipTestHalf to actually test behaviour. Add missing hipHostfree.
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[ROCm/clr commit: 59a046dd2d
2018-05-24 13:55:30 +01:00
2b16b4e31b
Missing commit.
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[ROCm/clr commit: ecefdd6541
2018-05-23 17:57:47 +01:00
47f3529ccf
Disable incomplete unit tests that don't work on nvcc path
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Change-Id: If5823ec96a3b2497a08c46ab802c5a0158271053
[ROCm/clr commit: 92d8e05aa0
2018-05-21 11:35:03 +05:30
04bf6c5109
initial gfx906 support
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[ROCm/clr commit: 368affcea4
2018-05-10 19:28:00 +00:00
9946827d1b
Checkin to add unit tests for fixes in my previous commit
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This change adds unit tests for
1. __hisinf
2. __hisnan
2. abs(long long)
3. lgamma(double)
[ROCm/clr commit: 76e808304c
2018-04-25 17:53:21 +00:00
46ddefedee
Apply .clangformat to all repo source files
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Change-Id: I7e79c6058f0303f9a98911e3b7dd2e8596079344
[ROCm/clr commit: 9e47fccc89
2018-03-12 11:29:03 +05:30
02cbb93ec1
Merge pull request #266 from gargrahul/fix_half2_gfx900
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Fixed half2 issue on gfx900
[ROCm/clr commit: 4477d3d314
2017-11-20 07:28:41 +05:30
af0ae5421c
This implements the trivial change needed to move back from the hip{Something}_{x, y, z} macros to the natural CUDA syntax of Something.{x, y, z}. This is contained in lines 384-404 in hip_runtime.h. All of the other changes have to do with changing unit tests to use this syntax. The macros are retained for backwards compatibility.
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[ROCm/clr commit: 0cc921f103
2017-11-19 01:54:12 +00:00
b0461a2176
Fixed test case for GFX900
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[ROCm/clr commit: cfc9f87465
2017-11-16 09:34:52 +05:30
c3ba309562
Fixed half2 issue on gfx900
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[ROCm/clr commit: 20947f80fb
2017-11-15 18:52:59 +05:30
ba45e02007
added architecture specific macros
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1. Added __HIP_ARCH_GFXNUM__
2. Usage, -D__HIP_ARCH_GFX803__=1
Change-Id: I68b3a85d62cfab3a45d2b7a70cb3518ab2565236
[ROCm/clr commit: c6c90f6f5a
2017-02-08 19:45:32 -06:00
76a58521f5
fixed hipcc for new compiler flags
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Change-Id: I49ec059be20ff26b7482c84d91ab7a43826c6a8d
[ROCm/clr commit: 400d0d4f78
2017-02-08 14:06:01 -06:00
248b42d3e3
include arch specific ir on fallback path
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Change-Id: Ib04996aae2c21eb73ef2a9f6305915e0caccd704
[ROCm/clr commit: 26b5e57cfd
2017-02-08 12:19:06 -06:00
3937b398e9
changed __global__ attribute
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1. Moved around tests and added them to HIT
Change-Id: I5d75280c42a5af852670ebabc7305ee56721ec7b
[ROCm/clr commit: f009f3533d
2017-02-03 10:53:36 -06:00
d9845446ef
Added type conversion intrinsics
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1. Added all type conversion intrinsics
2. NO TESTS have been added. (Will add in next commit)
3. Sanatized code in hip_runtime.h
4. Added passed() to hipTestHalf to make it pass on HIT
Change-Id: I0987963c802fc7ff4d7e07d7b88d86da35da53c9
[ROCm/clr commit: d496576b55
2017-01-16 12:10:05 -06:00
d71fc0e60a
added half2 log, log10, exp, exp10 math functions
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1. Enabled tests for log, log10, exp, exp10 half2
2. h2rint is still disabled.
Change-Id: I01f6002f6992259919893c524c526db5ee09473a
[ROCm/clr commit: 5c5f5c1ad1
2017-01-13 13:26:10 -06:00
4756cf7c16
added half2 math operations
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1. They use SDWA + LLVM IR
2. Added these functions to test
3. Need to do exp, exp10, log, log10, rint
Change-Id: I06176acc6cb8bb054495310531777406a41b54e4
[ROCm/clr commit: eff68c989a
2017-01-13 12:27:11 -06:00
b2973b97e2
added math functions for half
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1. Added math functions for half precision
2. HRCP is not available due to device code linking errors, will be enabled once it is fixed
3. Added math functions to half test file
Change-Id: Ie317ce70ef518a4fc3f27142143d01e0327f5df3
[ROCm/clr commit: fe38e9652b
2017-01-13 12:05:29 -06:00
d3fe56550e
added half2 cmp and conv, data movement device functions
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1. Added half2 comparision functions
2. Added conversion and data movement half apis
Change-Id: Ia33c0e957d9deb1f2b7a8fde8e22168f4d41b88b
[ROCm/clr commit: 646f566bbf
2017-01-13 10:56:07 -06:00
a52591d117
added comparision device functions for fp16
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1. Added comparision device functions
2. Added test to check correct isa getting generated
Change-Id: I16732f5a1438bdce145f7bfcecd28198e3cc4b79
[ROCm/clr commit: 89998d436f
2017-01-12 14:52:14 -06:00
d1f7c4e048
added packed math fp16 native device functions
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1. Added SDWA implementation inside IR file
2. Added device functions to header + used them in test
Change-Id: Ib4e059a58eee201cc82438689e3e9bc5f9d26653
[ROCm/clr commit: eeef055469
2017-01-12 14:10:51 -06:00
5317ffa9ec
Started adding native half math library support
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1. Removed HIP_EXPERIMENTAL env variable so that device code will be accessed from LLVM IR
2. Removed soft support from headers and moved to hip_fp16.cpp
3. Added LLVM IR + inline asm to hip_ir.ll
4. Added test for fp16
5. Added barriers for hcc 3.5 and hcc 4.0 for half support
a. Which means, hcc 4.0 can parse __fp16 but hcc 3.5 cant
b. HCC 4.0 code is implemented now, hcc 3.5 will be added later
Change-Id: Ic37859b2688ebb02e168bab643d1882bf4727952
[ROCm/clr commit: c286bf6f8a
2017-01-12 11:30:20 -06:00
Maneesh Gupta
Alex Voicu
Siu Chi Chan
Deven Desai
Rahul Garg
Aditya Atluri