A number of tests are no longer broken on gfx802.
Change-Id: If70c77423f8f14de59490ab8ca156b0c4e7b5cf1
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
The memory size alignment workaround for a TLB bug on gfx802 was
breaking userptrs because it would attempt to get_user_pages beyond
the end of a VMA. Refine this workaround based on our understanding
of the HW bug. It only affects L2 cacheline allocation, which is
decided by the last page in the cache line (8 entries = 32KB of
address space). Thus aligning memory allocation so that the last
page falls on the end of a 8 entry TLB cache line allows caching
to work correctly.
Imported images require specific alignments. If their size is not
naturally aligned with 8 cache lines, it may have bad TLB cache
performance.
This patch will only have the desired effect if redundant size
padding in KFD is also removed.
Change-Id: I984cbe7fa61fec04d70fa387aaf9aab370eabeb9
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
sdma end ts must be 256 bit aligned in oss 3.0 and prior. Using
the ts pool requires copying into the signal and is a significant
performance penalty for small copies.
SharedSignal is 128 bytes due to alignment so can host the end ts.
Move sdma end ts into SharedSignal and remove ts pool and ts copy.
Change-Id: I7899bda36ebc9adcaad1d3a3d2b7a489857cc9e8
hsakmt-dev should not install include/linux/* (currently just kfd_ioctl.h)
as those are linux kernel headers provided by the linux kernel header
packages (`linux-headers-*` on Debian/Ubuntu or `kernel-headers-*` on
Red Hat / Fedora)
Change-Id: Ib6e62ca2f3582c5ad7351225f5827081bf8e05c0
Signed-off-by: Craig Andrews <candrews@integralblue.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
pkgconfig files should be installed to /usr/share/pkgconfig/, not /usr/libhsakmt/
Change-Id: Ifd08f612addb375de1d00282ee9e7c257528bf74
Signed-off-by: Craig Andrews <candrews@integralblue.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
LICENSE.md should be installed to the DOCDIR, not /usr/libhsakmt
Change-Id: I2020547b3174b9d91c1f800d9db2d73f627a6ce3
Signed-off-by: Craig Andrews <candrews@integralblue.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Instead of the installed hsakmt header files, use the ones from the
source tree, since they are in the same git repository. This allows
using kfd_ioctl.h even when we don't install this file with an
upcoming change.
Change-Id: I9a30abd5445806d2141bdb1ccd88d3794a74ed20
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Made changes in the CMakeLists.txt
1) Detects the OS of the system
2) Accordingly setsup the runtime dependencies
Change-Id: Ief9a0217caae77d4be4850167e2a9b8387f639e4
Signed-off-by: Lad, Aditya <aditya.lad@amd.com>
Impacts GPU_ONLY signal type latency when waiting for small operations.
Using this type improves total SDMA small copy performance by ~40% if
the signal is allowed to spin freely.
Change-Id: I27aa128c63a1bacb3f51fb08f166e4e1d6fef651
Remove agent lookup in time stamp translation for IPC signals. The copy
agent handle is not shared so does not need to be checked for cross
process use. Cross process copy-timestamp read is illegal and continues
to deliver garbage.
Store the copy agent properly when doing CPU-CPU copies.
Change-Id: Ib4008f66ff866922047749dd556c84a32021c1fd
ucode versions are per asic so not valid for feature enablement outside
of bringup/dev. Feature is older than the latest ioctl change that
the thunk depends on so use of this patch with kernel packages that
don't contain the feature is not possible in a supported environment.
Change-Id: I36b14176a7d642017ef1518aeade454b0f3dc749
snprintf throws a warning from -Wformat-truncation where the string
could be truncated. We address this by referencing the maximum size that
can be returned from a file according to MAXNAMLEN . This should safely
guard us from truncating the path value.
Change-Id: If1d208990d8775e9494835b0deb890d2616fd15b
Signed-off-by: Kent Russell <kent.russell@amd.com>
If the 32-bit domain is found in the kfd node properties for
a device, then it will be used when constructing the bdfid.
If it's not present, it will continue to use the 16 bit version.
Also, whether or not 32b or 16b are used for the domain, the
domain will now be placed in the upper 32b of the 64b bdfid.
* Fixed some unrelated doxygen issues
Change-Id: Icb5116daa1ab45ee305bdbe6cd5df5736dd3ffa3
Replace cpuid call with sysfs data to get CPU cache information. With this
change, x86 check is also removed since sysfs applies to other platforms.
CPU cache information can be retrieved from
/sys/devices/system/node/nodeX/cpuY/cache where Y is processor number
represented in /proc/cpuinfo at "processor" entry.
Change-Id: Ic47df6d5dafaf1aae5b46b1fdee42691c697e49e
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Calbulator package 'bc' is not always installed, occasionally
breaking the test scripts. As a fix, this patch gets rid of
'bc' and uses 'awk' instead.
Change-Id: I5f4dbf018d97581a626cf95d147c415755477771
* Specifically, address case when brand name is longer than buffer
provided
* Also, slightly modify prototype to match similar, existing APIs.
* Address some cpplint issues.
Change-Id: Iaf77304e23085123e88f301e4b33bc4e6be2a225
'rocminfo' output format on v2.6 is slightly different, and thus
cache capacity and cache linesize can be incorrectly obtained.
Example: 'L1: 16KB' vs. 'L1: 16(0x10) KB'. This patch fixes the
formatting issue, and further does more check on profiled .csv
file.
Change-Id: I934ee3613a79fa8acc431a394e88a9e09833311b
PCI domain has moved to 32-bits to accommodate virtualization,
so a 32-bit integer is exposed for domain to reflect this change.
Change-Id: I0d767acadcdc8e4277db203b5865dd67dd001cef
Signed-off-by: Ori Messinger <ori.messinger@amd.com>
enable thunk query api to report if queue is newly created
test new queue bit test on clear events.
also fixup cleanup to disable debug trap.
Change-Id: I3ebe2d85da66f28b8c82f0e68461ee7d32ec0b0d
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Reviewed-by: Philip Cox <Philip.Cox@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Originally reserved 100 SGPRs per wave. Pre-gfx10 needs 102 SGPRs
and gfx10 needs 128 SGPRs. Reserve 128 SGPRs per wave for all ASICs
to simplify calculation.
Also double VGPR register size for gfx908 family
Change-Id: I98b741cbfa051f49ed37ff25d99f851f124be7b6
Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Compiled using Clang and encountered errors on ambiguous pointer
type, implicit conversion NULL to bool, and unused function, etc.
As a fix, this patch slightly updates the related codes.
Change-Id: I4a73d66293313dda36749036f5c73aaf2a445231
Add support and testing for reading the brand name associated with
a specific GPU (such as mi25, mi50, mi60, etc). The brand name is
associated with the SKU of the GPU, and some brand names can be
mapped from multiple different SKUs.
Change-Id: I36eb95ca8e72efdd294ccd684841195925dfe820
Signed-off-by: Ori Messinger <Ori.Messinger@amd.com>
CACHE variables allow for variables to be documented, and
ROCR_LIB_DIR/ROCR_INC_DIR should be overridable as they'll
have different values on different Linux distributions.
Change-Id: I0bba633c184df2da55bdbe6aabbd53346d098b83
This saves us from maintaining device ID to Asic mapping in the scripts.
Moreover, stop using abbrevation asic names to avoid confusion.
Change-Id: I7ce583b26b09b627c142aae41932483b28c545d8
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>