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26 Коммитов

Автор SHA1 Сообщение Дата
agunashe d96481fb36 SWDEV-293742 - Update copyright end year VDI repo
Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261
2021-08-22 23:56:07 -07:00
German Andryeyev ce8dad2ecc SWDEV-290160 - Switch to global HSA signals
Runtime can't assign internal HSA signals for HIP events, because
HIP application can destroy the HIP stream or signal reuse may
occur internally. Switch to global HSA signals for HIP events.

Change-Id: Ieaea2d6b039e492b2e7c5112782a8f4e601e50a1
2021-08-22 23:56:07 -07:00
Christophe Paquot 133287f31f SWDEV-240806 - Release resources in Command::terminate for HIP
We do not want to release resources during setStatus in HIP because of Graphs

Change-Id: Idc7b188ab5f8be6975ea91005dd2bbf177401f8c
2021-08-22 23:56:07 -07:00
German Andryeyev fa2e154a8b SWDEV-278894 - Use GPU waits for HIP events
Save HW events in amd::Event.
Use HW events for synchronization

Change-Id: I98cf9c2d0ec3c7fcaf254b749ac6c568d7270ae0
2021-05-25 13:41:15 -04:00
pghafari 582d12b32f SWDEV-245532 - HIP - Vulkan interop semaphores
Change-Id: Ib79328ce4ec2f8ac3aade59fde4fd30e2d6e5cba
2021-04-26 13:20:58 -04:00
Anusha GodavarthySurya c9c6bed022 SWDEV-240806 - [hip-graph] Added functions updateEventWaitList and resetStatus
Change-Id: I6a753e9584bdacd39ee676466a884ec6b7859879
2021-04-20 09:43:40 -04:00
Satyanvesh Dittakavi a711a49881 SWDEV-264244 - Hide Notifications from HIP
This fixes hipStreamQuery returning hipErrorNotReady when idle
Change-Id: I3f77666a00bc6a7162b6c660d79e76c09669d94f
2021-03-16 06:30:55 -04:00
German Andryeyev 7f32d0b425 SWDEV-272496 - Detect callbacks and force AQL barrier
HIP tests require HIP callbacks to be processed in another thread.
This change will use a thread from HSA signal callbacks to make
sure a HIP callback was done asynchronously.
Also process the callback before changing the status of command

Change-Id: Icef85d0e0f808663882cf6881ff1be3e5eca29ac
2021-03-05 11:33:51 -05:00
Sarbojit Sarkar fa89ee5ee0 SWDEV-254329 - Init Profiling when ON
Change-Id: I72f9da94f8fbb95e66cf145831b252af05a19dc4
2021-03-04 23:35:27 -05:00
Sarbojit Sarkar 14d54a7b29 SWDEV-254329 - Fix for profiler ON/OFF
Change-Id: Iea72ae96ebe7ed95322dfc39d785ac326b47f6dc
2021-03-02 02:16:14 -05:00
Vladislav Sytchenko 184b2631d5 SWDEV-271964 - Revert "SWDEV-264244 Fix StreamSync"
This reverts commit a148a71075.

Change-Id: I870c8b71edeb31f587fffe2447762acba61a7938
2021-02-24 11:43:08 -05:00
Ravi C Akkenapally 0a5f9a3b10 SWDEV-179105 - Stream Operations: Add support for Wait and Write
Change-Id: Ibffa1d6d573826b64763da280074a77271d66808
2021-02-15 17:02:38 -08:00
German Andryeyev 6966d8098e SWDEV-269654 - Fix HIP stream busy query
- Avoid GPU wait on the marker submission and update the command
batch after HSA signal callback upon HSA barrier completion.

Change-Id: I5c1c97212aefc2ae4b99aa9e2a81627ee9a38c1c
2021-02-09 12:57:12 -05:00
Satyanvesh Dittakavi a148a71075 SWDEV-264244 Fix StreamSync
Change-Id: I3a46a607a77aaf46dcd1fcf08db7e926613fe8d1
2021-01-08 02:06:31 -05:00
Sarbojit Sarkar f403b1c079 [SWDEV-259635] explicit allow_access for hipMemcpy2D
Change-Id: Ia3206c08f92f417dc486c5f0dd40474f77b473d9
2020-12-09 01:09:53 -05:00
Saleel Kudchadker 59c6cb0268 Use barrier packets for event profiling
Use barrier packets for every profile marker that gets submitted
and use the completion signal to get GPU ts. This gives most accurate
dispatch time. Club cache flushes with profile marker if there is a
pending dispatch that needs cache flush. This optimization saves on
extra barrier and helps wall time

Change-Id: Ib62d6d7aabf4743827b561be6c9c5afa813203da
2020-12-03 13:45:14 -05:00
German Andryeyev bd340d8cbf Correct reported info in ROC profiler
OCL can't distinguish different copy types, but ROC profiler
expects SDMA transfer visibility. Add extra code to detect
a transfer with the host memory and substitute OCL command

Change-Id: I5290acd0e10bc082e00c1d4ae1474a075de7f165
2020-10-23 18:29:48 -04:00
Laurent Morichetti 5d4b6f74d3 Use std::atomic
Replace amd::Atomic with std::atomic. Remove make_atomic uses by
converting the variable to std::atomic and making sure the memory
order is relaxed when synchronizes-with is not needed.

Delete utils/atomic.hpp.

Change-Id: I0b36db8d604a8510ac6e36b32885fd16a1b8ccfa
2020-09-09 14:55:29 -04:00
Saleel Kudchadker ec73340348 Add Queue profling param and toggle for HIP
Use signal timestamps if NDRange command takes forceProfile flag.

Change-Id: Ib7f187d781fd78a7346818afb3344a9378f4c104
2020-08-06 03:09:53 -04:00
Tao Sang fdef6f722f Apply constexpr on global constant varaibles
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef
2020-07-22 22:14:13 -04:00
Jatin Chaudhary 48690f29e9 Adding AnyOrder Flag
Change-Id: I6baaef42b98adfbc8cf2605e175ec007e008045f
2020-07-22 00:25:04 -04:00
German Andryeyev c5afd5d412 Initial HMM support
- Expose ROCclr interfaces for HIP usage
- ROCr interfaces aren't available in staging, thus control the
build with AMD_HMM_SUPPORT define

Change-Id: Iadc2bcc230e78d3b0dc22b235189c8cc80843446
2020-06-12 09:06:07 -04:00
Payam 1b6f21ad9a removing AMD emails per palamida scan
Change-Id: If7307f5b1f81a43f2725ec5abd3b8989cbddbcc5
2020-03-11 21:26:55 -04:00
Laurent Morichetti d9d9c69399 Replace cl_* integral types with standard types.
cl_bool -> bool
cl_int -> int32_t
cl_uint -> uint32_t
cl_long -> int64_t
cl_ulong -> uint64_t
cl_float -> float
cl_double -> double
cl_bitfield -> uint64_t

Change-Id: I840c8993b55f98f5b745d21e27f5f28233647a58
2020-02-12 13:16:06 -08:00
Laurent Morichetti b4c6143a2f Update copyright info
Change-Id: Ia4f9ff0f5f873b4223a8cca154188bb0d2f1abba
2020-02-04 09:26:14 -08:00
Laurent Morichetti 20c7173849 Merge branch 'origin/pghafari/vdi-prototype' into lmoriche/amd-master
Change-Id: Id3b833d405596735becb3346f3b08c6da57033fe
2020-01-30 20:12:13 -08:00