ac7c31d49e
SWDEV-515261 - strip newline from rocm_agent_enumerator output ( #222 )
2025-05-30 10:21:00 +05:30
42441c78ea
[SWDEV-488303] Adjusted process vram_mem data source ( #411 )
...
* [SWDEV-488303] Adjusted process vram_mem data source
* Standardized sscanf format strings
---------
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com >
Co-authored-by: gabrpham_amdeng <Gabriel.Pham@amd.com >
2025-05-29 23:26:12 -05:00
da430dec05
[SWDEV-488303] Adjusted process vram_mem data source ( #411 )
...
* [SWDEV-488303] Adjusted process vram_mem data source
* Standardized sscanf format strings
---------
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com >
Co-authored-by: gabrpham_amdeng <Gabriel.Pham@amd.com >
[ROCm/amdsmi commit: 42441c78ea
2025-05-29 23:26:12 -05:00
3968ec4123
[SDK] Remove std::regex usage from rocprofiler-sdk library and common library ( #421 )
...
* Remove std::regex usage from rocprofiler-sdk and common library
- See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118408
- std::regex usage produces exceptions or segfaults when used when on applications compiled with dual ABI
- Add code restrictions workflow
- simple workflow ensuring code restrictions (such as std::regex) are not used
* Update CHANGELOG
* Explicitly set permissions for restrictions workflow
* Fix handling of /proc/cpuinfo entries with no info
- e.g. "power_management:" (colon is last character)
---------
Co-authored-by: Jonathan R. Madsen <jonathanrmadsen@gmail.com >
[ROCm/rocprofiler-sdk commit: dbb2e52216
2025-05-29 23:11:13 -05:00
dbb2e52216
[SDK] Remove std::regex usage from rocprofiler-sdk library and common library ( #421 )
...
* Remove std::regex usage from rocprofiler-sdk and common library
- See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118408
- std::regex usage produces exceptions or segfaults when used when on applications compiled with dual ABI
- Add code restrictions workflow
- simple workflow ensuring code restrictions (such as std::regex) are not used
* Update CHANGELOG
* Explicitly set permissions for restrictions workflow
* Fix handling of /proc/cpuinfo entries with no info
- e.g. "power_management:" (colon is last character)
---------
Co-authored-by: Jonathan R. Madsen <jonathanrmadsen@gmail.com >
2025-05-29 23:11:13 -05:00
876f3976e0
[SWDEV-523247] Corrected amdsmi_get_gpu_vram_usage total
...
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com >
Change-Id: I0f8bb067bf34f64d1b8d41e2a89d3a79a6745990
2025-05-29 21:30:00 -05:00
b2b6779593
[SWDEV-523247] Corrected amdsmi_get_gpu_vram_usage total
...
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com >
Change-Id: I0f8bb067bf34f64d1b8d41e2a89d3a79a6745990
[ROCm/amdsmi commit: 876f3976e0
2025-05-29 21:30:00 -05:00
0fdaebdbaa
[SWDEV-488303] Updated CU occupancy for per-process retrieval ( #243 )
...
Change-Id: I2990597c6dd4b2e8cf3e11ce60f72049ebdd9a8c
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com >
2025-05-29 20:35:27 -05:00
465f2e6a41
[SWDEV-488303] Updated CU occupancy for per-process retrieval ( #243 )
...
Change-Id: I2990597c6dd4b2e8cf3e11ce60f72049ebdd9a8c
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com >
[ROCm/amdsmi commit: 0fdaebdbaa
2025-05-29 20:35:27 -05:00
fba62e2270
[SWDEV-534707] Adjust power value documentation
...
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com >
Change-Id: I1c4516e403715b9a1fe9c78fae94848c89daa920
2025-05-29 18:55:44 -05:00
418ec78c21
[SWDEV-534707] Adjust power value documentation
...
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com >
Change-Id: I1c4516e403715b9a1fe9c78fae94848c89daa920
[ROCm/amdsmi commit: fba62e2270
2025-05-29 18:55:44 -05:00
970560fc7c
[SWDEV-520665] Add support for board voltage ( #303 )
...
* Add the API and CLI to show the board voltage.
---------
Change-Id: Icb25bd653bb1d004704b5a21b378ca31b2b242c7
Signed-off-by: Arif, Maisam <Maisam.Arif@amd.com >
Signed-off-by: AL Musaffar, Yazen <Yazen.ALMusaffar@amd.com >
2025-05-29 18:55:08 -05:00
ff2e230a34
[SWDEV-520665] Add support for board voltage ( #303 )
...
* Add the API and CLI to show the board voltage.
---------
Change-Id: Icb25bd653bb1d004704b5a21b378ca31b2b242c7
Signed-off-by: Arif, Maisam <Maisam.Arif@amd.com >
Signed-off-by: AL Musaffar, Yazen <Yazen.ALMusaffar@amd.com >
[ROCm/amdsmi commit: 970560fc7c
2025-05-29 18:55:08 -05:00
fc561ff37a
rocr: Add all sysfs entries for L2 Cache
...
For L2 Cache and above, we report the total amount of cache for the
whole partition, so we add up the L2 Cache entry for each partition.
2025-05-29 19:02:38 -04:00
d2982b797a
rocr: Add all sysfs entries for L2 Cache
...
For L2 Cache and above, we report the total amount of cache for the
whole partition, so we add up the L2 Cache entry for each partition.
[ROCm/ROCR-Runtime commit: fc561ff37a
2025-05-29 19:02:38 -04:00
e6fcd9709a
[CI] GitHub Actions workflow testing ROCm release backwards compatibility ( #420 )
...
* CI workflow testing compilation against older ROCm versions
* Run on ubuntu-latest
* Install git
* Fix install requirements
* Set --site to $(hostname)
* Test latest rocm release + fix logic for rocm 6.2
* Report number of processors
* Reduce the build job parallelism
- ubuntu-latest only has 2 CPUs for 8 is probably excessive
* Add explicit permissions to rocm_release_compatibility workflow
---------
Co-authored-by: Jonathan R. Madsen <jonathanrmadsen@gmail.com >
[ROCm/rocprofiler-sdk commit: 7f22b66a9b
2025-05-29 17:27:57 -05:00
7f22b66a9b
[CI] GitHub Actions workflow testing ROCm release backwards compatibility ( #420 )
...
* CI workflow testing compilation against older ROCm versions
* Run on ubuntu-latest
* Install git
* Fix install requirements
* Set --site to $(hostname)
* Test latest rocm release + fix logic for rocm 6.2
* Report number of processors
* Reduce the build job parallelism
- ubuntu-latest only has 2 CPUs for 8 is probably excessive
* Add explicit permissions to rocm_release_compatibility workflow
---------
Co-authored-by: Jonathan R. Madsen <jonathanrmadsen@gmail.com >
2025-05-29 17:27:57 -05:00
13148c5d8e
[SWDEV-489696] Improve AMD SMI Python APIs Functional and Unit Testing ( #408 )
...
Signed-off-by: josnarlo <Joseph.Narlo@amd.com >
2025-05-29 17:18:08 -05:00
fc54da7679
[SWDEV-489696] Improve AMD SMI Python APIs Functional and Unit Testing ( #408 )
...
Signed-off-by: josnarlo <Joseph.Narlo@amd.com >
[ROCm/amdsmi commit: 13148c5d8e
2025-05-29 17:18:08 -05:00
bc158d2b51
[SWDEV-511822] Created default command for amdsmi ( #348 )
...
* Added degree symbol and fixed power usage
* Added degree symbol and fixed power usage
* fixed default command
---------
Signed-off-by: gabrpham_amdeng <Gabriel.Pham@amd.com >
2025-05-29 17:14:58 -05:00
c283cccf79
[SWDEV-511822] Created default command for amdsmi ( #348 )
...
* Added degree symbol and fixed power usage
* Added degree symbol and fixed power usage
* fixed default command
---------
Signed-off-by: gabrpham_amdeng <Gabriel.Pham@amd.com >
[ROCm/amdsmi commit: bc158d2b51
2025-05-29 17:14:58 -05:00
c50a8225ae
[gfx12] Finalize support for gfx12 new counter blocks ( #81 )
...
1. Move all new gfx12 block enums to aql_profile_v2.h. hsa_ven_amd_aqlprofile.h will be left untouched.
2. Re-org counter info in gfx12_block_info.h to be purely alphabetic-ordered for easy comparison between different IP versions. Also use auto-gen block name from IP header files whenever possible to reduce manual editing.
3. Remove unused counter info from graphics blocks.
4. Added UTCL2 and VML2 support
5. Added all gfx12 blocks to ctrl test
[ROCm/aqlprofile commit: b20803e95d
2025-05-29 15:14:09 -07:00
b20803e95d
[gfx12] Finalize support for gfx12 new counter blocks ( #81 )
...
1. Move all new gfx12 block enums to aql_profile_v2.h. hsa_ven_amd_aqlprofile.h will be left untouched.
2. Re-org counter info in gfx12_block_info.h to be purely alphabetic-ordered for easy comparison between different IP versions. Also use auto-gen block name from IP header files whenever possible to reduce manual editing.
3. Remove unused counter info from graphics blocks.
4. Added UTCL2 and VML2 support
5. Added all gfx12 blocks to ctrl test
2025-05-29 15:14:09 -07:00
4a85b5c88a
SWDEV-532690 - use GLEW target name for linkage ( #428 )
...
Change-Id: Ie149d445469633775af3f87fa4868cc1796168a2
[ROCm/clr commit: 4caea650f4
2025-05-29 18:00:00 -04:00
4caea650f4
SWDEV-532690 - use GLEW target name for linkage ( #428 )
...
Change-Id: Ie149d445469633775af3f87fa4868cc1796168a2
2025-05-29 18:00:00 -04:00
945e4a159c
[SWDEV-533349] codeQL - use strncpy instead of strcpy ( #405 )
...
use strncpy instead of strcpy
Co-authored-by: Oosman Saeed <oossaeed@amd.com >
2025-05-29 15:55:45 -05:00
5874eb5151
[SWDEV-533349] codeQL - use strncpy instead of strcpy ( #405 )
...
use strncpy instead of strcpy
Co-authored-by: Oosman Saeed <oossaeed@amd.com >
[ROCm/amdsmi commit: 945e4a159c
2025-05-29 15:55:45 -05:00
c585122767
Adding using-thread-trace.rst ( #408 )
...
* Adding using-thread-trace.rst
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Apply suggestions from code review
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Apply suggestions from code review
* Add to index/toc
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Apply suggestions from code review
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
Co-authored-by: Baraldi, Giovanni <Giovanni.Baraldi@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
Co-authored-by: Baraldi, Giovanni <Giovanni.Baraldi@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
Co-authored-by: Baraldi, Giovanni <Giovanni.Baraldi@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Apply suggestions from code review
* Apply suggestions from code review
Co-authored-by: Paoletti, Leo <Leo.Paoletti@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
---------
Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com >
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
Co-authored-by: Paoletti, Leo <Leo.Paoletti@amd.com >
[ROCm/rocprofiler-sdk commit: b590612966
2025-05-29 15:41:42 -05:00
b590612966
Adding using-thread-trace.rst ( #408 )
...
* Adding using-thread-trace.rst
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Apply suggestions from code review
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Apply suggestions from code review
* Add to index/toc
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Apply suggestions from code review
* Apply suggestions from code review
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
Co-authored-by: Baraldi, Giovanni <Giovanni.Baraldi@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
Co-authored-by: Baraldi, Giovanni <Giovanni.Baraldi@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
Co-authored-by: Baraldi, Giovanni <Giovanni.Baraldi@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
* Apply suggestions from code review
* Apply suggestions from code review
Co-authored-by: Paoletti, Leo <Leo.Paoletti@amd.com >
* Update source/docs/how-to/using-thread-trace.rst
* Update source/docs/how-to/using-thread-trace.rst
---------
Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com >
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com >
Co-authored-by: Paoletti, Leo <Leo.Paoletti@amd.com >
2025-05-29 15:41:42 -05:00
6c40056aa9
Add chip specs ( #681 )
...
* Add perfmon config spec, enhance memory partition info.
* Add gfx950 perfmon config.
* Add High Freq variants in gfx942.
* Add backup detection methods for gpu model.
* Improve get_num_xcds logic by adding detection of 1to1 arch-to-compute_partition logic.
* Add default compute partition settings spx:8 for when gpu_model=None.
* Update gpu spec tests.
* Add backup compute partition detection.
---------
Signed-off-by: xuchen-amd <xuchen@amd.com >
[ROCm/rocprofiler-compute commit: f0fad19e8b
2025-05-29 16:35:34 -04:00
f0fad19e8b
Add chip specs ( #681 )
...
* Add perfmon config spec, enhance memory partition info.
* Add gfx950 perfmon config.
* Add High Freq variants in gfx942.
* Add backup detection methods for gpu model.
* Improve get_num_xcds logic by adding detection of 1to1 arch-to-compute_partition logic.
* Add default compute partition settings spx:8 for when gpu_model=None.
* Update gpu spec tests.
* Add backup compute partition detection.
---------
Signed-off-by: xuchen-amd <xuchen@amd.com >
2025-05-29 16:35:34 -04:00
c82c23559f
[rocprofv3] Fix ATT library path ( #425 )
...
Fix rocprofv3 `--att-library-path` option
Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com >
[ROCm/rocprofiler-sdk commit: 134ac2d9de
2025-05-29 15:34:07 -05:00
134ac2d9de
[rocprofv3] Fix ATT library path ( #425 )
...
Fix rocprofv3 `--att-library-path` option
Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com >
2025-05-29 15:34:07 -05:00
75a335b245
Add corr_id for HIP Runtime API in Perfetto ( #218 )
...
for SWDEV-533883
---------
Co-authored-by: Aleksandar Djordjevic <aleksandar.djordjevic@amd.com >
[ROCm/rocprofiler-systems commit: 39090bfc54
2025-05-29 16:00:31 -04:00
39090bfc54
Add corr_id for HIP Runtime API in Perfetto ( #218 )
...
for SWDEV-533883
---------
Co-authored-by: Aleksandar Djordjevic <aleksandar.djordjevic@amd.com >
2025-05-29 16:00:31 -04:00
8e486c832b
[SWDEV-463406] Update python doc for amdsmi_get_violation_status ( #406 )
...
* Updated the amdsmi_get_violation_status python API doc with newly added fields.
---------
Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com >
2025-05-29 14:59:16 -05:00
51a7a5dc59
[SWDEV-463406] Update python doc for amdsmi_get_violation_status ( #406 )
...
* Updated the amdsmi_get_violation_status python API doc with newly added fields.
---------
Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com >
[ROCm/amdsmi commit: 8e486c832b
2025-05-29 14:59:16 -05:00
5e31509711
Removed backwards compatibility for jpeg_activity/vcn_activity
...
Updated:
- Removed backwards compatibility for jpeg_activity/vcn_activity
- On supported ASICs users can use XCP (partition) stat values:
jpeg_busy and vcn_busy
Change-Id: I78c403f8462668738ec57cac12b107f6a3989b18
Signed-off-by: Charis Poag <Charis.Poag@amd.com >
[ROCm/rocm_smi_lib commit: 1c6b2adae7
2025-05-29 13:47:56 -05:00
1c6b2adae7
Removed backwards compatibility for jpeg_activity/vcn_activity
...
Updated:
- Removed backwards compatibility for jpeg_activity/vcn_activity
- On supported ASICs users can use XCP (partition) stat values:
jpeg_busy and vcn_busy
Change-Id: I78c403f8462668738ec57cac12b107f6a3989b18
Signed-off-by: Charis Poag <Charis.Poag@amd.com >
2025-05-29 13:47:56 -05:00
83185695c9
[SWDEV-533596] CI - Added Docs Generation
...
Signed-off-by: Justin Williams <Justin.Williams@amd.com >
2025-05-29 13:46:13 -05:00
928c95f6eb
[SWDEV-533596] CI - Added Docs Generation
...
Signed-off-by: Justin Williams <Justin.Williams@amd.com >
[ROCm/amdsmi commit: 83185695c9
2025-05-29 13:46:13 -05:00
7fd93cfed3
Upgrade to Dash 3.0 ( #719 )
...
[ROCm/rocprofiler-compute commit: 45296ceb46
2025-05-29 14:36:03 -04:00
45296ceb46
Upgrade to Dash 3.0 ( #719 )
2025-05-29 14:36:03 -04:00
e7f19b36f0
[SWDEV-463406] ViolationStatus Changes ( #288 )
...
* Expanded Violation Status tracking for GPU metrics 1.8
* Added new fields to `amdsmi_violation_status_t` and related interfaces for enhanced violation statuses
---------
Signed-off-by: Kanangot Balakrishnan, Bindhiya <Bindhiya.KanangotBalakrishnan@amd.com >
Signed-off-by: Charis Poag <Charis.Poag@amd.com >
Co-authored-by: Charis Poag <Charis.Poag@amd.com >
2025-05-29 13:26:21 -05:00
2155c96c9e
[SWDEV-463406] ViolationStatus Changes ( #288 )
...
* Expanded Violation Status tracking for GPU metrics 1.8
* Added new fields to `amdsmi_violation_status_t` and related interfaces for enhanced violation statuses
---------
Signed-off-by: Kanangot Balakrishnan, Bindhiya <Bindhiya.KanangotBalakrishnan@amd.com >
Signed-off-by: Charis Poag <Charis.Poag@amd.com >
Co-authored-by: Charis Poag <Charis.Poag@amd.com >
[ROCm/amdsmi commit: e7f19b36f0
2025-05-29 13:26:21 -05:00
9a49e454fd
[SWDEV-512393] Fix for incorrect cpu set size input ( #399 )
...
Signed-off-by: Deepak Mewar <deepak.mewar@amd.com >
2025-05-29 12:14:03 -05:00
4b0397fd80
[SWDEV-512393] Fix for incorrect cpu set size input ( #399 )
...
Signed-off-by: Deepak Mewar <deepak.mewar@amd.com >
[ROCm/amdsmi commit: 9a49e454fd
2025-05-29 12:14:03 -05:00
91c9969b72
[SWDEV-530385] Fix CPER "--follow" & "--file-limit" ( #380 )
...
* --follow option fix & --file_limit option added
* change --file_limit and --cper_file to --file-limit and --cper-file
---------
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com >
2025-05-29 11:59:55 -05:00
b793acaa71
[SWDEV-530385] Fix CPER "--follow" & "--file-limit" ( #380 )
...
* --follow option fix & --file_limit option added
* change --file_limit and --cper_file to --file-limit and --cper-file
---------
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com >
[ROCm/amdsmi commit: 91c9969b72
2025-05-29 11:59:55 -05:00
d0a89393df
Remove ring hang ( #391 )
...
Change-Id: I856cd0949d3661911ab9302148aa1bc6e72abeed
Signed-off-by: adapryor <Adam.pryor@amd.com >
2025-05-29 11:58:46 -05:00
Assiouras, Ioannis
Arif, Maisam
Madsen, Jonathan
Liu, Shuzhou (Bill)
David Yat Sin
Narlo, Joseph
Pham, Gabriel
Ma, Bing
Xie, AlexBin
Saeed, Oosman
Baraldi, Giovanni
xuchen-amd
habajpai-amd
Kanangot Balakrishnan, Bindhiya
Charis Poag
Justin Williams
Ben Richard
Mewar, Deepak
Pryor, Adam