- Changed amd-smi static --vbios to accept ifwi
- Change population logic for vbios version API
- Added IFWI boot_firmware to the CLI, C++, Rust, and Python API
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: I4ea504d40a43cfb011ab38fc9a664ecf12d39c8a
- Changed amd-smi static --vbios to accept ifwi
- Change population logic for vbios version API
- Added IFWI boot_firmware to the CLI, C++, Rust, and Python API
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: I4ea504d40a43cfb011ab38fc9a664ecf12d39c8a
[ROCm/amdsmi commit: cd21b5edcc]
For process -
Dual CSV is required in order to print 4 separate rows.
1. Metric header + data
2. Process header + data
Change-Id: Ibb7bfb13fa95a7c43b2e3f9061ada3a6be4aa8cb
Signed-off-by: Charis Poag <Charis.Poag@amd.com>
For process -
Dual CSV is required in order to print 4 separate rows.
1. Metric header + data
2. Process header + data
Change-Id: Ibb7bfb13fa95a7c43b2e3f9061ada3a6be4aa8cb
Signed-off-by: Charis Poag <Charis.Poag@amd.com>
[ROCm/amdsmi commit: 4fd8b88aa5]
* Initial skeleton code for rocprofiler-systems-continuous-integration.yml
* Add python3-devel to opensuse and rhel ci images
* Update rocprofiler-systems-containers.yml to include TheRock tarballs
* Update pip install command for Dockerfile.ubuntu.ci
* Fix pip install again for Dockerfile.ubuntu.ci
* Remove skeleton workflow for CI
* Add new ci-gfx containers for TheRock installs
* Add set -e and pipefail to ci Dockerfiles to detect errors
* Upgrade pip in Dockerfile.ubuntu.ci
* revert pipefail set -e change
* Replace build-docker-ci.sh script with Docker step for ci-base
* Add support for gfx950, add containers-ci-gfx.yml
* Add working-directory to matrix setup steps
* Try changing containers-ci-gfx.yml
* make more changes to containers-ci-gfx.yml
* Remove build-docker-ci.sh script from gfx step, fix typo in Dockerfile
* Remove gfx110X and gfx120X for now
* Update ci-gfx docker workflow to use ghcr.io
* Temporary change to test one image
* Enable push to test out ghcr package
* Add labels to debug oauth issue
* add pacakages permissions to step
* add rocprofiler-systems-ghcr.yml workflow
* Remove cache from Docker push action step
* Add prefix to tag
* Add back gfx94X and gfx950 support, add back no push on PR
* Remove gfx container creation from rocprofiler-systems-containers.yml
* Add a gfx950 image for now
* Revert change
* Simplify the roofline binary pickup process by determining which base distribution the system OS is based off of, and select the correct binary.
* Add more OS distribution support to roofline by modifying the detection parameters and adding an AZL binary
* Update changelog to include roofline support additions
---------
Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com>
Add a test to verify VGPRs.
Make hipInfo show maxAddressableVgprsPerThread.
Change-Id: Ibfc2c912a54ccd1686a3930a1008c472a8465136
Co-authored-by: taosang2 <tao.sang@amd.com>
* rocrtst: Reduce host memory limit to 70%
Reducing the upper bound for rocrtstFunc.Memory_Max_Mem to 70% from
90% to help reduce test execution time.
Signed-off-by: Sunday Clement <Sunday.Clement@amd.com>
* rocrtst: Add ROCRTST_LIMIT_POOL_SIZE env var
Add environment variable to override the memory pool sizes when running
tests.
Co-authored-by: David Yat Sin <David.YatSin@amd.com>
---------
Signed-off-by: Sunday Clement <Sunday.Clement@amd.com>
Co-authored-by: David Yat Sin <David.YatSin@amd.com>
The GFX12 host-trap PC sampling support in SDK and V3.
Introducing parser tests specific to GFX12.
Co-authored-by: vlaindic_amdeng <vladimir.indic@amd.com>
Return error when ext_fine_grain_pool is unavailable for
hipHostMallocUncached, hipHostAllocUncached and
hipExtHostRegisterUncached.
Disable related tests on Navi4x where
ext_fine_grain_pool is unavailable
* libhsakmt: Update hsakmt_fmm_get_handle to support address range
Currently, hsakmt_fmm_get_handle works only if the address is allocated
(staring) value. Update it so it can find the handle if address falls in
the valid allocated range. This is useful for AMD infinity storage
feature where data needs to be transferred to any memory within in the
allocated range
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
* libhsakmt: Introduce AMD Infinity Storage (AIS) API
Add hsaKmtAisReadWriteFile() API to support AMD Infinity Storage. The
API moves data directly from GPU VRAM to a file.
v2: Add in/out ioctl arguments to provide more status information to
user space. Modify hsaKmt API also accordingly.
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
* rocr: Initial implementation of AMD Infinity Storage (AIS)
Implement first two API: hsa_amd_ais_file_write and hsa_amd_ais_file_read
v2: Change API from hsa_amd_ to hsa_amd_ais_
Change API to take in handle instead of fd for compatibility accross
different platforms
Original Author: Chris Freehill <Chris.Freehill@amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
---------
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Prior we were enabling dynamic loading mode if BUILD_SHARED_LIBS, but this is not correct. We should only be loading dynamically if the amd_comgr library itself is shared.
Background: we have a configuration where we use a static linked comgr stub in order to achieve LLVM isolation (it dynamically loads the comgr and compiler into a dedicated link namespace) in an otherwise dynamic linked clr.
hipMemPtrGetInfo was returning the error hipErrorInvalidValue if it
was called on a nullptr. However, this does not match the malloc
convention where a nullptr has size zero; for example,
malloc_usable_size() returns zero if called on a nullptr.
This commit changes hipMemPtrGetInfo to set the size to zero and
return hipSuccess when called with a nullptr. (This also fits with
hipMalloc and hipFree usage, since hipMalloc of size zero results in a
nullptr, and hipFree of a nullptr is successful.)
Because the base QueueWrapper class copies the wrapped queue's
amd_queue_v2_t queue descriptor struct the QueueProxy seems
superfluous as it will have the same effect as calling the
underlying methods on the wrapped queue itself.
Additionally, because the QueueProxy needs to access the wrapped
queue's queue descriptor it breaks the Queue API which is meant
to abstract the underlying agent's queue implementation.
This makes it easier to generalize the core::Queue as well as
the InterceptQueue.
Signed-off-by: Tony Gutierrez <anthony.gutierrez@amd.com>
* Changes:
- Moved `amd-smi monitor` guest fixes to 7.0.2
- [7.0.0] Provided details on updated violation output
- [7.0.0] Provided details on new set/reset error outputs
- [7.0.0] Added details on a resolved non-json format output
for `amd-smi partiton --json`
- [7.0.0] Moved known issue for `amd-smi monitor`
accidentally placed in wrong release
- Moved `amd-smi monitor` guest fixes to 7.0.2
- [7.1.0] Added power caps guest set info
- [7.1.0] Other various fixes noted
Change-Id: I374b98f32e947520fcb8a6e33e6f6fcd290b00d6
Signed-off-by: Charis Poag <Charis.Poag@amd.com>
* Changes:
- Moved `amd-smi monitor` guest fixes to 7.0.2
- [7.0.0] Provided details on updated violation output
- [7.0.0] Provided details on new set/reset error outputs
- [7.0.0] Added details on a resolved non-json format output
for `amd-smi partiton --json`
- [7.0.0] Moved known issue for `amd-smi monitor`
accidentally placed in wrong release
- Moved `amd-smi monitor` guest fixes to 7.0.2
- [7.1.0] Added power caps guest set info
- [7.1.0] Other various fixes noted
Change-Id: I374b98f32e947520fcb8a6e33e6f6fcd290b00d6
Signed-off-by: Charis Poag <Charis.Poag@amd.com>
[ROCm/amdsmi commit: 94d87ea222]
Maisam Arif
Charis Poag
systems-assistant[bot]
Jonathan R. Madsen
xuchen-amd
Ioannis Assiouras
Kian Cossettini
Ajay GunaShekar
Jason Bonnell
Mythreya Kuricheti
Venkateshwar Reddy Kandula
cfallows-amd
David Yat Sin
vedithal-amd
itrowbri
Sunday Clement
Shadi Dashmiz
abchoudh-amd
MachineTom
hkasivis
Todd tiantuo Li
Stella Laurenzo
yalmusaf_amdeng
Jatin Chaudhary
ywang103-amd
JonathanLichtnerAMD
Julia Jiang
Tony G
Justin Williams