 gilbertlee-amd
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a062c80298
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[TransferBench] Displaying PCIe Bus ID (#288)
* Adding PCIe BusID per GPU in topology display
[ROCm/rccl commit: 61e1a71d14]
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2020-10-21 16:13:36 -06:00 |
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gilbertlee-amd
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0282595de5
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TransferBench Typo. Pinned host memory uses C not P (#286)
[ROCm/rccl commit: 769418c5c7]
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2020-10-21 12:05:38 -06:00 |
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gilbertlee-amd
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5ca117d7cd
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New TransferBench features (#273)
* Upgrading TransferBench to support pinned CPU memory, expanding functionality, cleaning up env vars
[ROCm/rccl commit: ee262819a7]
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2020-09-25 12:20:48 -06:00 |
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gilbertlee-amd
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3e4ddd065b
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Upgrading various TransferBench features (#257)
[ROCm/rccl commit: ec9af40fcd]
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2020-08-19 09:47:19 -06:00 |
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gilbertlee-amd
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1a9b00a7fd
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Fixes to make TransferBench compile for hipclang (#254)
[ROCm/rccl commit: c985478133]
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2020-08-13 12:25:28 -06:00 |
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 Gilbert Lee
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eebc6f2844
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Adding option to re-use streams instead of re-creating per topology
[ROCm/rccl commit: 339bf9ff19]
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2020-04-23 15:53:40 +00:00 |
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 Aaron Enye Shi
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bfbfe370c3
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Fix HIP-Clang build with HSA headers
HIP-Clang does not include these HSA headers, and they need to be explicitly added in RCCL.
[ROCm/rccl commit: a95090d981]
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2020-04-03 17:58:23 -04:00 |
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 Stanley Tsang
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e5419407c4
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Updating copyright notices for 2020.
[ROCm/rccl commit: 20fa04d9b6]
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2020-01-29 15:28:08 -08:00 |
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Gilbert Lee
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5783917a75
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Changing single sync mode to time all iterations instead of just last
[ROCm/rccl commit: e5074ce94d]
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2019-12-20 17:08:39 -08:00 |
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gilbertlee-amd
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a461b6d139
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Adding new sleep after sync capability for data fabric profiling (#162)
Fixing missing header include for ROCM 3.0 changes
[ROCm/rccl commit: 2f4269d06d]
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2019-12-12 15:20:54 -07:00 |
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gilbertlee-amd
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22cbbb9004
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Adding interactive mode for profiling purposes (#150)
[ROCm/rccl commit: fd94f4fa25]
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2019-11-05 17:10:16 -07:00 |
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gilbertlee-amd
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f9ef1553aa
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Single Sync Timing mode (#144)
* Adding single sync timing mode to emulate timing reported by rccl-prim-test / rccl-tests
* Adding duration / overhead info
[ROCm/rccl commit: 2f9edd2432]
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2019-11-01 10:18:25 -06:00 |
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Gilbert Lee
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a99accb2cb
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Adding ability to switch between fine/coarse grain destination GPU memory
Adding ability to switch between memset/memcpy
[ROCm/rccl commit: 648c1ee7cc]
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2019-10-29 12:00:32 -06:00 |
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gilbertlee-amd
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8645391260
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Adding TransferBench tool (#113)
* Adding standalone TransferBench tool
[ROCm/rccl commit: b8cf48fc16]
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2019-08-07 17:21:41 -06:00 |
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