Grafico dei commit

54851 Commit

Autore SHA1 Messaggio Data
Ben Sander b8df982dcd Merge branch 'privatestaging' of https://github.com/AMDComputeLibraries/HIP-privatestaging into privatestaging 2016-05-03 11:16:09 -05:00
Ben Sander 1d2f267dc3 Merge branch 'privatestaging' of https://github.com/AMDComputeLibraries/HIP-privatestaging into privatestaging 2016-05-03 11:16:09 -05:00
Ben Sander 76e08e3ea1 libstdc++ is default
[ROCm/clr commit: a35e995244]
2016-05-03 11:14:27 -05:00
Ben Sander a35e995244 libstdc++ is default 2016-05-03 11:14:27 -05:00
Ben Sander c9b231940a libstdc++ is default 2016-05-03 11:14:27 -05:00
Ben Sander 81f7559a37 doc update, add proposed .86 release notes
[ROCm/clr commit: c40b212430]
2016-05-03 11:11:04 -05:00
Ben Sander c40b212430 doc update, add proposed .86 release notes 2016-05-03 11:11:04 -05:00
Ben Sander 42101bf032 doc update, add proposed .86 release notes 2016-05-03 11:11:04 -05:00
foreman 8fd7c40f36 P4 to Git Change 1264616 by lmoriche@lmoriche_opencl_dev on 2016/05/03 11:39:29
SWDEV-78467 - OpenCL LiquidFlash feature
	       Enable LiquidFlash on mainline

Affected files ...

... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/build/Makefile.api#132 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_context.cpp#49 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_lqdflash_amd.cpp#14 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/device.hpp#273 edit


[ROCm/clr commit: afb6279073]
2016-05-03 11:48:35 -04:00
foreman afb6279073 P4 to Git Change 1264616 by lmoriche@lmoriche_opencl_dev on 2016/05/03 11:39:29
SWDEV-78467 - OpenCL LiquidFlash feature
	       Enable LiquidFlash on mainline

Affected files ...

... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/build/Makefile.api#132 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_context.cpp#49 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_lqdflash_amd.cpp#14 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/device.hpp#273 edit
2016-05-03 11:48:35 -04:00
foreman be416e53ff P4 to Git Change 1264616 by lmoriche@lmoriche_opencl_dev on 2016/05/03 11:39:29
SWDEV-78467 - OpenCL LiquidFlash feature
	       Enable LiquidFlash on mainline

Affected files ...

... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/build/Makefile.api#132 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_context.cpp#49 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_lqdflash_amd.cpp#14 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/device.hpp#273 edit


[ROCm/clr commit: 3736e175a3]
2016-05-03 11:48:35 -04:00
foreman 3736e175a3 P4 to Git Change 1264616 by lmoriche@lmoriche_opencl_dev on 2016/05/03 11:39:29
SWDEV-78467 - OpenCL LiquidFlash feature
	       Enable LiquidFlash on mainline

Affected files ...

... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/build/Makefile.api#132 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_context.cpp#49 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_lqdflash_amd.cpp#14 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/device.hpp#273 edit
2016-05-03 11:48:35 -04:00
Amber Lin 73ad0a1942 Correct NumCaches against the CPU node
In a NUMA system, topology should report NumCaches as the number of caches
within the node but current code reports the total caches in the system. This
patch fixes the error. This patch also uses cpuid to get cache information
instead of reading from sysfs files. See "Intel Corporation, Intel 64 and IA-32
 Architectures Software Developer's  Manual Volume 2(2A, 2B & 2C) Instruction
Set Reference" 3-179 for cpuid instruction features used in this patch.


Change-Id: I8ecece6c2b230741822620b44e66ddc201ff5112
2016-05-03 11:39:33 -04:00
Amber Lin 19b4a16ead Correct NumCaches against the CPU node
In a NUMA system, topology should report NumCaches as the number of caches
within the node but current code reports the total caches in the system. This
patch fixes the error. This patch also uses cpuid to get cache information
instead of reading from sysfs files. See "Intel Corporation, Intel 64 and IA-32
 Architectures Software Developer's  Manual Volume 2(2A, 2B & 2C) Instruction
Set Reference" 3-179 for cpuid instruction features used in this patch.


Change-Id: I8ecece6c2b230741822620b44e66ddc201ff5112


[ROCm/ROCR-Runtime commit: 73ad0a1942]
2016-05-03 11:39:33 -04:00
Ben Sander c578bb72ef Update porting guide docs on -stdlib
[ROCm/clr commit: 72f7a15e54]
2016-05-03 09:20:41 -05:00
Ben Sander 72f7a15e54 Update porting guide docs on -stdlib 2016-05-03 09:20:41 -05:00
Ben Sander 322665d5ce Update porting guide docs on -stdlib 2016-05-03 09:20:41 -05:00
Ben Sander a079847536 comment change
[ROCm/clr commit: 07b5785da2]
2016-05-03 08:33:35 -05:00
Ben Sander 07b5785da2 comment change 2016-05-03 08:33:35 -05:00
Ben Sander c921d47c17 comment change 2016-05-03 08:33:35 -05:00
Maneesh Gupta 07026bfdea hcc_dialects report PASSED when passed 2016-05-03 14:32:59 +05:30
Maneesh Gupta bd3692dd12 hcc_dialects report PASSED when passed
[ROCm/clr commit: c2c54aa299]
2016-05-03 14:32:59 +05:30
Maneesh Gupta c2c54aa299 hcc_dialects report PASSED when passed 2016-05-03 14:32:59 +05:30
Maneesh Gupta 6181988232 hcc_dialects report PASSED when passed 2016-05-03 14:32:59 +05:30
Maneesh Gupta fb88bb1c17 bit_extract reports PASSED when passed 2016-05-03 14:19:25 +05:30
Maneesh Gupta 3ce3e64493 bit_extract reports PASSED when passed
[ROCm/clr commit: ab671b729d]
2016-05-03 14:19:25 +05:30
Maneesh Gupta ab671b729d bit_extract reports PASSED when passed 2016-05-03 14:19:25 +05:30
Maneesh Gupta cb6a5d9421 bit_extract reports PASSED when passed 2016-05-03 14:19:25 +05:30
Ben Sander 18635995af add fallback to libc++
[ROCm/clr commit: 6a960aff38]
2016-05-02 23:50:39 -05:00
Ben Sander 6a960aff38 add fallback to libc++ 2016-05-02 23:50:39 -05:00
Ben Sander d5537f9f95 add fallback to libc++ 2016-05-02 23:50:39 -05:00
Ben Sander e6ec2439ec Link test with libc++
[ROCm/clr commit: 8cce8dbe61]
2016-05-02 23:38:43 -05:00
Ben Sander 8cce8dbe61 Link test with libc++ 2016-05-02 23:38:43 -05:00
Ben Sander 993ca9cee3 Link test with libc++ 2016-05-02 23:38:43 -05:00
Ben Sander ef3273c1b1 add make_hip_executable_libcpp
[ROCm/clr commit: c79dad8000]
2016-05-02 23:32:52 -05:00
Ben Sander c79dad8000 add make_hip_executable_libcpp 2016-05-02 23:32:52 -05:00
Ben Sander 6e332a9c9c add make_hip_executable_libcpp 2016-05-02 23:32:52 -05:00
Ben Sander 41c57d1e00 Merge branch 'privatestaging' into grid_launch
[ROCm/clr commit: 20043d602e]
2016-05-02 18:38:20 -05:00
Ben Sander 20043d602e Merge branch 'privatestaging' into grid_launch 2016-05-02 18:38:20 -05:00
Ben Sander 89df2f4e2f Merge branch 'privatestaging' into grid_launch 2016-05-02 18:38:20 -05:00
foreman 71dc1ef253 P4 to Git Change 1264269 by smekhano@stas-nova-hsa on 2016/05/02 16:32:25
SWDEV-77584 - HSA HLC: refactoring of min/max processing and folding

	1. Fixed correctness bug: if a source contains code like (x > y) ? x : y, HLC was folding
	this and similar patterns to min and max instructions. The problem is with NaN handling.
	Such a pattern may return NaN if one of two arguments is a NaN. All our instructions return
	a number in this case, except for gcn instruction returning a qNaN if input is sNaN.
	For a qNaN a number is retuned in any way. Therefor such folding is only correct if NaN handling
	is disabled. Patterns are predicated to work with -cl-finite-math-only or -cl-fast-relaxed-math
	which includes the former option.

	NB: Performance regressions are expected in programs which do not use either of these options.

	2. Compiler lib did hot handle -cl-finite-math-only. Also added handling of -cl-no-signed-zeros,
	even though it does not affect code generation because there is no llvm counterpart for it.

	3. Patterns for NaN agnostic comparison codes are added. We are getting these in case if finite
	only math is requested.

	4. Removed patterns for __hsail_min_f* and __hsail_max_f*. Instead these intrinsics are lowered
	to fminnum and fmaxnum llvm operations with the same semantics. This allows to decrease the number
	of patterns and simplify handling.

	5. For f32 we were only producing gcn versions min and max with source patterns if gcn is enabled.
	Added similar lowering to standard min/max HSAIL operations if gcn is disabled.

	6. Added lowering of fmaxnum/fminnum to more efficient gcn operations if gcn is enabled.
	Neither OpenCL nor LLVM IR semantics are violated by this.

	7. Moved GCN media intrinsics definitions into the GCN directory.

	8. Added folding of gcn f32 instructions min(max), min(min), max(max) into corresponding gcn
	instructions med3, min3 and max3. This should have been helpful for color clamping.
	Performance testing showed these are slow, however. T-Rex test from compubench has slowed down
	by 50 times for no obvious reason. Therefor folding is disabled by default. The option -enable-gcn-mm3
	is added to enable the folding for testing purposes.

	Testing: smoke, precheckin, luxmark, compubench, BasemarkCL,
	conformance: commonfns, bruteforce -w, relationals, select
	Reviewed by Brian Sumner

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/common/codegen.cpp#68 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/common/opt_level.cpp#29 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/options.cpp#35 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/GCN/HSAILArithmetic.td#3 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/GCN/HSAILFusion.td#3 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/GCN/HSAILIntrinsics.td#4 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILArithmetic.td#45 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILFusion.td#28 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILISelDAGToDAG.cpp#68 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILISelLowering.cpp#113 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILInstrInfo.td#21 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILIntrinsics.td#70 edit
... //depot/stg/opencl/drivers/opencl/tests/hsa/src/llc/opt/minmax/minmaxf3pat.cl#1 add
... //depot/stg/opencl/drivers/opencl/tests/hsa/tlst/llc_opt.tlst#93 edit


[ROCm/clr commit: efa52f77ef]
2016-05-02 16:43:00 -04:00
foreman efa52f77ef P4 to Git Change 1264269 by smekhano@stas-nova-hsa on 2016/05/02 16:32:25
SWDEV-77584 - HSA HLC: refactoring of min/max processing and folding

	1. Fixed correctness bug: if a source contains code like (x > y) ? x : y, HLC was folding
	this and similar patterns to min and max instructions. The problem is with NaN handling.
	Such a pattern may return NaN if one of two arguments is a NaN. All our instructions return
	a number in this case, except for gcn instruction returning a qNaN if input is sNaN.
	For a qNaN a number is retuned in any way. Therefor such folding is only correct if NaN handling
	is disabled. Patterns are predicated to work with -cl-finite-math-only or -cl-fast-relaxed-math
	which includes the former option.

	NB: Performance regressions are expected in programs which do not use either of these options.

	2. Compiler lib did hot handle -cl-finite-math-only. Also added handling of -cl-no-signed-zeros,
	even though it does not affect code generation because there is no llvm counterpart for it.

	3. Patterns for NaN agnostic comparison codes are added. We are getting these in case if finite
	only math is requested.

	4. Removed patterns for __hsail_min_f* and __hsail_max_f*. Instead these intrinsics are lowered
	to fminnum and fmaxnum llvm operations with the same semantics. This allows to decrease the number
	of patterns and simplify handling.

	5. For f32 we were only producing gcn versions min and max with source patterns if gcn is enabled.
	Added similar lowering to standard min/max HSAIL operations if gcn is disabled.

	6. Added lowering of fmaxnum/fminnum to more efficient gcn operations if gcn is enabled.
	Neither OpenCL nor LLVM IR semantics are violated by this.

	7. Moved GCN media intrinsics definitions into the GCN directory.

	8. Added folding of gcn f32 instructions min(max), min(min), max(max) into corresponding gcn
	instructions med3, min3 and max3. This should have been helpful for color clamping.
	Performance testing showed these are slow, however. T-Rex test from compubench has slowed down
	by 50 times for no obvious reason. Therefor folding is disabled by default. The option -enable-gcn-mm3
	is added to enable the folding for testing purposes.

	Testing: smoke, precheckin, luxmark, compubench, BasemarkCL,
	conformance: commonfns, bruteforce -w, relationals, select
	Reviewed by Brian Sumner

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/common/codegen.cpp#68 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/common/opt_level.cpp#29 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/options.cpp#35 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/GCN/HSAILArithmetic.td#3 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/GCN/HSAILFusion.td#3 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/GCN/HSAILIntrinsics.td#4 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILArithmetic.td#45 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILFusion.td#28 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILISelDAGToDAG.cpp#68 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILISelLowering.cpp#113 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILInstrInfo.td#21 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm/lib/Target/HSAIL/HSAILIntrinsics.td#70 edit
... //depot/stg/opencl/drivers/opencl/tests/hsa/src/llc/opt/minmax/minmaxf3pat.cl#1 add
... //depot/stg/opencl/drivers/opencl/tests/hsa/tlst/llc_opt.tlst#93 edit
2016-05-02 16:43:00 -04:00
Ben Sander b578915e89 Merge branch 'p2p' into privatestaging
[ROCm/clr commit: caadac1005]
2016-05-02 13:48:06 -05:00
Ben Sander caadac1005 Merge branch 'p2p' into privatestaging 2016-05-02 13:48:06 -05:00
Ben Sander 0488897bb4 Merge branch 'p2p' into privatestaging 2016-05-02 13:48:06 -05:00
Ben Sander 183aaa5888 Merge branch 'privatestaging' into p2p
[ROCm/clr commit: 230b6546b5]
2016-05-02 13:38:01 -05:00
Ben Sander 230b6546b5 Merge branch 'privatestaging' into p2p 2016-05-02 13:38:01 -05:00
Ben Sander 0f00474dad Merge branch 'privatestaging' into p2p 2016-05-02 13:38:01 -05:00
Ben Sander eaf4e4a0ee PASS with warning if not enough GPUs detected.
[ROCm/clr commit: a398cd4cda]
2016-05-02 13:37:14 -05:00
Ben Sander a398cd4cda PASS with warning if not enough GPUs detected. 2016-05-02 13:37:14 -05:00