Commit Graph

20 Commits

Author SHA1 Message Date
Satyanvesh Dittakavi a82c9f8322 SWDEV-264244 - Hide Notifications from HIP
This fixes hipStreamQuery returning hipErrorNotReady when idle
Change-Id: I3f77666a00bc6a7162b6c660d79e76c09669d94f


[ROCm/clr commit: a711a49881]
2021-03-16 06:30:55 -04:00
German Andryeyev 3a4d69def2 SWDEV-272496 - Detect callbacks and force AQL barrier
HIP tests require HIP callbacks to be processed in another thread.
This change will use a thread from HSA signal callbacks to make
sure a HIP callback was done asynchronously.
Also process the callback before changing the status of command

Change-Id: Icef85d0e0f808663882cf6881ff1be3e5eca29ac


[ROCm/clr commit: 7f32d0b425]
2021-03-05 11:33:51 -05:00
Sarbojit Sarkar 790fd35a77 SWDEV-254329 - Init Profiling when ON
Change-Id: I72f9da94f8fbb95e66cf145831b252af05a19dc4


[ROCm/clr commit: fa89ee5ee0]
2021-03-04 23:35:27 -05:00
Sarbojit Sarkar 469f00e6f3 SWDEV-254329 - Fix for profiler ON/OFF
Change-Id: Iea72ae96ebe7ed95322dfc39d785ac326b47f6dc


[ROCm/clr commit: 14d54a7b29]
2021-03-02 02:16:14 -05:00
Vladislav Sytchenko 0a132499ce SWDEV-271964 - Revert "SWDEV-264244 Fix StreamSync"
This reverts commit a962e2d0b3.

Change-Id: I870c8b71edeb31f587fffe2447762acba61a7938


[ROCm/clr commit: 184b2631d5]
2021-02-24 11:43:08 -05:00
Ravi C Akkenapally 6629930067 SWDEV-179105 - Stream Operations: Add support for Wait and Write
Change-Id: Ibffa1d6d573826b64763da280074a77271d66808


[ROCm/clr commit: 0a5f9a3b10]
2021-02-15 17:02:38 -08:00
German Andryeyev e60c7aa890 SWDEV-269654 - Fix HIP stream busy query
- Avoid GPU wait on the marker submission and update the command
batch after HSA signal callback upon HSA barrier completion.

Change-Id: I5c1c97212aefc2ae4b99aa9e2a81627ee9a38c1c


[ROCm/clr commit: 6966d8098e]
2021-02-09 12:57:12 -05:00
Satyanvesh Dittakavi a962e2d0b3 SWDEV-264244 Fix StreamSync
Change-Id: I3a46a607a77aaf46dcd1fcf08db7e926613fe8d1


[ROCm/clr commit: a148a71075]
2021-01-08 02:06:31 -05:00
Sarbojit Sarkar caa75dd35f [SWDEV-259635] explicit allow_access for hipMemcpy2D
Change-Id: Ia3206c08f92f417dc486c5f0dd40474f77b473d9


[ROCm/clr commit: f403b1c079]
2020-12-09 01:09:53 -05:00
Saleel Kudchadker 1410f002f3 Use barrier packets for event profiling
Use barrier packets for every profile marker that gets submitted
and use the completion signal to get GPU ts. This gives most accurate
dispatch time. Club cache flushes with profile marker if there is a
pending dispatch that needs cache flush. This optimization saves on
extra barrier and helps wall time

Change-Id: Ib62d6d7aabf4743827b561be6c9c5afa813203da


[ROCm/clr commit: 59c6cb0268]
2020-12-03 13:45:14 -05:00
German Andryeyev 7df8e0bcb3 Correct reported info in ROC profiler
OCL can't distinguish different copy types, but ROC profiler
expects SDMA transfer visibility. Add extra code to detect
a transfer with the host memory and substitute OCL command

Change-Id: I5290acd0e10bc082e00c1d4ae1474a075de7f165


[ROCm/clr commit: bd340d8cbf]
2020-10-23 18:29:48 -04:00
Laurent Morichetti c863b2074b Use std::atomic
Replace amd::Atomic with std::atomic. Remove make_atomic uses by
converting the variable to std::atomic and making sure the memory
order is relaxed when synchronizes-with is not needed.

Delete utils/atomic.hpp.

Change-Id: I0b36db8d604a8510ac6e36b32885fd16a1b8ccfa


[ROCm/clr commit: 5d4b6f74d3]
2020-09-09 14:55:29 -04:00
Saleel Kudchadker 820a456980 Add Queue profling param and toggle for HIP
Use signal timestamps if NDRange command takes forceProfile flag.

Change-Id: Ib7f187d781fd78a7346818afb3344a9378f4c104


[ROCm/clr commit: ec73340348]
2020-08-06 03:09:53 -04:00
Tao Sang 44eb207f8d Apply constexpr on global constant varaibles
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef


[ROCm/clr commit: fdef6f722f]
2020-07-22 22:14:13 -04:00
Jatin Chaudhary 7dae2632b9 Adding AnyOrder Flag
Change-Id: I6baaef42b98adfbc8cf2605e175ec007e008045f


[ROCm/clr commit: 48690f29e9]
2020-07-22 00:25:04 -04:00
German Andryeyev 0a6056ac82 Initial HMM support
- Expose ROCclr interfaces for HIP usage
- ROCr interfaces aren't available in staging, thus control the
build with AMD_HMM_SUPPORT define

Change-Id: Iadc2bcc230e78d3b0dc22b235189c8cc80843446


[ROCm/clr commit: c5afd5d412]
2020-06-12 09:06:07 -04:00
Payam 17f6a41982 removing AMD emails per palamida scan
Change-Id: If7307f5b1f81a43f2725ec5abd3b8989cbddbcc5


[ROCm/clr commit: 1b6f21ad9a]
2020-03-11 21:26:55 -04:00
Laurent Morichetti b3297f189d Replace cl_* integral types with standard types.
cl_bool -> bool
cl_int -> int32_t
cl_uint -> uint32_t
cl_long -> int64_t
cl_ulong -> uint64_t
cl_float -> float
cl_double -> double
cl_bitfield -> uint64_t

Change-Id: I840c8993b55f98f5b745d21e27f5f28233647a58


[ROCm/clr commit: d9d9c69399]
2020-02-12 13:16:06 -08:00
Laurent Morichetti e284923583 Update copyright info
Change-Id: Ia4f9ff0f5f873b4223a8cca154188bb0d2f1abba


[ROCm/clr commit: b4c6143a2f]
2020-02-04 09:26:14 -08:00
Laurent Morichetti 011f3e945b Merge branch 'origin/pghafari/vdi-prototype' into lmoriche/amd-master
Change-Id: Id3b833d405596735becb3346f3b08c6da57033fe


[ROCm/clr commit: 20c7173849]
2020-01-30 20:12:13 -08:00