da18a49f93
Adding pytest_profile_general.py
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Signed-off-by: Jose Santos <josantos@login1.hpcfund >
[ROCm/rocprofiler-compute commit: 23db40d257
2024-02-26 14:48:33 -06:00
23db40d257
Adding pytest_profile_general.py
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Signed-off-by: Jose Santos <josantos@login1.hpcfund >
2024-02-26 14:48:33 -06:00
4db3a5b0cd
Merge amd-staging into amd-master 20240226
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Change-Id: I1d6db79aa35dabbfb4b837ffdb5dd63ff099cbd9
Signed-off-by: Charis Poag <Charis.Poag@amd.com >
[ROCm/rocm_smi_lib commit: a74062cc30
2024-02-26 13:50:16 -06:00
a74062cc30
Merge amd-staging into amd-master 20240226
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Change-Id: I1d6db79aa35dabbfb4b837ffdb5dd63ff099cbd9
Signed-off-by: Charis Poag <Charis.Poag@amd.com >
2024-02-26 13:50:16 -06:00
341ecaf1d9
libhsakmt: Associate correct GPU with queue memory
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Pass the correct gpu_id to KFD for system memory that is allocated for
the queue and eop buffer
Change-Id: I43bb6333560a7d9d38293c191303161ab1443b5d
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com >
2024-02-26 14:20:16 -05:00
2f05682f29
libhsakmt: Associate correct GPU with queue memory
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Pass the correct gpu_id to KFD for system memory that is allocated for
the queue and eop buffer
Change-Id: I43bb6333560a7d9d38293c191303161ab1443b5d
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com >
[ROCm/ROCR-Runtime commit: 341ecaf1d9
2024-02-26 14:20:16 -05:00
f2006d6899
Record interop mapped object in allocation_map_
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This allows the VA to be recorded in ROCr so that they are not
treated as an invalid pointer in future API calls.
Change-Id: I8d1d8ef9816a984c89d30a2179b0ce8940fef1da
2024-02-26 13:40:55 -05:00
a0ebf06e6e
Record interop mapped object in allocation_map_
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This allows the VA to be recorded in ROCr so that they are not
treated as an invalid pointer in future API calls.
Change-Id: I8d1d8ef9816a984c89d30a2179b0ce8940fef1da
[ROCm/ROCR-Runtime commit: f2006d6899
2024-02-26 13:40:55 -05:00
e35c600d45
Fix for rocm-smi not getting mclk for MI100
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Signed-off-by: Nicholas Curtis <nicurtis@amd.com >
Signed-off-by: Karl W Schulz <karl.schulz@amd.com >
[ROCm/rocprofiler-compute commit: f2235b7f1d
2024-02-26 11:47:56 -06:00
f2235b7f1d
Fix for rocm-smi not getting mclk for MI100
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Signed-off-by: Nicholas Curtis <nicurtis@amd.com >
Signed-off-by: Karl W Schulz <karl.schulz@amd.com >
2024-02-26 11:47:56 -06:00
29c22f1558
EXSWHTEC-348 - Implement tests for hipArrayGetInfo, hipArrayGetDescriptor, and hipArray3DGetDescriptor #428
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Change-Id: I08a7c96c971f5ee82be4e69343600530a214a117
[ROCm/hip-tests commit: 39bd6bcac6
2024-02-26 22:33:20 +05:30
39bd6bcac6
EXSWHTEC-348 - Implement tests for hipArrayGetInfo, hipArrayGetDescriptor, and hipArray3DGetDescriptor #428
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Change-Id: I08a7c96c971f5ee82be4e69343600530a214a117
2024-02-26 22:33:20 +05:30
b186f5c6e1
EXSWHTEC-345 - Implement tests for hipPointerSetAttribute #427
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Change-Id: I71e4eb3aab07eff8e24f54fa266a3971839501d1
[ROCm/hip-tests commit: 20a3811696
2024-02-26 22:29:06 +05:30
20a3811696
EXSWHTEC-345 - Implement tests for hipPointerSetAttribute #427
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Change-Id: I71e4eb3aab07eff8e24f54fa266a3971839501d1
2024-02-26 22:29:06 +05:30
1195ab7a48
EXSWHTEC-344 - Refactor and extend tests for hipDrvGetErrorName and hipDrvGetErrorString #426
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Change-Id: I4eb57eeaff6e5d723e3e236e07d4320430a4582a
[ROCm/hip-tests commit: fb9a9a9a03
2024-02-26 22:24:18 +05:30
fb9a9a9a03
EXSWHTEC-344 - Refactor and extend tests for hipDrvGetErrorName and hipDrvGetErrorString #426
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Change-Id: I4eb57eeaff6e5d723e3e236e07d4320430a4582a
2024-02-26 22:24:18 +05:30
d339e17a53
EXSWHTEC-338 - Implement tests for half2 type casting intrinsics #422
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Change-Id: I5492fa7d54573d45bfdb9320e74ccc6ca7640d2d
[ROCm/hip-tests commit: 50031b5c44
2024-02-26 22:23:34 +05:30
50031b5c44
EXSWHTEC-338 - Implement tests for half2 type casting intrinsics #422
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Change-Id: I5492fa7d54573d45bfdb9320e74ccc6ca7640d2d
2024-02-26 22:23:34 +05:30
fb232e2937
EXSWHTEC-333 - Extend tests for warp shlf and shfl_xor functions to support half-precision types #420
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Change-Id: I1da47a0a4b8d15b0d2d569eb4769aa40207aade2
[ROCm/hip-tests commit: 91cff794b8
2024-02-26 22:02:22 +05:30
91cff794b8
EXSWHTEC-333 - Extend tests for warp shlf and shfl_xor functions to support half-precision types #420
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Change-Id: I1da47a0a4b8d15b0d2d569eb4769aa40207aade2
2024-02-26 22:02:22 +05:30
af3497362e
EXSWHTEC-275 - Implement tests for atomic CAS operations #408
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Change-Id: I77c6995f1f85dedce3b3afb907abb03a4a1f2b83
[ROCm/hip-tests commit: 7659470dbc
2024-02-26 22:01:41 +05:30
7659470dbc
EXSWHTEC-275 - Implement tests for atomic CAS operations #408
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Change-Id: I77c6995f1f85dedce3b3afb907abb03a4a1f2b83
2024-02-26 22:01:41 +05:30
c2b5bc06f0
EXWHTEC-262 - Implement tests for increment/decrement atomic operations #395
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Change-Id: I4d3ff4beb9385abdebf59e3eac8783a5c625fdac
[ROCm/hip-tests commit: 8f244479cf
2024-02-26 22:01:19 +05:30
8f244479cf
EXWHTEC-262 - Implement tests for increment/decrement atomic operations #395
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Change-Id: I4d3ff4beb9385abdebf59e3eac8783a5c625fdac
2024-02-26 22:01:19 +05:30
d9a8761e24
EXSWHTEC-262 - Implement tests for atomic sub operations #394
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Change-Id: Ib817f1245695b9eeaaa11d7a2ff9b2eb4ca4f72d
[ROCm/hip-tests commit: cc957255f3
2024-02-26 22:00:39 +05:30
cc957255f3
EXSWHTEC-262 - Implement tests for atomic sub operations #394
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Change-Id: Ib817f1245695b9eeaaa11d7a2ff9b2eb4ca4f72d
2024-02-26 22:00:39 +05:30
3223b6d129
EXSWHTEC-262 - Implement tests for atomic add operations #393
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Change-Id: I11ff4658ef2076b25e0bdb91bbcd4f436b0fbd27
[ROCm/hip-tests commit: e70cadd514
2024-02-26 21:59:18 +05:30
e70cadd514
EXSWHTEC-262 - Implement tests for atomic add operations #393
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Change-Id: I11ff4658ef2076b25e0bdb91bbcd4f436b0fbd27
2024-02-26 21:59:18 +05:30
191caf46ac
libhsakmt: Move global zfb_support to globals.c
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zfb_support needs to accessed from multiple places, so move to globals.c
file
Change-Id: I40b487c26a13e7cc6fc01b671d6166e7114e02d2
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com >
2024-02-26 09:08:11 -05:00
de1c7daba7
libhsakmt: Move global zfb_support to globals.c
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zfb_support needs to accessed from multiple places, so move to globals.c
file
Change-Id: I40b487c26a13e7cc6fc01b671d6166e7114e02d2
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com >
[ROCm/ROCR-Runtime commit: 191caf46ac
2024-02-26 09:08:11 -05:00
131cae5b91
EXSWHTEC-262 - Introduce common utilities for atomic arithmetic operations #392
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Change-Id: I016e571d15b6b6c3a1b91a4bb4b5410e338efe49
[ROCm/hip-tests commit: 8ee015d1ef
2024-02-26 16:00:41 +05:30
8ee015d1ef
EXSWHTEC-262 - Introduce common utilities for atomic arithmetic operations #392
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Change-Id: I016e571d15b6b6c3a1b91a4bb4b5410e338efe49
2024-02-26 16:00:41 +05:30
fd2598f19e
EXSWHTEC-296 - Implement negative compile tests for builtin atomic operations #391
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Change-Id: I9f77a777e23a5dcc304bb5d7a996ca140c6e7814
[ROCm/hip-tests commit: 488e620fdb
2024-02-26 15:59:51 +05:30
488e620fdb
EXSWHTEC-296 - Implement negative compile tests for builtin atomic operations #391
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Change-Id: I9f77a777e23a5dcc304bb5d7a996ca140c6e7814
2024-02-26 15:59:51 +05:30
36794fc54d
EXSWHTEC-297 - Implement memory ordering tests for builtin atomic operations #390
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Change-Id: I9ed4ff6ec1e7b8aecc2e1c3ba5883c73901ba2e2
[ROCm/hip-tests commit: ea53809db1
2024-02-26 15:57:36 +05:30
ea53809db1
EXSWHTEC-297 - Implement memory ordering tests for builtin atomic operations #390
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Change-Id: I9ed4ff6ec1e7b8aecc2e1c3ba5883c73901ba2e2
2024-02-26 15:57:36 +05:30
d312d96a6c
EXSWHTEC-297 - Introduce common utilities for memory ordering tests for builtin atomic operations #389
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Change-Id: Iae1db918eab6a722c85ff00183c973dd8dd54e9b
[ROCm/hip-tests commit: d6dd4fd05b
2024-02-26 15:56:10 +05:30
d6dd4fd05b
EXSWHTEC-297 - Introduce common utilities for memory ordering tests for builtin atomic operations #389
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Change-Id: Iae1db918eab6a722c85ff00183c973dd8dd54e9b
2024-02-26 15:56:10 +05:30
ca5e764189
EXSWHTEC-320 - Implement tests for cubemap texture device functions #369
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Change-Id: I1a247dba4e46ed7e1045dee0467d3fdac1f70cd0
[ROCm/hip-tests commit: 6eec9aa90d
2024-02-26 15:55:32 +05:30
6eec9aa90d
EXSWHTEC-320 - Implement tests for cubemap texture device functions #369
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Change-Id: I1a247dba4e46ed7e1045dee0467d3fdac1f70cd0
2024-02-26 15:55:32 +05:30
8d0525beab
EXSWHTEC-319 - Implement tests for 3D texture device functions #368
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Change-Id: Ifc7a6feae1a9567df29d35928d8c4328497bfc97
[ROCm/hip-tests commit: 5fe762ae5d
2024-02-26 15:55:04 +05:30
5fe762ae5d
EXSWHTEC-319 - Implement tests for 3D texture device functions #368
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Change-Id: Ifc7a6feae1a9567df29d35928d8c4328497bfc97
2024-02-26 15:55:04 +05:30
3e12244067
EXSWHTEC-318 - Implement tests for 2D texture device functions #367
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Change-Id: I5404eae219d23dc058aa6ef150a0764b06ab6de1
[ROCm/hip-tests commit: 37d8529a9b
2024-02-26 15:54:33 +05:30
37d8529a9b
EXSWHTEC-318 - Implement tests for 2D texture device functions #367
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Change-Id: I5404eae219d23dc058aa6ef150a0764b06ab6de1
2024-02-26 15:54:33 +05:30
06a23c79b1
EXSWHTEC-317 - Implement tests for 1D texture device functions #366
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Change-Id: Iafefada132fb94a1b120d91915e24524e7d766d0
[ROCm/hip-tests commit: da67d77a0c
2024-02-26 15:53:06 +05:30
da67d77a0c
EXSWHTEC-317 - Implement tests for 1D texture device functions #366
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Change-Id: Iafefada132fb94a1b120d91915e24524e7d766d0
2024-02-26 15:53:06 +05:30
2520691374
EXSWHTEC-314 - Implement unit tests for short vector types #297
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Change-Id: I609548b79ae45530b0e82c532f93cf1f411343e4
[ROCm/hip-tests commit: 536c20b62d
2024-02-26 12:44:06 +05:30
536c20b62d
EXSWHTEC-314 - Implement unit tests for short vector types #297
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Change-Id: I609548b79ae45530b0e82c532f93cf1f411343e4
2024-02-26 12:44:06 +05:30
50d8ff1dc9
EXSWHTEC-296 - Implement negative RTC tests for builtin atomic operations #291
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Change-Id: I240e606ea2b112837301ec7afe2f6501b47071ef
[ROCm/hip-tests commit: 8f112a639a
2024-02-26 12:43:38 +05:30
8f112a639a
EXSWHTEC-296 - Implement negative RTC tests for builtin atomic operations #291
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Change-Id: I240e606ea2b112837301ec7afe2f6501b47071ef
2024-02-26 12:43:38 +05:30
Jose Santos
Charis Poag
Harish Kasiviswanathan
Shweta Khatri
Karl W Schulz
Mirza Halilčević
Nives Vukovic
Milos Mozetic