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ROCm CI Service Account 1e17fc7df7 SWDEV-376488 - Avoid stripping of executables in deviceLib (#118)
Avoids packaging failure

Change-Id: I5941feb6e000664fd4afab2d430d865c21b90d72

[ROCm/hip-tests commit: f47b66b976]
2023-01-13 14:02:20 +05:30
ROCm CI Service Account f47b66b976 SWDEV-376488 - Avoid stripping of executables in deviceLib (#118)
Avoids packaging failure

Change-Id: I5941feb6e000664fd4afab2d430d865c21b90d72
2023-01-13 14:02:20 +05:30
Chauncey Hui 5fd3eb836c SWDEV-2 - Change OpenCL version number from 3553 to 3554
[ROCm/clr commit: 8a973ee882]
2023-01-13 03:00:09 -05:00
Chauncey Hui 8a973ee882 SWDEV-2 - Change OpenCL version number from 3553 to 3554 2023-01-13 03:00:09 -05:00
Satyanvesh Dittakavi 6035b0e214 SWDEV-376386 - Support __hip_move_dpp with hipRTC
Change-Id: If9a6fe23d6df143a7f522823fca7183416048c6a


[ROCm/clr commit: c193503722]
2023-01-13 00:05:31 -05:00
Satyanvesh Dittakavi c193503722 SWDEV-376386 - Support __hip_move_dpp with hipRTC
Change-Id: If9a6fe23d6df143a7f522823fca7183416048c6a
2023-01-13 00:05:31 -05:00
Anusha GodavarthySurya 57d351bed6 SWDEV-364576 - use hipLimitMallocHeapSize to set initial heap buffer size
Change-Id: I2f1d3b229bc28571ce6c55f93f8ef73dda516b50


[ROCm/clr commit: 33eef6d95e]
2023-01-12 23:34:29 -05:00
Anusha GodavarthySurya 33eef6d95e SWDEV-364576 - use hipLimitMallocHeapSize to set initial heap buffer size
Change-Id: I2f1d3b229bc28571ce6c55f93f8ef73dda516b50
2023-01-12 23:34:29 -05:00
Anusha GodavarthySurya e8c8fd8c3f SWDEV-374778 - Select SDMA path when HSA_XNACK is enabled
Change-Id: I052675186238eb24b910a0a558d6b8ede36d1413


[ROCm/clr commit: 710749c291]
2023-01-12 23:34:21 -05:00
Anusha GodavarthySurya 710749c291 SWDEV-374778 - Select SDMA path when HSA_XNACK is enabled
Change-Id: I052675186238eb24b910a0a558d6b8ede36d1413
2023-01-12 23:34:21 -05:00
Matt Arsenault 1de57c06b3 SWDEV-1 - Directly call __builtin_amdgcn_fence
The device libraries provide hip.bc, which only contains
__atomic_work_item_fence. This is identical to OpenCL's
atomic_work_item_fence, except prefixed with __. This only existed to
switch over the unknown values the OpenCL function provides. There's
no need to go through the wrapper here since it's using constant
values, and without it we can drop one of the bitcode libraries. I'm
guessing this was a holdover from before the fence builtin existed.

Change-Id: I8b04614f96194eafddeba295215c12c3856e6c42


[ROCm/clr commit: 3e54bad5b3]
2023-01-12 12:04:09 -05:00
Matt Arsenault 3e54bad5b3 SWDEV-1 - Directly call __builtin_amdgcn_fence
The device libraries provide hip.bc, which only contains
__atomic_work_item_fence. This is identical to OpenCL's
atomic_work_item_fence, except prefixed with __. This only existed to
switch over the unknown values the OpenCL function provides. There's
no need to go through the wrapper here since it's using constant
values, and without it we can drop one of the bitcode libraries. I'm
guessing this was a holdover from before the fence builtin existed.

Change-Id: I8b04614f96194eafddeba295215c12c3856e6c42
2023-01-12 12:04:09 -05:00
Matt Arsenault ac1201f598 SWDEV-1 - Remove unused intrinsic declaration
The uses have moved to using the proper __builtin_amdgcn_ds_swizzle.

Change-Id: I82159ebf41fb91ac6a9d07b33311e569dce5e754


[ROCm/clr commit: 91b851fad7]
2023-01-12 12:04:09 -05:00
Matt Arsenault 91b851fad7 SWDEV-1 - Remove unused intrinsic declaration
The uses have moved to using the proper __builtin_amdgcn_ds_swizzle.

Change-Id: I82159ebf41fb91ac6a9d07b33311e569dce5e754
2023-01-12 12:04:09 -05:00
Alexander Turek f7e3782b42 isa: Add fix for hsa_isa_iterate_wavefronts always returns 64
Currently, Wavefront::GetInfo(HSA_WAVEFRONT_INFO_SIZE.. always returns
64. Instead, return the proper wavefront size based on the ISA.

Temporarily, we only return 1 wavefront size for each ISA. As we do not
have mechanism from upper layers to determine correct wavefront when
there are multiple wavefronts supported. We are temporarily
returning 32 for all gfx1xxx cards even though they support 64 as the
kernels for gfx1xxx are compiled for wavefront-32 by default.

Change-Id: Ic6c2917b7e6d3704daf742d243f5ec7f49430de9
2023-01-12 08:40:07 -05:00
Alexander Turek e907b85904 isa: Add fix for hsa_isa_iterate_wavefronts always returns 64
Currently, Wavefront::GetInfo(HSA_WAVEFRONT_INFO_SIZE.. always returns
64. Instead, return the proper wavefront size based on the ISA.

Temporarily, we only return 1 wavefront size for each ISA. As we do not
have mechanism from upper layers to determine correct wavefront when
there are multiple wavefronts supported. We are temporarily
returning 32 for all gfx1xxx cards even though they support 64 as the
kernels for gfx1xxx are compiled for wavefront-32 by default.

Change-Id: Ic6c2917b7e6d3704daf742d243f5ec7f49430de9


[ROCm/ROCR-Runtime commit: f7e3782b42]
2023-01-12 08:40:07 -05:00
Ioannis Assiouras ab81da6544 SWDEV-374401 - Surface the ammount of used constant memory by kernel
Change-Id: I6de0e46482f27b9068582fdaee0e562f9f71f9f0


[ROCm/clr commit: 4d49204fb9]
2023-01-12 05:22:37 -05:00
Ioannis Assiouras 4d49204fb9 SWDEV-374401 - Surface the ammount of used constant memory by kernel
Change-Id: I6de0e46482f27b9068582fdaee0e562f9f71f9f0
2023-01-12 05:22:37 -05:00
Ioannis Assiouras dc62bdd371 SWDEV-374405 - Added OpenGL interoperability APIs for nvidia
Change-Id: I1d6ad5c610ab6ee805bd07dacea316b3242ed129


[ROCm/hipother commit: 9c531b6a67]
2023-01-12 05:22:14 -05:00
Ioannis Assiouras 9c531b6a67 SWDEV-374405 - Added OpenGL interoperability APIs for nvidia
Change-Id: I1d6ad5c610ab6ee805bd07dacea316b3242ed129
2023-01-12 05:22:14 -05:00
Ioannis Assiouras bfa0b9f844 SWDEV-374405 - Added OpenGL interoperability APIs for nvidia
Change-Id: I1d6ad5c610ab6ee805bd07dacea316b3242ed129


[ROCm/clr commit: e97dcfbe48]
2023-01-12 05:22:14 -05:00
Ioannis Assiouras e97dcfbe48 SWDEV-374405 - Added OpenGL interoperability APIs for nvidia
Change-Id: I1d6ad5c610ab6ee805bd07dacea316b3242ed129
2023-01-12 05:22:14 -05:00
Saleel Kudchadker f903a6c2c9 SWDEV-371123 - Fix barrier value packet header
- Use correct header for vendor packet
- Pass one dependent signal when submitting a marker if there is one

Change-Id: I4efc70dd5204b559de26f899d0637f50421c8834


[ROCm/clr commit: 77ceb7e9ad]
2023-01-12 04:06:03 -05:00
Saleel Kudchadker 77ceb7e9ad SWDEV-371123 - Fix barrier value packet header
- Use correct header for vendor packet
- Pass one dependent signal when submitting a marker if there is one

Change-Id: I4efc70dd5204b559de26f899d0637f50421c8834
2023-01-12 04:06:03 -05:00
Chauncey Hui 8a163fef1b SWDEV-2 - Change OpenCL version number from 3552 to 3553
[ROCm/clr commit: 6b4577c8d7]
2023-01-12 03:00:09 -05:00
Chauncey Hui 6b4577c8d7 SWDEV-2 - Change OpenCL version number from 3552 to 3553 2023-01-12 03:00:09 -05:00
Galantsev, Dmitrii fc097d44ff SWDEV-376779 - Fix linking for rdctst
Ieb198ad96e26e89b09cb85986214a5b1451b17a6 broke linking
for rdctst and rdcd by removing "../lib/rdc" path.
This change adds it back and makes the paths more visible.

- Link librdc_ras and librdc_rocp to rdctst
- Add longer RUNPATH for rdctst to link rdc libraries

Change-Id: Id4f128c217a6de8bb67df6750ecafdb96545811b
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2023-01-11 19:40:59 -05:00
Galantsev, Dmitrii 4091faf4f4 SWDEV-376779 - Fix linking for rdctst
Ieb198ad96e26e89b09cb85986214a5b1451b17a6 broke linking
for rdctst and rdcd by removing "../lib/rdc" path.
This change adds it back and makes the paths more visible.

- Link librdc_ras and librdc_rocp to rdctst
- Add longer RUNPATH for rdctst to link rdc libraries

Change-Id: Id4f128c217a6de8bb67df6750ecafdb96545811b
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rdc commit: fc097d44ff]
2023-01-11 19:40:59 -05:00
Jenkins 27d2764a66 Merge 'develop' into 'amd-staging'
Change-Id: I1db8477632ddecdbdb9a963c7fec6a72308bed03


[ROCm/hip-tests commit: 682ad05404]
2023-01-12 00:09:59 +00:00
Jenkins 682ad05404 Merge 'develop' into 'amd-staging'
Change-Id: I1db8477632ddecdbdb9a963c7fec6a72308bed03
2023-01-12 00:09:59 +00:00
colramos425 33c907268b Comply to Python formatting
Signed-off-by: colramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 7af97fc84e]
2023-01-11 17:29:14 -06:00
colramos425 7af97fc84e Comply to Python formatting
Signed-off-by: colramos425 <colramos@amd.com>
2023-01-11 17:29:14 -06:00
colramos425 13386fe279 Build chart for L2 Cache per channel in GUI
Signed-off-by: colramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 6f6c07b34f]
2023-01-11 17:28:23 -06:00
colramos425 6f6c07b34f Build chart for L2 Cache per channel in GUI
Signed-off-by: colramos425 <colramos@amd.com>
2023-01-11 17:28:23 -06:00
colramos425 ee7c76cc7f Tweak L2 Cache per channel config for graphic
Signed-off-by: colramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: f167ff3658]
2023-01-11 17:26:43 -06:00
colramos425 f167ff3658 Tweak L2 Cache per channel config for graphic
Signed-off-by: colramos425 <colramos@amd.com>
2023-01-11 17:26:43 -06:00
jatang 1f5f1c8708 SWDEV-287018 - Only generate _optimized.bc when both requiredDump and DUMP_BC_LINKED are true
The current code generates a _optimized.bc regardlessly, so put back the original logic.

Change-Id: I3f84d10934b3e983f5f828af8d0943449a6e1d94


[ROCm/clr commit: 6647882773]
2023-01-11 17:51:35 -05:00
jatang 6647882773 SWDEV-287018 - Only generate _optimized.bc when both requiredDump and DUMP_BC_LINKED are true
The current code generates a _optimized.bc regardlessly, so put back the original logic.

Change-Id: I3f84d10934b3e983f5f828af8d0943449a6e1d94
2023-01-11 17:51:35 -05:00
David Belanger b25867c4b8 libhsakmt: Disabled allocation of CWSR with SVM for GFX11.
This is a temporary work around for GPU hang issues observed on GFX11.

Change-Id: I98fbedbbd1c51fe402c2116b35ca548931a390c9
Signed-off-by: David Belanger <david.belanger@amd.com>
2023-01-11 17:28:31 -05:00
David Belanger 1ba59d64e1 libhsakmt: Disabled allocation of CWSR with SVM for GFX11.
This is a temporary work around for GPU hang issues observed on GFX11.

Change-Id: I98fbedbbd1c51fe402c2116b35ca548931a390c9
Signed-off-by: David Belanger <david.belanger@amd.com>


[ROCm/ROCR-Runtime commit: b25867c4b8]
2023-01-11 17:28:31 -05:00
Shweta Khatri ed0a1be2c3 Enforce uncached memory on AllocatePCIeRW request
Change-Id: Ib5a624ab979220d50205448ef37b4550672fb97d
2023-01-11 16:52:15 -05:00
Shweta Khatri 36da397f96 Enforce uncached memory on AllocatePCIeRW request
Change-Id: Ib5a624ab979220d50205448ef37b4550672fb97d


[ROCm/ROCR-Runtime commit: ed0a1be2c3]
2023-01-11 16:52:15 -05:00
ROCm CI Service Account 4f18c1fc48 SWDEV-357759 - [catch2][dtest] Adding additional functional tests for hipStreamIsCapturing() API (#113)
Change-Id: I5629152cb7b14965dafc2383e47fdc66d805283c


[ROCm/hip-tests commit: 7f440c468c]
2023-01-11 12:05:37 -08:00
ROCm CI Service Account 7f440c468c SWDEV-357759 - [catch2][dtest] Adding additional functional tests for hipStreamIsCapturing() API (#113)
Change-Id: I5629152cb7b14965dafc2383e47fdc66d805283c
2023-01-11 12:05:37 -08:00
Saurabh Verma 225bddf148 Adding missing MI200 metrics
Change-Id: I410f50e03d38bb03cf43e743318eb1242e7d6518
2023-01-11 18:00:46 +00:00
Saurabh Verma 6dc0459613 Adding missing MI200 metrics
Change-Id: I410f50e03d38bb03cf43e743318eb1242e7d6518


[ROCm/rocprofiler commit: 225bddf148]
2023-01-11 18:00:46 +00:00
Jaydeep Patel d12bfbbb4d SWDEV-374383 - Check from and to if no of dependencies are more than 0, Check from and to node are belongs to graph pass in.
Change-Id: I0cdafb497147f9ac7f84d40203a21e9eefd595a3


[ROCm/clr commit: bb486b04c6]
2023-01-11 11:43:22 -05:00
Jaydeep Patel bb486b04c6 SWDEV-374383 - Check from and to if no of dependencies are more than 0, Check from and to node are belongs to graph pass in.
Change-Id: I0cdafb497147f9ac7f84d40203a21e9eefd595a3
2023-01-11 11:43:22 -05:00
ROCm CI Service Account a347fa3020 SWDEV-357759 - [catch2][dtest] Adding additional functional tests for hipStreamGetCaptureInfo and hipStreamGetCaptureInfo_v2 APIs (#114)
Change-Id: I304c973330dc5682541c69c89eded418b3d30fd5


[ROCm/hip-tests commit: 461852afcf]
2023-01-10 15:49:05 -08:00
ROCm CI Service Account 461852afcf SWDEV-357759 - [catch2][dtest] Adding additional functional tests for hipStreamGetCaptureInfo and hipStreamGetCaptureInfo_v2 APIs (#114)
Change-Id: I304c973330dc5682541c69c89eded418b3d30fd5
2023-01-10 15:49:05 -08:00