Commit Graph
64512 Commits
Author SHA1 Message Date
Jaydeep Patel 3a7351ef9c SWDEV-330666 - null(default) stream's priority is 0.
Change-Id: I115effc2ddaa28dee32967ee28041b9b8da095b9


[ROCm/clr commit: c1503da69b]
2022-04-13 00:28:52 -04:00
Jaydeep Patel c1503da69b SWDEV-330666 - null(default) stream's priority is 0.
Change-Id: I115effc2ddaa28dee32967ee28041b9b8da095b9
2022-04-13 00:28:52 -04:00
Sourabh Betigeri 89ca29819e SWDEV-329848 - Fixes error code mismatch between CUDA and HIP
Change-Id: Ic48de159ca7bdb4b91dadb915972e535518635ae


[ROCm/clr commit: 345e02358c]
2022-04-12 15:00:44 -04:00
Sourabh Betigeri 345e02358c SWDEV-329848 - Fixes error code mismatch between CUDA and HIP
Change-Id: Ic48de159ca7bdb4b91dadb915972e535518635ae
2022-04-12 15:00:44 -04:00
Saleel Kudchadker 3d0100c5ab SWDEV-301667 - Add cache state for a device
- Add a global cache state for a device to indicate scopes of submitted
AQL packets
- Remove scopes for TS marker if hipEventReleaseToDevice is passed. Set
env ROC_EVENT_NO_FLUSH=1 to use NOP AQL for event records.
It would flush caches by default with system scope release.
- Calling finish() should ensure if caches are flushed, if not queue a
marker

Change-Id: Ibbbdbb1cd7ac61cb35649169212142545be159e0


[ROCm/clr commit: 8eeaa998c0]
2022-04-12 12:27:31 -04:00
Saleel Kudchadker 8eeaa998c0 SWDEV-301667 - Add cache state for a device
- Add a global cache state for a device to indicate scopes of submitted
AQL packets
- Remove scopes for TS marker if hipEventReleaseToDevice is passed. Set
env ROC_EVENT_NO_FLUSH=1 to use NOP AQL for event records.
It would flush caches by default with system scope release.
- Calling finish() should ensure if caches are flushed, if not queue a
marker

Change-Id: Ibbbdbb1cd7ac61cb35649169212142545be159e0
2022-04-12 12:27:31 -04:00
Hao Yuan abc4522fa3 Merge "SWDEV-328274 - Move DLLMain from VDI layer to HIP/OCL layers" into amd-staging
[ROCm/clr commit: 4d300d1f8a]
2022-04-12 11:00:51 -04:00
Hao Yuan 4d300d1f8a Merge "SWDEV-328274 - Move DLLMain from VDI layer to HIP/OCL layers" into amd-staging 2022-04-12 11:00:51 -04:00
haoyuan2 0d4efc9f0f SWDEV-328274 - Move DLLMain from VDI layer to HIP/OCL layers
Change-Id: Ibd3388f0981672cd209d7370f8a28b2883abdea2


[ROCm/clr commit: cb4aabd285]
2022-04-12 11:00:20 -04:00
haoyuan2 cb4aabd285 SWDEV-328274 - Move DLLMain from VDI layer to HIP/OCL layers
Change-Id: Ibd3388f0981672cd209d7370f8a28b2883abdea2
2022-04-12 11:00:20 -04:00
Bill(Shuzhou) Liu 54b4ad12df Suppress "rsmi_init() failed" error message
When an application call the library in a system without amdgpu,
it may always print out "rsmi_init() failed". Suppress the error
message in the library.

Change-Id: Ice63dd3a764b221a6935536bff1bfa6aa3e51a46


[ROCm/rocm_smi_lib commit: 7860de5107]
2022-04-12 09:44:00 -04:00
Bill(Shuzhou) Liu 7860de5107 Suppress "rsmi_init() failed" error message
When an application call the library in a system without amdgpu,
it may always print out "rsmi_init() failed". Suppress the error
message in the library.

Change-Id: Ice63dd3a764b221a6935536bff1bfa6aa3e51a46
2022-04-12 09:44:00 -04:00
Jeremy Newton a0931f4a3c Only default IMAGE_SUPPORT=ON for x86
Image support does not compile on other archectures, since it relies on
the x86 only header "x86intrin.h".

Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
Change-Id: I120d15870e74e20bd618e6f5da8c05e28fb1203b
2022-04-12 09:24:45 -04:00
Jeremy Newton 3d0b0fd774 Only default IMAGE_SUPPORT=ON for x86
Image support does not compile on other archectures, since it relies on
the x86 only header "x86intrin.h".

Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
Change-Id: I120d15870e74e20bd618e6f5da8c05e28fb1203b


[ROCm/ROCR-Runtime commit: a0931f4a3c]
2022-04-12 09:24:45 -04:00
Konstantin Zhuravlyov 9265409f08 Add code object v5 support
Change-Id: I03522765056e99ed49e6c5e213ee3753852de27b
2022-04-12 08:53:27 -04:00
Konstantin Zhuravlyov 625b1c99b3 Add code object v5 support
Change-Id: I03522765056e99ed49e6c5e213ee3753852de27b


[ROCm/ROCR-Runtime commit: 9265409f08]
2022-04-12 08:53:27 -04:00
Chauncey Hui cb7802bc8a SWDEV-2 - Change OpenCL version number from 3445 to 3446
[ROCm/clr commit: 857634241b]
2022-04-12 03:00:05 -04:00
Chauncey Hui 857634241b SWDEV-2 - Change OpenCL version number from 3445 to 3446 2022-04-12 03:00:05 -04:00
Jonathan R. Madsen 317240ca1c Setup and Nomenclature pages [skip ci] (#40)
[ROCm/rocprofiler-systems commit: e24c24dc56]
2022-04-12 00:49:55 -05:00
Jonathan R. Madsen e24c24dc56 Setup and Nomenclature pages [skip ci] (#40) 2022-04-12 00:49:55 -05:00
Sarbojit Sarkar 85f6f2a0c7 SWDEV-331126 - Fix to Cuda return type
Change-Id: Iea8e7735ef0c58c1244c92338038d91e61d62c16


[ROCm/clr commit: 8657c40721]
2022-04-11 23:35:04 -04:00
Sarbojit Sarkar 8657c40721 SWDEV-331126 - Fix to Cuda return type
Change-Id: Iea8e7735ef0c58c1244c92338038d91e61d62c16
2022-04-11 23:35:04 -04:00
Sean Keely b3caf6782b Revert "Release host buffers after segment freeze."
This reverts commit 03a52655a8.

Change-Id: Idc7e568b2b54a226dbe4d189b25a78be3bd16eea
2022-04-11 20:43:07 -05:00
Sean Keely 6622fe0163 Revert "Release host buffers after segment freeze."
This reverts commit cf3f441625.

Change-Id: Idc7e568b2b54a226dbe4d189b25a78be3bd16eea


[ROCm/ROCR-Runtime commit: b3caf6782b]
2022-04-11 20:43:07 -05:00
Jenkins 5d04350541 SWDEV-299127 - Merge 'develop' into 'amd-staging'
Change-Id: I7d3700cc417090f7327441ffd541750df69bcb49


[ROCm/hip commit: 3e5668cc12]
2022-04-11 19:11:10 -04:00
Jenkins 3e5668cc12 SWDEV-299127 - Merge 'develop' into 'amd-staging'
Change-Id: I7d3700cc417090f7327441ffd541750df69bcb49
2022-04-11 19:11:10 -04:00
haoyuan2 be69f68ec7 SWDEV-328274 - Move DLLMain from VDI layer to HIP/OCL layers
Change-Id: Idc84eb0db92d21a5ced8769fa1eae064b86c31b0


[ROCm/clr commit: 1fbc01a812]
2022-04-11 16:55:59 -04:00
haoyuan2 1fbc01a812 SWDEV-328274 - Move DLLMain from VDI layer to HIP/OCL layers
Change-Id: Idc84eb0db92d21a5ced8769fa1eae064b86c31b0
2022-04-11 16:55:59 -04:00
ROCm CI Service Account c516229ee0 SWDEV-319734 - complete printf test cases for HIP on windows (#2527)
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I2b3a1dec9c2d2bb6cc71eaa5a26b88473a827c14


[ROCm/hip commit: 9b8e911328]
2022-04-11 11:38:37 -07:00
ROCm CI Service Account 9b8e911328 SWDEV-319734 - complete printf test cases for HIP on windows (#2527)
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I2b3a1dec9c2d2bb6cc71eaa5a26b88473a827c14
2022-04-11 11:38:37 -07:00
Maxime Chambonnet 38928e85c1 SWDEV-1 - ROC CLR typos
This is cherry-picked from this github issue:
https://github.com/ROCm-Developer-Tools/ROCclr/issues/28

Change-Id: I236f4f25a2dabe05883159af0fab0bad06ab0fd0


[ROCm/clr commit: d45794e985]
2022-04-11 14:24:39 -04:00
Maxime Chambonnet d45794e985 SWDEV-1 - ROC CLR typos
This is cherry-picked from this github issue:
https://github.com/ROCm-Developer-Tools/ROCclr/issues/28

Change-Id: I236f4f25a2dabe05883159af0fab0bad06ab0fd0
2022-04-11 14:24:39 -04:00
ROCm CI Service Account 3f4e986051 SWDEV-327563 - Windows: enable graph and memory build in catch2 (#2622)
Skip failing graph tests to ensure 100% pass percentage

Change-Id: I92e2f5daf32387d746097d2406b7ca991e1e1698


[ROCm/hip-tests commit: bf99af9106]
2022-04-11 10:48:12 -07:00
ROCm CI Service Account bf99af9106 SWDEV-327563 - Windows: enable graph and memory build in catch2 (#2622)
Skip failing graph tests to ensure 100% pass percentage

Change-Id: I92e2f5daf32387d746097d2406b7ca991e1e1698
2022-04-11 10:48:12 -07:00
ROCm CI Service Account 3780c6f47e SWDEV-327563 - Windows: enable graph and memory build in catch2 (#2622)
Skip failing graph tests to ensure 100% pass percentage

Change-Id: I92e2f5daf32387d746097d2406b7ca991e1e1698


[ROCm/hip commit: 4e60664be1]
2022-04-11 10:48:12 -07:00
ROCm CI Service Account 4e60664be1 SWDEV-327563 - Windows: enable graph and memory build in catch2 (#2622)
Skip failing graph tests to ensure 100% pass percentage

Change-Id: I92e2f5daf32387d746097d2406b7ca991e1e1698
2022-04-11 10:48:12 -07:00
German Andryeyev 3f93be3aec SWDEV-307184 - Hidden heap keyword was renamed
Change-Id: I0a72b0cc16bd3d637cbaa79a692640bc922f62c4


[ROCm/clr commit: abf088ea89]
2022-04-11 09:26:14 -04:00
German Andryeyev abf088ea89 SWDEV-307184 - Hidden heap keyword was renamed
Change-Id: I0a72b0cc16bd3d637cbaa79a692640bc922f62c4
2022-04-11 09:26:14 -04:00
Ajay 013225775c SWDEV-331095 - Address hipRTC windows test failures
Change-Id: I8c1a36ffd362c6f41449092e4dd85f6ec587206a


[ROCm/clr commit: f301bf3962]
2022-04-11 09:40:35 +00:00
Ajay f301bf3962 SWDEV-331095 - Address hipRTC windows test failures
Change-Id: I8c1a36ffd362c6f41449092e4dd85f6ec587206a
2022-04-11 09:40:35 +00:00
Chauncey Hui ac9195f34a SWDEV-2 - Change OpenCL version number from 3444 to 3445
[ROCm/clr commit: 66d404f707]
2022-04-09 03:00:05 -04:00
Chauncey Hui 66d404f707 SWDEV-2 - Change OpenCL version number from 3444 to 3445 2022-04-09 03:00:05 -04:00
haoyuan2 605958392b SWDEV-328274 - Move DLLMain from VDI layer to HIP/OCL layers
Change-Id: I89db993ba90783c53546c5290c00e13f5c24edf4


[ROCm/clr commit: fe173ed9fb]
2022-04-08 12:12:07 -07:00
haoyuan2 fe173ed9fb SWDEV-328274 - Move DLLMain from VDI layer to HIP/OCL layers
Change-Id: I89db993ba90783c53546c5290c00e13f5c24edf4
2022-04-08 12:12:07 -07:00
Jeremy Newton 6e388071ba SWDEV-321118 - Use GNUInstallDirs
Use GNUInstallDirs variables to determine the location of BINDIR,
LIBDIR, DOCDIR, and SYSCONFDIR.

Note that CMAKE_INSTALL_LIBDIR is overriden, since the default for RHEL
is lib64, but ROCm packaging wants it to be lib always. Distros or users
can easily override this.

Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
Change-Id: Ifb38263dce80d80c5ebb4eacd8e49c76bb013a44


[ROCm/clr commit: b8c124acb5]
2022-04-08 13:52:08 -04:00
Jeremy Newton b8c124acb5 SWDEV-321118 - Use GNUInstallDirs
Use GNUInstallDirs variables to determine the location of BINDIR,
LIBDIR, DOCDIR, and SYSCONFDIR.

Note that CMAKE_INSTALL_LIBDIR is overriden, since the default for RHEL
is lib64, but ROCm packaging wants it to be lib always. Distros or users
can easily override this.

Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
Change-Id: Ifb38263dce80d80c5ebb4eacd8e49c76bb013a44
2022-04-08 13:52:08 -04:00
German Andryeyev 4715a87d44 SWDEV-307184 - Report 1 for unused dimensions
Remove assert for kernel arg size, because COv5 reports a value
bigger than the actual usage in the most of cases

Change-Id: I8e15bc45a9e21b58a5894f9977511ca84408ce61


[ROCm/clr commit: 2be0b1e612]
2022-04-08 13:43:37 -04:00
German Andryeyev 2be0b1e612 SWDEV-307184 - Report 1 for unused dimensions
Remove assert for kernel arg size, because COv5 reports a value
bigger than the actual usage in the most of cases

Change-Id: I8e15bc45a9e21b58a5894f9977511ca84408ce61
2022-04-08 13:43:37 -04:00
Jeremy Newton 2e2f21df24 SWDEV-323669 - Improve arch detection
- Clean up detection by using visual studio macros to detect arch; I
  didn't list all possible ARM platforms (can be done later if desired)
- Fixed two incorrect uses of !defined(ATI_ARCH_ARM) to instead use
  defined(ATI_ARCH_X86), as they contain X86 specific code
- Fixed one use of __ARM_ARCH_7A__ to use ATI_ARCH_ARM instead

This is an improvement to the fixes in the last patch for SWDEV-323669

Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
Change-Id: I8568167293c34ad5331902105877f3ab6e25acb3


[ROCm/clr commit: 00efdc1cd6]
2022-04-08 12:21:58 -04:00
Jeremy Newton 00efdc1cd6 SWDEV-323669 - Improve arch detection
- Clean up detection by using visual studio macros to detect arch; I
  didn't list all possible ARM platforms (can be done later if desired)
- Fixed two incorrect uses of !defined(ATI_ARCH_ARM) to instead use
  defined(ATI_ARCH_X86), as they contain X86 specific code
- Fixed one use of __ARM_ARCH_7A__ to use ATI_ARCH_ARM instead

This is an improvement to the fixes in the last patch for SWDEV-323669

Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
Change-Id: I8568167293c34ad5331902105877f3ab6e25acb3
2022-04-08 12:21:58 -04:00