Commit Graph
64512 Commits
Author SHA1 Message Date
Chauncey Hui 421d659e35 SWDEV-2 - Change OpenCL version number from 3403 to 3404
[ROCm/clr commit: 587cda0c91]
2021-12-08 03:00:05 -05:00
Chauncey Hui 587cda0c91 SWDEV-2 - Change OpenCL version number from 3403 to 3404 2021-12-08 03:00:05 -05:00
Julia Jiang 41eef3076e SWDEV-308644 - reorganize extra blit kernel in PAL stack
Change-Id: I9d853e8d417ef75b522184d83646ec4b9fa8669b


[ROCm/clr commit: 376ea1e293]
2021-12-07 14:55:20 -05:00
Julia Jiang 376ea1e293 SWDEV-308644 - reorganize extra blit kernel in PAL stack
Change-Id: I9d853e8d417ef75b522184d83646ec4b9fa8669b
2021-12-07 14:55:20 -05:00
Satyanvesh Dittakavi a8fde39f74 SWDEV-311744 - Update floating point max/min atomic implementation
Clang builtins doesnt yet support max/min atomics with float/double
parameters, Hence modify atomicMax/Min to use compare and swap
implementation

Change-Id: Ia351f9b136129fe25f0eddcbbb17549553247182


[ROCm/clr commit: f3c5f12d26]
2021-12-07 13:29:44 -05:00
Satyanvesh Dittakavi f3c5f12d26 SWDEV-311744 - Update floating point max/min atomic implementation
Clang builtins doesnt yet support max/min atomics with float/double
parameters, Hence modify atomicMax/Min to use compare and swap
implementation

Change-Id: Ia351f9b136129fe25f0eddcbbb17549553247182
2021-12-07 13:29:44 -05:00
Satyanvesh Dittakavi 74bd37bd34 SWDEV-309286 - Add check to limit host malloc upto system memory size
Change-Id: I4a0f55d6f7faa323b16d9b8fb12e876900da1bbc


[ROCm/clr commit: c9532093ce]
2021-12-07 12:02:29 -05:00
Satyanvesh Dittakavi c9532093ce SWDEV-309286 - Add check to limit host malloc upto system memory size
Change-Id: I4a0f55d6f7faa323b16d9b8fb12e876900da1bbc
2021-12-07 12:02:29 -05:00
Jeremy Newton 91baa9ded6 SWDEV-306293 - fix regression in cleanup
To fix SWDEV-306293, x86_64-rocm-opencl.conf was renamed to
10-rocm-opencl.conf. This was not changes in the clean up, only in the
creation, so the patch causes a regression by not cleaning up the new
filename.

Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
Change-Id: I4aa456955f6f7c2d52a3560e5e792537f95add17


[ROCm/clr commit: e885ae9591]
2021-12-07 09:59:03 -05:00
Jeremy Newton e885ae9591 SWDEV-306293 - fix regression in cleanup
To fix SWDEV-306293, x86_64-rocm-opencl.conf was renamed to
10-rocm-opencl.conf. This was not changes in the clean up, only in the
creation, so the patch causes a regression by not cleaning up the new
filename.

Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
Change-Id: I4aa456955f6f7c2d52a3560e5e792537f95add17
2021-12-07 09:59:03 -05:00
Christophe Paquot 1b87d3a497 SWDEV-307109 - Don't force Persistent for HIP
With SAM on, don't force Persistent for allocations
in HIP. This makes ROCCLR go down paths we don't want
for HIP.

Change-Id: If54cc16fa891d4cfdc761c6ab21ad707627e822a


[ROCm/clr commit: 5243552768]
2021-12-06 12:16:08 -05:00
Christophe Paquot 5243552768 SWDEV-307109 - Don't force Persistent for HIP
With SAM on, don't force Persistent for allocations
in HIP. This makes ROCCLR go down paths we don't want
for HIP.

Change-Id: If54cc16fa891d4cfdc761c6ab21ad707627e822a
2021-12-06 12:16:08 -05:00
Sarbojit Sarkar c6afc74798 SWDEV-313905 - Fix for hipLaunchCooperativeKernel crash
Change-Id: I41205171a9607962ab6b66f2ebc6f8dc9db7f158


[ROCm/clr commit: 9a51909058]
2021-12-05 23:15:06 -05:00
Sarbojit Sarkar 9a51909058 SWDEV-313905 - Fix for hipLaunchCooperativeKernel crash
Change-Id: I41205171a9607962ab6b66f2ebc6f8dc9db7f158
2021-12-05 23:15:06 -05:00
Sarbojit Sarkar cf01ea2dae SWDEV-313722 - Fix for segfault while using rocprof
Change-Id: Ia00868e058069ee73ce4a852ab2529d8f785a4b7


[ROCm/clr commit: 9a3cb1608b]
2021-12-05 23:14:26 -05:00
Sarbojit Sarkar 9a3cb1608b SWDEV-313722 - Fix for segfault while using rocprof
Change-Id: Ia00868e058069ee73ce4a852ab2529d8f785a4b7
2021-12-05 23:14:26 -05:00
Tao Sang 68c75c9fb7 SWDEV-303204 - Disable texture/image Apis on some devices
If the target device doesn't support image,
compiler will send out unavailable error if device texture apis
are called; and host texture apis will return hipErrorNotSupported.
Remove useless include/hip/amd_detail/texture_functions.h.
Add hipDeviceAttributeImageSupport attribute to check image
support in runtime.
Add __HIP_NO_IMAGE_SUPPORT(=1) macro in device code to indicate
texture apis not supported.
Change-Id: Ia891493e681a61980a2444859a90e046a9ebea39


[ROCm/clr commit: 5acc8b5102]
2021-12-04 08:14:08 -05:00
Tao Sang 5acc8b5102 SWDEV-303204 - Disable texture/image Apis on some devices
If the target device doesn't support image,
compiler will send out unavailable error if device texture apis
are called; and host texture apis will return hipErrorNotSupported.
Remove useless include/hip/amd_detail/texture_functions.h.
Add hipDeviceAttributeImageSupport attribute to check image
support in runtime.
Add __HIP_NO_IMAGE_SUPPORT(=1) macro in device code to indicate
texture apis not supported.
Change-Id: Ia891493e681a61980a2444859a90e046a9ebea39
2021-12-04 08:14:08 -05:00
haoyuan2 5344fabb49 SWDEV-309292 - add hipPos definition in CUDA path
Change-Id: Ia81d5db77d7403cafb583fda8083d0f4dbe33835


[ROCm/hipother commit: 5a4305c05a]
2021-12-04 04:40:34 -05:00
haoyuan2 5a4305c05a SWDEV-309292 - add hipPos definition in CUDA path
Change-Id: Ia81d5db77d7403cafb583fda8083d0f4dbe33835
2021-12-04 04:40:34 -05:00
haoyuan2 6c68d56c17 SWDEV-309292 - add hipPos definition in CUDA path
Change-Id: Ia81d5db77d7403cafb583fda8083d0f4dbe33835


[ROCm/clr commit: 69117705c8]
2021-12-04 04:40:34 -05:00
haoyuan2 69117705c8 SWDEV-309292 - add hipPos definition in CUDA path
Change-Id: Ia81d5db77d7403cafb583fda8083d0f4dbe33835
2021-12-04 04:40:34 -05:00
haoyuan2 9cec2dcc94 SWDEV-311856 - check if the function pointer is valid
Change-Id: Iaa5bd7f8321434ce63d0bcf2791d3c65577b453d


[ROCm/clr commit: 1101cfedf5]
2021-12-04 04:40:09 -05:00
haoyuan2 1101cfedf5 SWDEV-311856 - check if the function pointer is valid
Change-Id: Iaa5bd7f8321434ce63d0bcf2791d3c65577b453d
2021-12-04 04:40:09 -05:00
Joseph Greathouse a06d1a3884 Correct gfx90c gfx arch number in HSA topology
The AMD compiler team has confirmed that they expect gfx90c
to be gfx90c, with a major/minor/stepping of 9, 0, and 12
respectively. It appears that there is a typo in the libhsakmt
topology information that lists this part as gfx902. This patch
fixes the issue.

Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Change-Id: I6f907a7aa6f190b12aba8bb4210c7b341b3c720b
2021-12-03 13:11:26 -05:00
Joseph Greathouse c60cb043e6 Correct gfx90c gfx arch number in HSA topology
The AMD compiler team has confirmed that they expect gfx90c
to be gfx90c, with a major/minor/stepping of 9, 0, and 12
respectively. It appears that there is a typo in the libhsakmt
topology information that lists this part as gfx902. This patch
fixes the issue.

Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Change-Id: I6f907a7aa6f190b12aba8bb4210c7b341b3c720b


[ROCm/ROCR-Runtime commit: a06d1a3884]
2021-12-03 13:11:26 -05:00
taosang2 6b3e3bf6c6 SWDEV-1 - Add EMU_ENV option
Fix FEAT-39125
Add EMU_ENV option. If it is ON, the building is for
emulation environment, thus some logics can be adjusted
to match emulation environment. If it is OFF, the
building is for regular environment.
Currently only ocltst will use the option. But it can
be used for other modules.

Change-Id: I54e1bc1309e82794b41fca2ae1f01f004138dced


[ROCm/clr commit: 76c6dcd558]
2021-12-03 10:03:00 -05:00
taosang2 76c6dcd558 SWDEV-1 - Add EMU_ENV option
Fix FEAT-39125
Add EMU_ENV option. If it is ON, the building is for
emulation environment, thus some logics can be adjusted
to match emulation environment. If it is OFF, the
building is for regular environment.
Currently only ocltst will use the option. But it can
be used for other modules.

Change-Id: I54e1bc1309e82794b41fca2ae1f01f004138dced
2021-12-03 10:03:00 -05:00
Jenkins 3511562c96 SWDEV-299127 - Merge 'develop' into 'amd-staging'
Change-Id: Idb06f8c83402eaa74de48a30b82d426e58031edf


[ROCm/hip commit: f50aeef9ec]
2021-12-03 07:14:45 -05:00
Jenkins f50aeef9ec SWDEV-299127 - Merge 'develop' into 'amd-staging'
Change-Id: Idb06f8c83402eaa74de48a30b82d426e58031edf
2021-12-03 07:14:45 -05:00
Chauncey Hui 5dab7d3843 SWDEV-2 - Change OpenCL version number from 3402 to 3403
[ROCm/clr commit: 1a677effa8]
2021-12-03 03:00:05 -05:00
Chauncey Hui 1a677effa8 SWDEV-2 - Change OpenCL version number from 3402 to 3403 2021-12-03 03:00:05 -05:00
Jatin Chaudhary 5d3ec295ba SWDEV-307838 - Push clang diagnostics to be ignored
Change-Id: I7487170b44994079bfe7167b6211489a0c7fef2b


[ROCm/clr commit: bf28ecb048]
2021-12-03 02:48:34 -05:00
Jatin Chaudhary bf28ecb048 SWDEV-307838 - Push clang diagnostics to be ignored
Change-Id: I7487170b44994079bfe7167b6211489a0c7fef2b
2021-12-03 02:48:34 -05:00
cjatin 2982b73c91 SWDEV-307407 - Add hiprtc's type traits function to match implementation of libcxx
Change-Id: I0a10eca329f817bbe31bdc47869b2de104d12d38


[ROCm/clr commit: 5b08779b25]
2021-12-02 23:32:23 -05:00
cjatin 5b08779b25 SWDEV-307407 - Add hiprtc's type traits function to match implementation of libcxx
Change-Id: I0a10eca329f817bbe31bdc47869b2de104d12d38
2021-12-02 23:32:23 -05:00
Jatin Chaudhary 59c41c7290 SWDEV-308889 - Add HIP_INCLUDE_HIP_HIP_RUNTIME_H define to stop including hip_runtime header in hiprtc code
Change-Id: Ic8f05dcfe61195a500718122f5fbd178c9df6be8


[ROCm/clr commit: 546d6c18bf]
2021-12-02 22:48:30 -05:00
Jatin Chaudhary 546d6c18bf SWDEV-308889 - Add HIP_INCLUDE_HIP_HIP_RUNTIME_H define to stop including hip_runtime header in hiprtc code
Change-Id: Ic8f05dcfe61195a500718122f5fbd178c9df6be8
2021-12-02 22:48:30 -05:00
anusha GodavarthySurya 7cac13e36e SWDEV-305766 - Added new debug APIs to get build information
Change-Id: Ibbf0c010cd8f7e6e659f2c4ba932cc8436574431


[ROCm/clr commit: e90cb3b07b]
2021-12-02 12:20:51 -05:00
anusha GodavarthySurya e90cb3b07b SWDEV-305766 - Added new debug APIs to get build information
Change-Id: Ibbf0c010cd8f7e6e659f2c4ba932cc8436574431
2021-12-02 12:20:51 -05:00
anusha GodavarthySurya 76457e470d SWDEV-306833 - Refactor HIPEvent IPC code
Change-Id: I118e41ac843d14fa3b42b4eb538c5d112dff1c03


[ROCm/clr commit: 1564f2cd77]
2021-12-02 12:20:40 -05:00
anusha GodavarthySurya 1564f2cd77 SWDEV-306833 - Refactor HIPEvent IPC code
Change-Id: I118e41ac843d14fa3b42b4eb538c5d112dff1c03
2021-12-02 12:20:40 -05:00
Jeremy Newton 8c921fc3cc Merge "SWDEV-312927 - Fix rocm-opencl package licensing" into amd-staging
[ROCm/clr commit: df2eec8465]
2021-12-02 11:48:59 -05:00
Jeremy Newton df2eec8465 Merge "SWDEV-312927 - Fix rocm-opencl package licensing" into amd-staging 2021-12-02 11:48:59 -05:00
sdashmiz 5f5adf0b09 SWDEV-312099 - hipsteam capture API status report fix
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Iee0bbad978f3ca89ff81e5a8583c0aa9cfcb4098


[ROCm/clr commit: 981125aacc]
2021-12-02 11:04:00 -05:00
sdashmiz 981125aacc SWDEV-312099 - hipsteam capture API status report fix
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Iee0bbad978f3ca89ff81e5a8583c0aa9cfcb4098
2021-12-02 11:04:00 -05:00
Satyanvesh Dittakavi b219bf8292 SWDEV-309286 - save the max system mem size in device info
Change-Id: I9955625aca6ceda059aef6354d909de636b610ba


[ROCm/clr commit: 9dabdcdc3e]
2021-12-02 10:59:07 -05:00
Satyanvesh Dittakavi 9dabdcdc3e SWDEV-309286 - save the max system mem size in device info
Change-Id: I9955625aca6ceda059aef6354d909de636b610ba
2021-12-02 10:59:07 -05:00
Jeremy Newton 3f90750304 Just install license into /opt/rocm*/share/doc
This is causing issues with side by side, sorry for the noise.

This license location isn't ideal but it's good enough for now.

Change-Id: Iba2a84cedf22466fdaaf3c63b6ea49c9fc277967
Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
2021-12-02 10:04:51 -05:00
Jeremy Newton 22a9a73290 Just install license into /opt/rocm*/share/doc
This is causing issues with side by side, sorry for the noise.

This license location isn't ideal but it's good enough for now.

Change-Id: Iba2a84cedf22466fdaaf3c63b6ea49c9fc277967
Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>


[ROCm/ROCR-Runtime commit: 3f90750304]
2021-12-02 10:04:51 -05:00