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Автор SHA1 Сообщение Дата
David Belanger b25867c4b8 libhsakmt: Disabled allocation of CWSR with SVM for GFX11.
This is a temporary work around for GPU hang issues observed on GFX11.

Change-Id: I98fbedbbd1c51fe402c2116b35ca548931a390c9
Signed-off-by: David Belanger <david.belanger@amd.com>
2023-01-11 17:28:31 -05:00
Eric Huang 505287412f Revert "libhsakmt: Remove unnecessary CPU unmap"
This reverts commit 7787a039bd.

It causes a regression in pytorch benchmark.

Change-Id: I96173dbd061cf38d6f451c02cb181ae51b7f625e
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
2023-01-06 17:16:40 -05:00
Alex Sierra f2bda56d04 Revert "src: use SVM mechanism to register userptr memory"
This reverts commit 178a619b80.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: I7ef87c5232a3bcbe594c743fa4b4958601845ba5
2022-12-08 17:33:51 -06:00
Alex Sierra d9f86ae02b Revert "libhsakmt: query svm info from userptrs at fault events"
This reverts commit 45fad29752.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: I6566c9f0d39d05ecb92f38159880763f432939a5
2022-12-08 17:33:50 -06:00
Alex Sierra 21e95a4f2a Revert "libhsakmt: add env var to en/dis registration through SVM"
This reverts commit 8a746bdaed.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: Ib01046571d2c84fa0fd228ecba0dee0eae3f994d
2022-12-08 17:33:48 -06:00
Felix Kuehling 7787a039bd libhsakmt: Remove unnecessary CPU unmap
This is handled by __fmm_release calling aperture_release_area.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ib8ed300e1734f03aeb9dfc8074897ece310b8af9
2022-11-28 17:18:13 -05:00
Felix Kuehling 73b0fb3d7c libhsakmt: Refactor and clean up CPU mappings
Use a common helper for CPU mappings to reduce duplicate code.
Consistently use MAP_SHARED for all render_fd mappings.
Remove double-mapping for AQL queue buffers on the CPU. This workaround
is only needed on the GPU.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Iff86c8cc9f1e5c982614b3f11129bc2cf8cbba02
2022-11-28 17:18:05 -05:00
Felix Kuehling 2d53430ce3 libhsakmt: Fix and simplify debug_get_reg_status
The NULL pointer check was the only way for that function to fail. And it
was done after the pointer was accessed. Simplify this by just returning
the result as a return value instead of using a pointer as output
parameter. This way the function can never fail and the caller doesn't
need to do any error handling.

Declare the function in libhsakmt.h instead of duplicating the
declaration in fmm.c.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I91b90d66166fd3b5cdc47c73a9bbc369c45b51fe
2022-11-28 17:17:43 -05:00
Alex Sierra 8a746bdaed libhsakmt: add env var to en/dis registration through SVM
Setting this variable to '0' will force to disable memory
registration/allocation through SVM API mechanism.
Not setting this or setting to '1', SVM API will be used only if all
GPUs support it.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: Icdf7656de09aa9988b567ec6c024953398e9bb48
2022-11-28 13:42:43 -05:00
Felix Kuehling 8e69b9c70e libhsakmt: Fix use of uninitialized variable
When is hsaKmtCreateQueue called first time for node
doorbells[NodeId].size is initialized to zero in init_process_doorbells
but used to calculate the doorbell offset. It works just by accident
because doorbells[NodeId].size is uint32_t so -1 will be 0xFFFFFFFF which
is zero extended into 0x00000000FFFFFFFF and it will work as long as mmap
offset bits are not within lower 32 bits.

Bug: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/issues/78
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ia791adfc51363d4704cb50fa4f01137b7dd48a75
2022-11-25 14:07:45 -05:00
David Yat Sin f46ddb7ead libhsakmt: Initialize fd to -1
Fix compile error due to warning in some environments

Change-Id: Ie5fcfabb872c27c0de349eb215345b997fae7201
2022-11-25 15:01:53 +00:00
David Francis 88934cec2c libhsakmt: Don't close kfd_fd
When hsa is closed, it would close open fds for /dev/kfd but
not for /dev/dri/renderD*. This caused issues with CRIU
checkpoint, which expects that /dev/kfd will be open if
/dev/dri/renderD* is.

As a workaround for the CRIU behaviour, leave /dev/kfd open
when closing hsa.

Signed-off-by: David Francis <David.Francis@amd.com>
Change-Id: Ie1b2d5b1d8986750b0e560ae2934b7c73cff942e
2022-11-17 10:04:24 -05:00
Alex Sierra 45fad29752 libhsakmt: query svm info from userptrs at fault events
Get more debug information about user pointers that were registered
through SVM API, and triggered by memory exception events.
A new kfdtest with this use case was also included inside
KFDExceptionTest.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I8e9df3c1c6c3f42d7b9235d12406d80d31746443
2022-10-21 15:33:14 -04:00
Alex Sierra 178a619b80 src: use SVM mechanism to register userptr memory
Register and map userptrs through Shared Virtual Memory(SVM) API at
the Kernel level when available. Using this approach, performance
will be improve as register/unregister memory will not trigger any
system call to KFD driver.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I20723cbeb340bf48b95e1115f0102c031397bc14
2022-10-21 15:32:02 -04:00
Graham Sider 79279e860f libhsakmt: Skip hsa_gfxip_table search for GFX11+
Prior to launch some ASICs may re-use PCI DIDs from older generations.
This can cause issues during topology initialization as hsa_gfxip_table
lookups will override sysfs-provided gfx versions, causing incorrect
gfxip selection. Since no new entries will be added to hsa_gfxip_table,
limit its search only to pre-GFX11 ASICs.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I53eaefac5db2650a36a6ce9f21daf750f50cfd26
2022-09-21 14:09:35 -04:00
Philip Yang 093cf898fb libhsakmt: Set CWSR SVM range MADV_DONTFORK
fork process copy-on-write MMU nitifier on CWSR range will evict user
queues, and then update GPU mapping and resume queues, use MADV_DONTFORK
to avoid COW MMU notifier callback on CWSR SVM range.

Use mmap to alloc SVM range for CWSR because posix_memalign don't alloc
new range in child process, this fails to register svm range as range is
invalid address in forked child process.

Change-Id: Ibaea56a691dd6f577ed2e1f2d43f4a3500b8316f
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
2022-09-08 22:53:47 -04:00
Philip Yang b2691c359d libhsakmt: Use mmap aligned for scratch allocation
To remove duplicate mmap aligned allocation code.

Change-Id: Ibc05cc4aaf6d190bd2382e33bdeca1496960c5f2
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
2022-09-08 22:53:47 -04:00
Philip Yang b7710a1dda libhsakmt: Add mmap alloc aligned helper function
mmap alloc larger address range with align padding page plus guard
pages, then unmap the padding and guard pages at beginning and end
of the range, return aligned address range.

Change-Id: Iaf3c711a079c744289efbafee9b5e63aaf724765
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
2022-09-08 22:53:47 -04:00
Aaron Liu 06a90612e9 libhsakmt: expand control stack size limit for all gfx103x
GFX1036(ISA version) is not included in the previous range.
This patch can really include all gfx10 series ASICs.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: I0e28dbfc031c216166b306b9fb39f644f75a330f
2022-09-08 22:37:50 -04:00
jie1zhan d98c729ff9 libhsakmt: Add check for the runntime debuuger
Avoiding the segfault, runtime debugger enable is not supported
if the firmware of gpu doesn't support debug exceptions.

Signed-off-by: jie1zhan <jesse.zhang@amd.com>
Change-Id: Ifad57a6e78cb1c92b1f8927355ece8c64e89c51b
2022-09-08 20:52:01 -04:00
Mukul Joshi 57a1c6f3ff libhsakmt: Remove potential double free in queue creation
Remove potential double free condition when free_queue() is called
after hsaKmtDestroyQueue() if mapping doorbell fails during queue
creation.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Change-Id: If2aa19c455b30d2940b232dbafb9cc1eaad721a5
2022-09-08 11:39:34 -04:00
Philip Yang 3dbf5feffe libhsakmt: Fix queue leaking debug memory
Queue ctx_save_restore memory is allocated with size
ctx_save_restore_size + debug_memory_size, use the same size
in free_queue to free ctx_save_restore memory.

Change-Id: I4902ff15fb82ddea64b8342b89776a1bf5c38d13
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
2022-09-01 12:31:16 -04:00
David Yat Sin 1c385fb257 libhsakmt: Add check for invalid aperture
Avoiding segfault when an invalid SharedMemoryHandle is passed in
when calling fmm_register_shared_memory.

Change-Id: I0e0bbed01487fc10afcbb170eb9330e70b209d14
Signed-off-by: David Yat Sin <David.YatSin@amd.com>
2022-08-31 15:14:16 -04:00
kent.russell@amd.com ea4d4917c1 src/topology.c: Fix NULL check
Now that HsaNodeProperties is passed in to
topology_get_node_props_from_drm, check that pointer instead of the
pointer for MarketingName (which throws a compiler warning)

Signed-off-by: kent.russell@amd.com <kent.russell@amd.com>
Change-Id: If76b24e1bab5a62e514ab440b6316c7b7cd264c1
2022-08-29 08:56:41 -04:00
Lang Yu 66e9e97e0d libhsakmt: add FamilyID info into HsaNodeProperties
Query family id info from drm render node, then
ROCr can query this info directly from Thunk
instead of parsing the info by itself.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Change-Id: I030bd27ab2379fbf87f3d787302c3b8613456278
2022-08-24 21:14:06 -04:00
Jonathan Kim c1d8ac8437 libhsakmt: bump debug major rev for snapshot and watchpoint changes
The debugger can now request snapshot copies with entry size and
set/clear watchpoints by device.

v3: drop min version check to v10.0

v2: check runtime allowance from v10.3 to 13.x

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Change-Id: I9befefb596201a11591de218db29a9317b41e69b
2022-08-22 12:11:04 -04:00
Felix Kuehling deb7a20c92 libhsakmt: Make CWSR area executable
The debugger depends on the CWSR area being executable. Set the right
flag when registering SVM memory.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Tested-by: Laurent Morichetti <Laurent.Morichetti@amd.com>
Change-Id: I7441e214d1a4da8324d775e777976fabd1c81a6f
2022-07-25 17:43:52 -04:00
Felix Kuehling 9b2b81e555 libhsakmt: Remove CMA implementation
The CMA feature is deprecated and about to be removed from the DKMS
branch. It was never supported upstream. Leave dummy functions in
place for now.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I9e51403d753cb91630553aff4f19e931af509740
2022-07-21 16:08:19 -04:00
Felix Kuehling 9ac2c75171 libhsakmt: Map VRAM only on supported peer GPUs
hsaKmtMapMemoryToGPU should not try to map VRAM on peer GPUs that don't
have an IO-Link to the memory. The new P2P mapping code in KFD will
fail otherwise.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I6d59b55651b98756865a0f69eafef3e386372cf3
2022-07-19 21:21:59 -04:00
Felix Kuehling 87aca673e8 libhsakmt: Init apertures in AcquireSystemProperties
This allows init_process_apertures to use the whole consistent topoology
instead of taking its own partial snapshot.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ia13e7aa7fcd090ea8d6cacd4babb29a27c20207f
2022-07-19 21:21:59 -04:00
Jonathan Kim a31206e98b libhsakmt: fix runtime disable check
Kernel debug IOCTL got version bumped to v11.
Updated runtime enable but missed runtime disable check update.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Change-Id: I71a8970ccfe7dc517abe7b4ad962369aea6a0496
2022-07-12 20:59:08 -04:00
Eric Huang 37be876cad libhsakmt: allocate unified memory for ctx save restore area
To improve performance on queue preemption, allocate ctx s/r
 area in VRAM instead of system memory, and migrate it back
 to system memory when VRAM is full.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: If775782027188dbe84b6868260e429373675434c
2022-07-11 18:06:55 -04:00
Jonathan Kim 79cd63fab6 libhsakmt: permit runtime enable version for new hw mode set restrictions
The KFD no longer allow debug ops that modify HW state prior to
trap activation so permit bump in major version.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Change-Id: I072d3998b7b043df9a67f0f6762b0afdfa9382c6
2022-06-24 10:21:57 -04:00
Graham Sider e17b159230 libhsakmt: Make queue memory allocation non-paged
Non-paged allocation for queue memory necessary for binding wptr to
GART. Required to support usermode queue oversubscription with MES on
GFX11.

Change ensures queue memory does not specify ATS.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I10b23b0205c90dad902c711a88cfb5e9b4979617
2022-06-22 18:37:26 -04:00
Philip Yang 405fbd6f93 libhsakmt: add open SMI event handle
System Management Interface event is read from anonymous file handle,
this helper wrap the ioctl interface to get anonymous file handle for
GPU nodeid.

Define SMI event IDs, event triggers, copy the same value from
kfd_ioctl.h to avoid translation.

Change-Id: I5c8ba5301473bb3b80bb4e2aa33a9f675bedb001
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
2022-06-20 08:49:13 -04:00
Philip Yang 88778e13dc libhsakmt: hsaKmtGetNodeProperties add gpu_id
Add KFDGpuID to HsaNodeProperties to return gpu_id to upper layer,
gpu_id is hash ID generated by KFD to distinguish GPUs on the system.
ROCr and ROCProfiler will use gpu_id to analyze SMI event message.

Change-Id: I6eabe6849230e04120674f5bc55e6ea254a532d6
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
2022-06-20 08:48:44 -04:00
Alex Sierra 0e908f05bb libhsakmt: add env var to set max VA alignment order
This env variable sets the max VA alignment order size as
"PAGE_SIZE * 2^alignment order" during mapping. By default the order
size is set to 9(2MB).

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I01ae4e0963f4d21c7c367464e60f865bc58d7fac
2022-06-13 15:46:54 -04:00
Daniel Phillips 6da6058d4a libhsakmt: Add support for hsaKmtAvailableMemory
New API function to report available memory per GPU

Signed-off-by: Daniel Phillips <Daniel.Phillips@amd.com>
Change-Id: I63c1e4ca0020c657977ab3635947ab0ed0a81440
2022-06-13 09:37:32 -04:00
Timothy Pearson 5fd3c868b2 Initial support for POWER platforms
Tested on Talos II with Vega 64

POWER systems allocate NUMA nodes on multiples of 8 to allow CPU
onlining / offlining
Set the correct NUMA mask bits when requesting node-bound memory
allocations

This is a cleanup/squash/rebase of:
https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/pull/47

Change-Id: Id4af6dff7e66e9d464d6b17a1e99087eb3ac8e51
Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
2022-04-19 12:19:15 -04:00
Felix Kuehling f88aaa933b libhsakmt: Update kfd_ioctl.h
Import the latest version from the kernel tree.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: If5f998ad55085ebd5020adaa382181204d834e3e
2022-03-21 14:41:18 -04:00
Mukul Joshi b8dc875b3c libhsakmt: Update context save area size calculations
Currently, context save area size passed to KFD includes the
size of the debug area. Change this to report the actual size
of the context save area to KFD.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Change-Id: I5d440ae802255a97ade046775f6a000bae79d5d5
2022-03-02 15:28:38 -05:00
Lang Yu 052b7957ea libhsakmt: Add another pci device id for cyan skillfish
Add PCI DID for cyan skillfish.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Change-Id: I1d06936cccdf99af76fe5ca3ff323538fac76c9c
2022-01-27 01:41:00 -05:00
Aaron Liu 7cdf38f6c0 libhsakmt: correct the gfx version for gfx90c
The gfx version of gfx90c is 90C instead of 902.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: Id009c9357f816b8ccab605090df47626f1a579ef
2022-01-26 01:25:58 -05:00
David Yat Sin 4986f4a5c2 libhsakmt:Add MADV_DONTFORK to device mappings
Mapped memory areas become invalid after fork, and the child process is
required to remap the memory areas after a fork. So we mark these device
memory mappings with MADV_DONTFORK so that they are removed from the
child process after fork.

This was causing some issues when doing CRIU checkpoint/restore because
CRIU and amdgpu_plugin were not able to handle these mappings.

Change-Id: I50eb334aecea6dab7522d94da0273adcf4fb1ce0
Signed-off-by: David Yat Sin <david.yatsin@amd.com>
2022-01-10 16:25:16 -05:00
Joseph Greathouse a06d1a3884 Correct gfx90c gfx arch number in HSA topology
The AMD compiler team has confirmed that they expect gfx90c
to be gfx90c, with a major/minor/stepping of 9, 0, and 12
respectively. It appears that there is a typo in the libhsakmt
topology information that lists this part as gfx902. This patch
fixes the issue.

Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Change-Id: I6f907a7aa6f190b12aba8bb4210c7b341b3c720b
2021-12-03 13:11:26 -05:00
Sean Keely 5e3983cb93 Check errno for error type in hsaKmtAllocQueueGWS.
Check errno rather than err and drop negation.

Change-Id: I1804d67292c3b054eab8fc077c8e9b22a8cdcc9f
2021-10-06 15:08:28 -04:00
Sean Keely b67bc6fcc9 Check errno rather than return from kmtIoctl in hsaKmtRuntimeEnable.
The return code is just -1 if any error occurs.  To detect debugger
unavailable we need to check the actual ioctl error code.

Change-Id: I8a294c754196aec916809497ec8e810da2f072b8
Signed-off-by: Sean Keely <Sean.Keely@amd.com>
2021-10-06 15:07:22 -04:00
Philip Yang f82927ad65 libhsakmt: register and deregister userptr in parallel
For userptr, after taking aperture lock, decrease registration_count and
ensure object registration_count equal to 0 to release KFD and thunk
object.

Move decrementing of registration count from fmm_deregister_memory into
__fmm_release to avoid a race condition when dropping the aperture lock
in fmm_deregister_memory.

Change-Id: I5381fa6b8a77a1516af2554e5174e91969c338c4
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
2021-10-01 15:56:38 -04:00
Yifan Zhang db1d6d92ab libhsakmt: dump errno the queue destroy fails.
to faciliate debugging, print errno when queue destroy fail
current log give very little information when fail:

[ RUN      ] KFDQMTest.AllSdmaQueues
 [          ] Regular SDMA engines number: 1 SDMA queues per engine: 2
 [       OK ] KFDQMTest.AllSdmaQueues (11 ms)
 [ RUN      ] KFDQMTest.AllXgmiSdmaQueues
 [          ] XGMI SDMA engines number: 0 SDMA queues per engine: 2
 [       OK ] KFDQMTest.AllXgmiSdmaQueues (6 ms)
 [ RUN      ] KFDQMTest.AllQueues
 /home/foreman/build/hsakmt-roct-amdgpu-1.0.9.40500/sources/libhsakmt/tests/kfdtest/src/KFDQMTest.cpp:381: Failure
 Value of: (cpQueues[i].Destroy())
   Actual: 1
 Expected: HSAKMT_STATUS_SUCCESS
 Which is: 0

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: I5b1b5b616a5fd7ff198360c893a7aeed685022bd
2021-09-15 04:34:58 -04:00
Philip Yang 8f7443494a libhsakmt: fix multiple threads register userptr race v2
After calling ioctl to create userptr obj, take aperture lock, check if
there is same userptr obj created after finding object, to catch the
race that multiple threads register same userptr to multiple GPUs.

If same userptr obj exist, then increase userptr registeration_count,
and free the newly create obj.

Change-Id: I63ae3a4f54da8aedd11c124d8d53ebe727b8203a
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
2021-09-14 12:36:36 -04:00