- Make sure barrier with dependent signals issues before queue
index reservation
- Don't issue extra barrier if it's already a barrier command
with dependent signals
Change-Id: I179a8b7adac79eed698f4a4d9eca2606d8e913aa
In HSAIL path, kernel akc info is obtained after code object
loading, and kernel signature creation requires the akc info
when one of the kernel argument is a reference object.
Change-Id: I9cdb1dbf2c72f4620b0b6e46a88402a2473c3e97
Use HSA_AMD_SVM_ATTRIB_AGENT_ACCESSIBLE flag for the initial
allocation instead of HSA_AMD_SVM_ATTRIB_AGENT_ACCESSIBLE_IN_PLACE.
Change-Id: Ia52fe205563df1ea916dc2dc81e749e11c16f83d
This fixes an issue in hostcall when processing printf of a C string.
The calculation to round-up the string size to the next data chunk
didn't include the extra byte for the null terminating character.
Change-Id: I4cf0c250fa4fda253b0db15be461819ffce76d32
This addresses the rocprof hang seen with direct dispatch. The
workaround queues the handler back if any of the signal value in the batch
is not decremented. To rememmber the last position in the list, we save
the parsed command in the current timestamp struct.
Change-Id: I02959e463cfe3cee83c54808ffd6e6f48f43b4e8
HIP should be built with HSAIL support disabled.
Currently HSAILProgram::info() and VirtualGPU::buildKernelInfo() expose
ACL interfaces directly. This should not be allowed.
Change-Id: Iae15d4f19be16806826f2f6cb600752c11f97fc1
hipIpcOpenMemHandle should return the device pointer which is
similar to the base ptr of the original allocation even if the offset
to the original pointer is passed to hipIpcGetMemHandle
Change-Id: I99c0553e8c67c15b5fed880b6a4c74bce39c3aee
Device enqueue has an option to execute scheduler on the current
queue and it's enabled by default. Make sure scratch is allocated
on the current queue for that case. Add max vgpr tracking per
program to adjust scratch size accordingly.
Change-Id: I2a6d796913a4551a1e7f343a2465d589eec60d8a
MT doesn't use GPU waits, but CPU for sync between engines.
Change the threshold values for CPU waits for direct dispatch.
That will bring behavior closer to MT.
Change-Id: Ia41c3cb812614962aff2746b6cf858f1bf77dda2
Enabling both LC and HSAIL will cause the DYN macro to be redefined.
Rename it for each compiler to avoid name clashing.
Change-Id: I607f022f37c4d05bef4e3a8070d19bd3659d7bc2
This change makes HSAIL usage similar to that of Comgr. By default, the
runtime will statically link against it, however if HSAIL_DYN_DLL is
defined, then the runtime will try to dynamically load HSAIL.
Currently stick to statically linking to HSAIL. In a feature patch the
dynamic loading behaviour will be enabled.
Change-Id: I6a78a4375975cf847f236b200404c8cf941d012b
In adition to removing the HSAIL logic from the ROCm backend, guard all
of the HSAIL includes in the common layer behind the WITH_COMPILER_LIB
define. This is to avoid including HSAIL headers when building with
no support for it.
In common logic replace the use of the aclType enum with the new
Program::file_type_t enum. This is essentially a local copy of the HSAIL
enum to avoid including any HSAIL headers.
Change-Id: Ica0651d1b29dfccc255cc584eb82a5cb35e1b520
- Add HSAIL ID for Hawaii as gfx702
- Add HSAIL ID for Renoir without xnack as gfx90c
Fixes: SWDEV-271289, SWDEV-272761
Change-Id: I92cf4619cdfd550462ff8ec3740443ef1e5a5f96
The check has to be performed inside the signal loop, because
active signals need to be processed to avoid a stale timestamp
class.
Change-Id: I26af8287aae18eb19c096d9358cd0b86cfd1c561
- With direct disaptch profiling state is enabled to trigger the
callback on HSA signal. However ROCr has very low peformance on
the first call to get the profiling info. That impacts some tiny
performance tests.
Change-Id: Idacd1b10a473fcfb5feef3074b7191d35743f769
German Andryeyev
Jason Tang
Ravi C Akkenapally
kjayapra-amd
Siu Chi Chan
Vladislav Sytchenko
Saleel Kudchadker
Brian Sumner
pghafari
Satyanvesh Dittakavi
Sourabh Betigeri
Julia Jiang
Konstantin Zhuravlyov
Sarbojit Sarkar
Todd tiantuo Li