Commit Graph

64650 Commits

Author SHA1 Message Date
Daniel Su 413c564cdd External CI: add parallel mainline checks for develop and staging branches (#666)
[ROCm/rocprofiler-compute commit: 36aa7fb7a9]
2025-04-11 15:34:18 -04:00
Daniel Su 36aa7fb7a9 External CI: add parallel mainline checks for develop and staging branches (#666) 2025-04-11 15:34:18 -04:00
Six, Lancelot b389f97d73 SWDEV-517078 - Update 2nd level trap handlers (#148)
* SWDEV-517078 - Maintain the trap handler ABI version in CLR

The trap handler ABI version is communicated to the debugger using
the r_version field in the r_debug structure.  This structure is
an external dependency, which makes it complicated to keep the trap
handler source (in CRL) and the ABI version number (external dependency)
in sync.

This patch proposes to patch the trap handler ABI version number in
_amdgpu_r_debug before communicating it to the debugger.

We can't directly include sc's executable.hpp file in CRL as it relies
on conflicting definition of ELF related types, so instead we need to
rely on a-priori knowledge on the r_debug structure.  Fortunately, this
structure is part of a stable ABI, so its layout is guaranteed to be
kept stable.

Update the 2nd level trap handler to follow updates from the
ROCr-runtime.  The trap handlers are stripped from parts dedicated to
architectures unsupported by CLR.

Bump the r_debug.r_version to track the ABI changes in the trap handler.

[ROCm/clr commit: 7b72c1b786]
2025-04-11 18:59:54 +01:00
Six, Lancelot 7b72c1b786 SWDEV-517078 - Update 2nd level trap handlers (#148)
* SWDEV-517078 - Maintain the trap handler ABI version in CLR

The trap handler ABI version is communicated to the debugger using
the r_version field in the r_debug structure.  This structure is
an external dependency, which makes it complicated to keep the trap
handler source (in CRL) and the ABI version number (external dependency)
in sync.

This patch proposes to patch the trap handler ABI version number in
_amdgpu_r_debug before communicating it to the debugger.

We can't directly include sc's executable.hpp file in CRL as it relies
on conflicting definition of ELF related types, so instead we need to
rely on a-priori knowledge on the r_debug structure.  Fortunately, this
structure is part of a stable ABI, so its layout is guaranteed to be
kept stable.

Update the 2nd level trap handler to follow updates from the
ROCr-runtime.  The trap handlers are stripped from parts dedicated to
architectures unsupported by CLR.

Bump the r_debug.r_version to track the ABI changes in the trap handler.
2025-04-11 18:59:54 +01:00
Milanov, Aleksandar c83df8a653 SWDEV-526208 - Fix miscalculation of coalesced tiled partition mask (#162)
[ROCm/clr commit: c4fa3ef927]
2025-04-11 19:40:26 +02:00
Milanov, Aleksandar c4fa3ef927 SWDEV-526208 - Fix miscalculation of coalesced tiled partition mask (#162) 2025-04-11 19:40:26 +02:00
Shane Xiao 6a63170b38 rocr: Add rec sdma engines with limited XGMI SDMA engine
This patch will adds recommended sdma supports with
limited XGMI SDMA engine. It will use one PCIe SDMA
to do gpu <-> gpu copies which will help improve all
to all copy performance.

Signed-off-by: Shane Xiao <shane.xiao@amd.com>
2025-04-11 23:54:15 +08:00
Shane Xiao 8d34f4e12d rocr: Add rec sdma engines with limited XGMI SDMA engine
This patch will adds recommended sdma supports with
limited XGMI SDMA engine. It will use one PCIe SDMA
to do gpu <-> gpu copies which will help improve all
to all copy performance.

Signed-off-by: Shane Xiao <shane.xiao@amd.com>


[ROCm/ROCR-Runtime commit: 6a63170b38]
2025-04-11 23:54:15 +08:00
Hernandez, Gerardo 9264e97cbb SWDEV-521920 - Fix compilation issues introduced by the reduce sync operations - 2 (#167)
Fix pytorch 2.5 issues, by defining reduce sync operations for type __half in amd_hip_fp16.h and not in
amd_warp_sync_functions.h which is problematic in case __half does not get included before that header.
Only define types not supported by cuda if HIP_ENABLE_EXTRA_WARP_SYNC_TYPES is defined, to avoid portability issues

[ROCm/clr commit: 66496258b4]
2025-04-11 17:00:59 +05:30
Hernandez, Gerardo 66496258b4 SWDEV-521920 - Fix compilation issues introduced by the reduce sync operations - 2 (#167)
Fix pytorch 2.5 issues, by defining reduce sync operations for type __half in amd_hip_fp16.h and not in
amd_warp_sync_functions.h which is problematic in case __half does not get included before that header.
Only define types not supported by cuda if HIP_ENABLE_EXTRA_WARP_SYNC_TYPES is defined, to avoid portability issues
2025-04-11 17:00:59 +05:30
Jiang, Julia 3814752c7b SWDEV-520698 - Update memory management API documentation (#46)
[ROCm/hip commit: d924ffd7f7]
2025-04-11 16:56:46 +05:30
Jiang, Julia d924ffd7f7 SWDEV-520698 - Update memory management API documentation (#46) 2025-04-11 16:56:46 +05:30
Yao, Longlong 6015dda120 SWDEV-518966 - Avoid creating Arena Memobj for VMM pointer (#39)
Change-Id: I69c6c0a1464d01e674ac929de34ab10047012f1a

Signed-off-by: Longlong Yao <Longlong.Yao@amd.com>

[ROCm/clr commit: 0de73eeaf8]
2025-04-11 16:55:53 +05:30
Yao, Longlong 0de73eeaf8 SWDEV-518966 - Avoid creating Arena Memobj for VMM pointer (#39)
Change-Id: I69c6c0a1464d01e674ac929de34ab10047012f1a

Signed-off-by: Longlong Yao <Longlong.Yao@amd.com>
2025-04-11 16:55:53 +05:30
Pryor, Adam 58811fecbb [SWDEV-515192] Fix rdc topo (#146)
Change-Id: I64a8077a56e2eaf99735fafb1010d869a1fdb0c3

Signed-off-by: adapryor <Adam.pryor@amd.com>
2025-04-10 17:46:08 -05:00
Pryor, Adam 9d25978a3f [SWDEV-515192] Fix rdc topo (#146)
Change-Id: I64a8077a56e2eaf99735fafb1010d869a1fdb0c3

Signed-off-by: adapryor <Adam.pryor@amd.com>

[ROCm/rdc commit: 58811fecbb]
2025-04-10 17:46:08 -05:00
Jonathan Kim 4c3a0698f8 kfdtest: fix trap on start for gfx 9 and 11
Similar to GFX 12, GFX 9 and 11 need to exit without forwarding
the PC.
2025-04-10 14:48:19 -04:00
Jonathan Kim a595c0bd25 kfdtest: fix trap on start for gfx 9 and 11
Similar to GFX 12, GFX 9 and 11 need to exit without forwarding
the PC.


[ROCm/ROCR-Runtime commit: 4c3a0698f8]
2025-04-10 14:48:19 -04:00
Haehnle, Nicolai b3d1ac7232 Report null stream creation failure (#152)
Explicitly nulling the pointer causes us to report the error below
instead of keeping a dangling pointer around that will most likely lead
to a subsequent segfault.

[ROCm/clr commit: 199b0f1086]
2025-04-10 11:40:05 -07:00
Haehnle, Nicolai 199b0f1086 Report null stream creation failure (#152)
Explicitly nulling the pointer causes us to report the error below
instead of keeping a dangling pointer around that will most likely lead
to a subsequent segfault.
2025-04-10 11:40:05 -07:00
Jiang, Julia 2a39c6a782 SWDEV-525231 - Update changelog for 6.5 feature implementations (#150)
[ROCm/clr commit: b44f5f9992]
2025-04-10 14:17:32 -04:00
Jiang, Julia b44f5f9992 SWDEV-525231 - Update changelog for 6.5 feature implementations (#150) 2025-04-10 14:17:32 -04:00
Sang, Tao 929209b988 SWDEV-521083 - Fix atomicMin/Max issues (#151)
Fix atomicMin/Max(), atomicMin/Max_system() issue on
float types.

[ROCm/clr commit: 6d10577761]
2025-04-10 12:30:55 -04:00
Sang, Tao 6d10577761 SWDEV-521083 - Fix atomicMin/Max issues (#151)
Fix atomicMin/Max(), atomicMin/Max_system() issue on
float types.
2025-04-10 12:30:55 -04:00
Chaudhary, Jatin Jaikishan 665e88008b SWDEV-461087 - fp4/fp6/fp8 ocp headers (#41)
This now has host conversions too, which is directly from Christopher's
work on fcbx.

Signed-off-by: Christopher M. Riedl

* add const to func parameter

* do not depend on builtins, use gfx950 detection

[ROCm/clr commit: 628777b73d]
2025-04-10 17:22:15 +01:00
Chaudhary, Jatin Jaikishan 628777b73d SWDEV-461087 - fp4/fp6/fp8 ocp headers (#41)
This now has host conversions too, which is directly from Christopher's
work on fcbx.

Signed-off-by: Christopher M. Riedl

* add const to func parameter

* do not depend on builtins, use gfx950 detection
2025-04-10 17:22:15 +01:00
Andryeyev, German c50f85df20 SWDEV-517481 - Add more restrictions to the queue management (#168)
[ROCm/clr commit: 4c363df3bf]
2025-04-10 21:51:45 +05:30
Andryeyev, German 4c363df3bf SWDEV-517481 - Add more restrictions to the queue management (#168) 2025-04-10 21:51:45 +05:30
Xie, Jiabao(Jimbo) 88841d1dee SWDEV-524188 - Check for VRam and system RAM properly (#122)
Currently, we check if there's enough system RAM even if we don't allocate on host device. This is incorrect logic.
We should not check for this size on windows because PAL checks for memory allocation. See SWDEV-467263.

Co-authored-by: Jimbo Xie <jiabaxie@amd.com>

[ROCm/clr commit: 0d6e554d92]
2025-04-10 21:50:48 +05:30
Xie, Jiabao(Jimbo) 0d6e554d92 SWDEV-524188 - Check for VRam and system RAM properly (#122)
Currently, we check if there's enough system RAM even if we don't allocate on host device. This is incorrect logic.
We should not check for this size on windows because PAL checks for memory allocation. See SWDEV-467263.

Co-authored-by: Jimbo Xie <jiabaxie@amd.com>
2025-04-10 21:50:48 +05:30
Chaudhary, Jatin Jaikishan 07c7d3e860 SWDEV-520627 - include sync_warp header instead of warp function header (#18)
Change-Id: Ic3f54b0f5bfee8565a8bbb6218fb0ccdb900c9ea

[ROCm/clr commit: 5c030840d6]
2025-04-10 21:50:25 +05:30
Chaudhary, Jatin Jaikishan 5c030840d6 SWDEV-520627 - include sync_warp header instead of warp function header (#18)
Change-Id: Ic3f54b0f5bfee8565a8bbb6218fb0ccdb900c9ea
2025-04-10 21:50:25 +05:30
Andryeyev, German 90e3d2619a SWDEV-525725 - Enable resource cache for SVM (#156)
- Make sure reserved_va_ updated before svmPtr overwrite

[ROCm/clr commit: 94cd9bc4f7]
2025-04-10 10:54:28 -04:00
Andryeyev, German 94cd9bc4f7 SWDEV-525725 - Enable resource cache for SVM (#156)
- Make sure reserved_va_ updated before svmPtr overwrite
2025-04-10 10:54:28 -04:00
Patel, Jaydeepkumar c2ed585737 SWDEV-521262 - Adding MSVC compiler options to fix the conflict with SC module while building hip in debug. (#24)
[ROCm/clr commit: 997519fa94]
2025-04-10 15:25:58 +05:30
Patel, Jaydeepkumar 997519fa94 SWDEV-521262 - Adding MSVC compiler options to fix the conflict with SC module while building hip in debug. (#24) 2025-04-10 15:25:58 +05:30
Patel, Jaydeepkumar dea880f9da SWDEV-508973 - If total # of threads/block is more than HW capacity, it's invalid config issue and should return invalid config error. (#25)
[ROCm/clr commit: 8531cd3bbe]
2025-04-10 15:16:16 +05:30
Patel, Jaydeepkumar 8531cd3bbe SWDEV-508973 - If total # of threads/block is more than HW capacity, it's invalid config issue and should return invalid config error. (#25) 2025-04-10 15:16:16 +05:30
Stojiljkovic, Vladana 81a566e397 SWDEV-505795 - Return the same ptr from hipIpcOpenMemHandle if it is called multiple times (#93)
* SWDEV-505795 - Return the same ptr from hipIpcOpenMemHandle if it is called multiple times

* Move initialization outside of if statement

[ROCm/clr commit: e91cb4f320]
2025-04-10 11:20:36 +02:00
Stojiljkovic, Vladana e91cb4f320 SWDEV-505795 - Return the same ptr from hipIpcOpenMemHandle if it is called multiple times (#93)
* SWDEV-505795 - Return the same ptr from hipIpcOpenMemHandle if it is called multiple times

* Move initialization outside of if statement
2025-04-10 11:20:36 +02:00
Galantsev, Dmitrii 91be467cad Profiler - Fix eval fields
The 'value' pointer was being written to a lot and then used for reading
within the same function. This likely caused issues all over RDC when
reading the metrics.

This commit changes it so *value is written to only once.

Change-Id: I83c158c1e46c6ce46ff87d8a2e769f26ffa8c0da
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2025-04-09 20:06:21 -05:00
Galantsev, Dmitrii d87fe5bada Profiler - Fix eval fields
The 'value' pointer was being written to a lot and then used for reading
within the same function. This likely caused issues all over RDC when
reading the metrics.

This commit changes it so *value is written to only once.

Change-Id: I83c158c1e46c6ce46ff87d8a2e769f26ffa8c0da
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rdc commit: 91be467cad]
2025-04-09 20:06:21 -05:00
GunaShekar, Ajay fc1d9a1c10 SWDEV-523281 - hipLaunchKernelExC nvidia impl (#5)
[ROCm/hipother commit: 27b12ec7cc]
2025-04-09 15:39:39 -07:00
GunaShekar, Ajay 27b12ec7cc SWDEV-523281 - hipLaunchKernelExC nvidia impl (#5) 2025-04-09 15:39:39 -07:00
ajanicijamd afec56b7ff Added ctest for NIC performance profiling (#143)
Added two new tests: nic-performance and validate-nic-performance-perfetto
- For ticket: SWDEV-516739

[ROCm/rocprofiler-systems commit: 11fe6a8ebb]
2025-04-09 17:38:46 -04:00
ajanicijamd 11fe6a8ebb Added ctest for NIC performance profiling (#143)
Added two new tests: nic-performance and validate-nic-performance-perfetto
- For ticket: SWDEV-516739
2025-04-09 17:38:46 -04:00
David Galiffi 07d2e46bf3 Disable AUTOREQ and manually add requirements. (#160)
- The amd-smi-lib package is not providing libamd_smi.so in its specs. We need to add a package dependency instead.
  - For ticket: SWDEV-525268
- Add support for `ROCM_DEP_ROCMCORE` in CMake

[ROCm/rocprofiler-systems commit: eaad295cfc]
2025-04-09 17:15:24 -04:00
David Galiffi eaad295cfc Disable AUTOREQ and manually add requirements. (#160)
- The amd-smi-lib package is not providing libamd_smi.so in its specs. We need to add a package dependency instead.
  - For ticket: SWDEV-525268
- Add support for `ROCM_DEP_ROCMCORE` in CMake
2025-04-09 17:15:24 -04:00
Sajina PK 04fb7e4fe7 RocJpeg cmake and document fixes (#157)
- Fix for rocjpeg sample cmake due to changes in the rocJPEG project
- Fix for rocprofiler-sdk version check - change the format
- Edits to docs for jpeg and vcn activity support - mention that these values may not be supported on all ASICs.

[ROCm/rocprofiler-systems commit: fad3a0d341]
2025-04-09 16:20:02 -04:00
Sajina PK fad3a0d341 RocJpeg cmake and document fixes (#157)
- Fix for rocjpeg sample cmake due to changes in the rocJPEG project
- Fix for rocprofiler-sdk version check - change the format
- Edits to docs for jpeg and vcn activity support - mention that these values may not be supported on all ASICs.
2025-04-09 16:20:02 -04:00