c00ea79756
SWDEV-2 - Change OpenCL version number from 3336 to 3337
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[ROCm/clr commit: 7535199f78
2021-08-22 23:56:07 -07:00
c3be453fe6
SWDEV-290685 - Dispatch a barrier packet with acquire system scope to ensure ordering before a hipStreamWrite()
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Change-Id: I8853ad86a6634d55a98173ca3f79d93b85c08f85
[ROCm/clr commit: e4ddb5e08a
2021-08-22 23:56:07 -07:00
63c9d061b7
SWDEV-2 - Change OpenCL version number from 3335 to 3336
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[ROCm/clr commit: 66ccdf6fb5
2021-08-22 23:56:07 -07:00
4def94c516
SWDEV-273235 - Remove dependency on ADL
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Currently ADL is only being included if we build HSAIL and not LC. The
only configuration that does this is Ellesmere on Linux.
As the appprofile logic doesn't do anything right now, it should be
safe to remove it.
Change-Id: I13ce8c27af08c25b95edcbfd2ee1ce447b0bfd39
[ROCm/clr commit: 6ff4839d76
2021-08-22 23:56:07 -07:00
0104c5817c
SWDEV-292820 - Add a new notify lock
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HSA signal calback may occur during the actual marker submit. That
may cause a deadlock, because shared lock_ object. Create the new
notify_lock_ field to protect the notification.
Change-Id: I9752af84e59895530620fac3932c6fc276de8658
[ROCm/clr commit: f34c1b9ff8
2021-08-22 23:56:07 -07:00
c047842635
SWDEV-2 - Change OpenCL version number from 3334 to 3335
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[ROCm/clr commit: 56d9240da4
2021-08-22 23:56:07 -07:00
d873da3b79
SWDEV-273235 - Restore missing LinuxPro option
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Change-Id: Iccc0206f3f2c5b3c03f6ed313537f0f364a4ca29
[ROCm/clr commit: 970bc2c4f5
2021-08-22 23:56:07 -07:00
dede35bf8c
SWDEV-2 - Change OpenCL version number from 3333 to 3334
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[ROCm/clr commit: ed7675ce51
2021-08-22 23:56:07 -07:00
49f0546637
SWDEV-293742 - Update copyright end year VDI repo
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Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261
[ROCm/clr commit: d96481fb36
2021-08-22 23:56:07 -07:00
864b2ae76e
SWDEV-2 - Change OpenCL version number from 3332 to 3333
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[ROCm/clr commit: b065eb2d00
2021-08-22 23:56:07 -07:00
ce26a73ca9
SWDEV-260448 - Honor NUMACTL for Direct Dispatch
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Setting AMD_CPU_AFFINITY=1 will keep Async Handler thread within the
bounds set by numactl.
Change-Id: Id01b30df5127d65c29ac072bf74a04986b7128de
[ROCm/clr commit: cd21af757e
2021-08-22 23:56:07 -07:00
e58a6f3502
SWDEV-289378 - Avoid CPU TS overwrite if GPU TS is available
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Change-Id: I444ec284669b6a6fff31182e213b47c562c90192
[ROCm/clr commit: f4032401cf
2021-08-22 23:56:07 -07:00
b5c9af9b52
SWDEV-289378 - Avoid CPU TS overwrite if GPU TS is available
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Change-Id: I2fc1a43c048b4fa1e42f27c4cf5c72fc7ae84e9c
[ROCm/clr commit: 4fd506cfe1
2021-08-22 23:56:07 -07:00
c1c9ba86f3
SWDEV-2 - Change OpenCL version number from 3331 to 3332
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[ROCm/clr commit: 50a50c66b9
2021-08-22 23:56:07 -07:00
e65cae7c46
SWDEV-286322 - Add .gitattribute
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Change-Id: I4ae4c4498765f10c98bb5f2443a083463b0e25af
[ROCm/clr commit: ed0e7f659d
2021-08-22 23:56:07 -07:00
74ee98584f
SWDEV-2 - Change OpenCL version number from 3330 to 3331
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[ROCm/clr commit: 1d9bf4f0b9
2021-08-22 23:56:07 -07:00
e23597d4a4
SWDEV-285333 - Introduce Address sanitizer hostcall service
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Change-Id: Id29aacd09d0a9934a027446c57c7095804e1a454
[ROCm/clr commit: c11c02f2c7
2021-08-22 23:56:07 -07:00
c073813460
SWDEV-2 - Change OpenCL version number from 3329 to 3330
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[ROCm/clr commit: ffa29fad01
2021-08-22 23:56:07 -07:00
a738f7957b
SWDEV-292018 - Avoid marker if queue is empty
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Change-Id: I40a42d67d2c911d2c9a0bf425f36bc795f9539c0
[ROCm/clr commit: 6ab8dcc682
2021-08-22 23:56:07 -07:00
6c612d8ce7
SWDEV-274815 - [PAL] Navi24 support
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Change-Id: I934797bda471618c3f69484a1552b37345ae638b
[ROCm/clr commit: f6c00765e7
2021-08-22 23:56:07 -07:00
c393c3ff8d
SWDEV-2 - Change OpenCL version number from 3328 to 3329
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[ROCm/clr commit: a58ef5dd8f
2021-08-22 23:56:07 -07:00
f63a008110
SWDEV-287088 - Workaround VM page fault on Windows
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Some chunk memory are not guaranteed to be resident during
initial allocation. Use CPDMA to force resident.
Change-Id: If1a2da3e75f136caaa4c7a29d8f604d6af2639fa
[ROCm/clr commit: b793811ef6
2021-08-22 23:56:07 -07:00
a7c6b2d463
SWDEV-290901 - update ROC_ACTIVE_WAIT_TIMEOUT to 50us
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Change-Id: Iba2f2bb882c4786a432a523cb0954761e5359e7f
[ROCm/clr commit: 20e2153e8b
2021-08-22 23:56:07 -07:00
473d53f1f2
SWDEV-2 - Change OpenCL version number from 3327 to 3328
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[ROCm/clr commit: 4e8c55829b
2021-08-22 23:56:07 -07:00
9f03f68a8a
SWDEV-290160 - Switch to global HSA signals
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Runtime can't assign internal HSA signals for HIP events, because
HIP application can destroy the HIP stream or signal reuse may
occur internally. Switch to global HSA signals for HIP events.
Change-Id: Ieaea2d6b039e492b2e7c5112782a8f4e601e50a1
[ROCm/clr commit: ce8dad2ecc
2021-08-22 23:56:07 -07:00
bfc21e4a59
SWDEV-290122 - OpenGL tests fails with CL_MEM_ALLOCATION_ERROR
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Change-Id: I34d7063f05dd46c32cf59a88c455691ba5099679
[ROCm/clr commit: b5b1ccc990
2021-08-22 23:56:07 -07:00
d984c8ee22
SWDEV-2 - Change OpenCL version number from 3326 to 3327
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[ROCm/clr commit: 2dd18dc004
2021-08-22 23:56:07 -07:00
14a113f69d
SWDEV-247372 - Add logging for debug
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Change-Id: Id5a27034005a7deba37072d8a4c6f250104a96c8
[ROCm/clr commit: 8e08880cc3
2021-08-22 23:56:07 -07:00
83dccf9010
SWDEV-2 - Change OpenCL version number from 3325 to 3326
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[ROCm/clr commit: 82e572c23f
2021-08-22 23:56:07 -07:00
dfbdbfecb5
SWDEV-240806 - Release resources in Command::terminate for HIP
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We do not want to release resources during setStatus in HIP because of Graphs
Change-Id: Idc7b188ab5f8be6975ea91005dd2bbf177401f8c
[ROCm/clr commit: 133287f31f
2021-08-22 23:56:07 -07:00
863a43abfc
SWDEV-290160 - Don't send notification for batch markers
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Batch marker already has a barrier with HSA signal callback
Change-Id: I69fc63d72320c2e9cc2d2e59ebd3f07c0bd0e3b5
[ROCm/clr commit: c49f1069ab
2021-08-22 23:56:07 -07:00
b5b4da24dd
SWDEV-2 - Change OpenCL version number from 3324 to 3325
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[ROCm/clr commit: 83ca0821af
2021-08-22 23:56:07 -07:00
cb9ec048f5
SWDEV-286446 - This patch enables stream operations on vega10, vega20, MI100 and MI200
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Change-Id: I6f07036d8ee6e4c6b55196a13288f8107488d824
[ROCm/clr commit: b2a1dc26ba
2021-08-22 23:56:07 -07:00
fa325ead15
SWDEV-2 - Change OpenCL version number from 3323 to 3324
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[ROCm/clr commit: eaf0da8af3
2021-08-22 23:56:07 -07:00
8436f3ff1b
SWDEV-247372 - Reset hasPendingDispatch
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Reset hasPendingDispatch_ if we insert barrier for time marker.
Change-Id: Id038fd4e1c910c0a657978fee00630e49c372321
[ROCm/clr commit: d3213eca90
2021-08-22 23:56:07 -07:00
a2d99a14e9
SWDEV-2 - Change OpenCL version number from 3322 to 3323
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[ROCm/clr commit: b5528c8121
2021-08-22 23:56:07 -07:00
e1b277f4ce
SWDEV-290474 - [Lnx][VanGogh] Add VanGogh support
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Signed-off-by: Aaron Liu <aaron.liu@amd.com >
Reviewed-by: Christophe Paquot <christophe.paquot@amd.com >
Change-Id: Iff0253a181bbfc1984304014a9e3b542b2556635
[ROCm/clr commit: fe2d7424e5
2021-08-22 23:56:07 -07:00
9da54443dd
SWDEV-290371 - Add lock protection for signal
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Add lock protection for signal processing
If signal is reused, then disable reference to it from HIP
Increase the pool signal size to 32
Change-Id: I7d529b35910f83ce577c9eca6d3386759611ccc0
[ROCm/clr commit: a1629cad26
2021-08-22 23:56:07 -07:00
8919f9f434
SWDEV-286092 - Use Barrier Header for event
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Change-Id: I9701fbab587e2ea31e58449e8c8b07341a7aa161
[ROCm/clr commit: 0af6ba9428
2021-08-22 23:56:07 -07:00
5e002ce6f0
SWDEV-290306 - [LNX][Navi24][mainline]clinfo test failed on Navi24
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Add Navi 24 support
Change-Id: I7343384cf6fb8c532321e57e202c196ef054f459
[ROCm/clr commit: b818301d53
2021-08-22 23:56:07 -07:00
9a3e9c9ad3
SWDEV-247372 - Active wait timeout env var
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- Create an env var ROC_ACTIVE_WAIT_TIMEOUT to set active wait timeout
- Record profiling informaion if marker_ts_ property is valid.
Change-Id: If0d8aec8d9b0715027cf0f7c3dc8a4c722a6bae6
[ROCm/clr commit: b416ad7b9d
2021-08-22 23:56:07 -07:00
f15554c73d
SWDEV-2 - Change OpenCL version number from 3321 to 3322
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[ROCm/clr commit: 3b9b874947
2021-08-22 23:56:07 -07:00
4f76f0293d
SWDEV-289250 - Should return a nullptr for PAL so we can assume it's a host ptr
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Change-Id: I530eb39104bbe727c3e38186f6db4e64285b3fc8
[ROCm/clr commit: 8b22111f4b
2021-08-22 23:56:07 -07:00
b8de199652
SWDEV-276396 - Implement hipDeviceReset
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Add a Purge function to MemObjMap
Change-Id: Iac51dfda9a7b7c45f2f4a0dc35f7a623121aba1a
[ROCm/clr commit: d13581efa7
2021-08-22 23:56:07 -07:00
a9abd850ea
SWDEV-284671 - Add HW event wait to improve hipDeviceSynchronize
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If AMD event contains a reference to a HW event, then runtime
could check/wait for HW event. CPU status update will occur later
after HSA signal callback, but it's not important for the result.
Change-Id: I591391a953bbdba6a25ac07e2cd98aeb17cd4596
[ROCm/clr commit: 85c70a7495
2021-08-22 23:56:07 -07:00
8d7a745246
SWDEV-2 - Change OpenCL version number from 3320 to 3321
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[ROCm/clr commit: 5fdf5d05df
2021-08-22 23:56:07 -07:00
de280603a7
SWDEV-289548 - [PAL] Revive Raven 2 support
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Revert back to using the Raven (gfx902) target ID for Raven 2 (gfx909).
This is due to the HSAIL compiler not supporting gfx909.
In theory there should be no issue with running Raven isa on Raven 2.
Change-Id: I425edebc99075799eda5522fad231b8fb3184873
[ROCm/clr commit: 0b1481d4f1
2021-08-22 23:56:07 -07:00
265747f004
SWDEV-2 - Change OpenCL version number from 3319 to 3320
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[ROCm/clr commit: 957b73c39e
2021-08-22 23:56:07 -07:00
c952deaace
SWDEV-286092 - Enable handler for marker always
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For DD, send a NOP packet so that we leverage the handler to indicate
completion.
Change-Id: Ie57ea0124a8497d39cc49da1c4575c2cd86b9319
[ROCm/clr commit: 9d0846e732
2021-08-22 23:56:07 -07:00
59a8423e04
SWDEV-2 - Change OpenCL version number from 3318 to 3319
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[ROCm/clr commit: 9dfc938118
2021-08-22 23:56:07 -07:00
Chauncey Hui
Sourabh Betigeri
Vladislav Sytchenko
German Andryeyev
agunashe
Saleel Kudchadker
jujiang
pvellien
Jason Tang
Anusha GodavarthySurya
Alex Xie
Christophe Paquot
Aaron Liu
Arya.Rafii