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Gráfico de cometimentos

16 Cometimentos

Autor(a) SHA1 Mensagem Data
Tao Sang 163e44d0a8 SWDEV-555889 - Support mipmap on rocr (#2082)
* SWDEV-555889 - Support mipmap on rocr

Support mipmap in hip-rt on rocr backend.
Enable all mipmap tests in Windows.
Some other minor improvement.

Add some SRD logs that will be removed finally.

* Add sampler.mipFilter to fix sampler issues on mipmap in rocr.
Fix format issues of view of leveled image and  mipmap image in blit kernel in rocr.
Enabled disabled mipmap tests.

* Rewrite view logic

* Set word4.f.PITCH = 0 for mipmap SRD on navi31 to fix unstable test issues.
Reset last error in nagative tests.

* Remove SRD dump log from hip-rt
Let Rocr mipmap log be in condition.

* minor format chang

* Exclude mipmap tests for mi200+ which don't support mipmap.
2026-01-21 09:10:29 -08:00
Apurv Mishra be375c2dbf rocr: Add support for Mipmapped Array (#1847)
SWDEV-539526 - Add support for Mipmapped Array in Rocr

Add support for Mipmapped Array functionality in Rocr Runtimeenabling GPU applications to work with multi-level texture mipmaps. The implementation introduces new public APIs for creating, querying, and managing mipmapped arrays across different GPU architectures.

Signed-off-by: Apurv Mishra <Apurv.Mishra@amd.com>
Co-authored-by: Shweta Khatri <shweta.khatri@amd.com>
Co-authored-by: taosang2 <tao.sang@amd.com>
2026-01-08 17:14:39 -06:00
Mario Limonciello bc5d48e76c Run pre-commit's whitespace related hooks on projects/rocr-runtime (#2130)
* Run pre-commit's whitespace related hooks on projects/rocr-runtime

In order for pre-commit to be useful, everything needs to meet a common
baseline.

Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>

* Add missing semicolon which would block compilation on big endian CPUs

Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>

---------

Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
2025-12-08 07:56:50 -06:00
MachineTom 3b1c0c3464 SWDEV-558845 - Support image in rocr on Windows (#1582)
Enable image build in Windows.
Remove some useless codes that fail building in Windows.
Some minor improvement.
Temporarily exclude mipmap test files.
Prevent negative tests affect some tests.
Move some catch info log codes into failed cases.
2025-11-05 09:33:41 -05:00
taosang2 a5de0f048d rocr: Support different address modes
Support different address modes in X, Y, Z directions

Change-Id: If1db5a8af33c92ddc4b48968c3d8eceb97daea6a


[ROCm/ROCR-Runtime commit: df250a49a5]
2024-12-02 09:07:56 -05:00
Chris Freehill b617b05c2a rocr: Ensure globals are initialized at first use
When ROCr is built as a static library, global variables
were often not initialized to valid values at their first
use. This change addresses that problem.

Change-Id: I550fa41feb3bc04b9cc686bcfb4acf2a7b651a88


[ROCm/ROCR-Runtime commit: 9b13bcd0ac]
2024-10-16 23:19:48 -04:00
David Belanger f5d734fcf4 Implement AddrLib support for GFX12
Add new files image_manager_gfx12.{h,cpp}.

Implement BUF/IMG/SAMP desc changes for GFX12.

Implement compute surface info code using AddrLib3 API (new starting
from GFX12).

Implement algorithm for choosing "best" swizzle mode (starting
from AddrLib3/GFX12, AddrLib provides only list of suitable swizzle mode,
up to client, ROCr, to choose the best).   Algorithm implemented follows
behaviour in GFX11 and behaviour for GFX12 on other platforms.

Signed-off-by: David Belanger <david.belanger@amd.com>
Change-Id: Ib344c86228a98bbac5acdab421ee2ef9b1e84eef
Signed-off-by: Chris Freehill <cfreehil@amd.com>


[ROCm/ROCR-Runtime commit: f8a015f53e]
2024-06-25 12:27:09 -05:00
David Yat Sin 523bdde26f Add env variable to print image SRD contents
Add environment variable HSA_IMAGE_PRINT_SRD to print contents of SRD
registers for image functions

Change-Id: Ifb47a73dcfad8745ee7445e20de96e1021b80bd6


[ROCm/ROCR-Runtime commit: a4f898ad15]
2023-01-13 11:01:04 -05:00
David Yat Sin 406115eaac Revert "Correct limit query return type to match spec ABI."
This reverts commit 689e9ce6a4.

Changing the parameter sizes breaks backward ABI.

Change-Id: Iff14b7c11294f0931f36fcfd42fff11a492d4205


[ROCm/ROCR-Runtime commit: b9d1ad8604]
2022-11-14 19:13:58 -05:00
Sean Keely 689e9ce6a4 Correct limit query return type to match spec ABI.
Change-Id: I2eeed1f4b79d10c7d9ab0fd36c0146063053c76a


[ROCm/ROCR-Runtime commit: 7826d4ca2d]
2022-10-04 01:48:26 +00:00
David Yat Sin 63b4fe36dd Add new ImageManager for GFX11
Adding new ImageManager class for GFX11 GPUs

ImageManagerGfx11 functions copied from ImageManagerNv.
Register descriptions in resource_gfx11.h updated for gfx11.

Signed-off-by: David Yat Sin <david.yatsin@amd.com>
Change-Id: I48b39f6a633aef14aa829f7240a43fe0feb1c290


[ROCm/ROCR-Runtime commit: 907e05c1b3]
2022-08-03 10:57:09 -04:00
Sean Keely abd712f33f Update copyright date.
Change-Id: If4bf4c20cf051878bfe759080bb7345d884dd53d


[ROCm/ROCR-Runtime commit: ce19721c88]
2020-06-19 22:34:01 -04:00
Ramesh Errabolu ab6b820dbf Update License header and Cleanup IP references
Change-Id: I0a6636e1d8457045d034d05383cfb5d4e7680fee


[ROCm/ROCR-Runtime commit: 42b38daa22]
2020-06-19 22:33:36 -04:00
Ramesh Errabolu c9f453a8a8 Build ROCr core and image libraries as one shared object
Change-Id: I3a16c1227e7db2e386ab33886965596fa0fb0c87


[ROCm/ROCR-Runtime commit: 0ca0691ca7]
2020-06-19 22:33:36 -04:00
Sean Keely 890e666011 Select a non-empty pool for image kernarg.
Zero size pools have no numa bindings.  Selecting a pool with numa
bindings should prevent thrashing due to numa balancing daemon.

Change-Id: Ib0082cb9af66e24e07a2adbb83c1045145d51403


[ROCm/ROCR-Runtime commit: 32bb10086d]
2020-05-28 23:34:42 -04:00
Sean Keely 1fc7f2dec7 Move Images code to hsa-runtime folder
Change-Id: I53c1845d985ac3e9708d952865009c0021f3bb4f


[ROCm/ROCR-Runtime commit: 7e3db20826]
2020-04-30 19:35:57 -05:00