Commit Graph

680 Commits

Author SHA1 Message Date
Saleel Kudchadker c9dd95bf6c SWDEV-504494 - Use system scope for D2H
- When using shader copy, make sure to use release scope for the AQL
  packet. This is a potential bug but is hidden as hipMemcpyAsync always
needs synchronization(which inserts a barrier with release scope). For
hipMemcpy we use a barrier packet to make sure its blocking. Eitherways
a barrier gets always used and hides in some ways a potential bug.

Change-Id: I57fb7f769c3179e76d712471c0905104c801d7ba
2025-01-10 00:34:08 -05:00
Evgenii Averin b62995ce1a SWDEV-505769 - Fix typo
Change-Id: I2d3f65ed68157718c4439a9da7d2dcdfcbb9f93d
2025-01-08 21:31:17 -05:00
Sourabh Betigeri f5b2516f5d SWDEV-505971 - Fix size mismatch of count type to uint32_t
Change-Id: Ie526f828f816e6681ef1735d5edb2db895dace57
2025-01-08 12:47:36 -05:00
Saleel Kudchadker b63005d550 SWDEV-504494 - Flush to systemscope when copying non-coherent mem
- When we use blit(compute) copies, two subsequent copies may read for
  the same source buffer, the buffer may get modified by the host in
between and if the src buffer was allocated with non-coherent flag, the
device may simply use stale value from previous cacheline fetch. This is
a corner case.

Change-Id: I2ce261c6f6fa4e5bb608f116548e5cc711ae6f3c
2025-01-07 12:49:22 -05:00
Jatin Jaikishan Chaudhary 446ed661a0 Revert "SWDEV-505971 - change setArgument arg from uint32_t to uint64_t"
This reverts commit a6f2a2c2af.

Reason for revert: There needs to be memcpy size change

Change-Id: If4f51769731e54743ac705b19b4f81b2d5925d5a
2025-01-06 18:03:23 -05:00
Jatin Chaudhary a6f2a2c2af SWDEV-505971 - change setArgument arg from uint32_t to uint64_t
We are passing this arg as an address, and memcpy complains about
overreading (8 bytes instead of 4).

Change-Id: Ica9207f6c5f6056a4bfc968280c76e779ded13ae
2025-01-06 08:16:59 -05:00
Pengda Xie 8155943c5f SWDEV-505833 - Provide functionality to avoid L2 flush for CPX mode for dispatch packets
- Added DEBUG_CLR_SKIP_RELEASE_SCOPE flag to force release scope to
   SCOPE_NONE in AQL packet header

Change-Id: Ife02cddb9d5cd4749103ce585d3d5fe9024c6868
2025-01-03 17:28:21 -05:00
Amit Pandey 11cd37ce0b SWDEV-490256 - Fix uri_decode logic to handle Memory URI.
Uri decoder logic currently silently ignores processing of memory uri.
This patch enables the existing logic to handle the processing of offset
and size related to loaded code-object having memory URI.

Change-Id: If03579cefb11d91f667410464dc89404df9270a3
2024-12-25 11:07:16 -05:00
taosang2 d82d6a78cf SWDEV-479958 - Support different address mode
Support different address modes in X, Y, Z directions

Change-Id: If1db5a8af33c92dd14b48968c3e8eceb97daea6c
2024-12-23 16:39:54 -05:00
Saleel Kudchadker fa63919a63 SWDEV-504340 - Move cast of cl_mem inside the condition
Change-Id: I9c91f5d945a8d8bd2b2f55e3d11ede66afe4eef7
2024-12-17 12:58:12 -05:00
Pengda Xie 078fe7e5de SWDEV-503764 - Add wptr and rptr to ClPrint for dispatch barrier methods
- added wptr and rptr to ClPrint in dispatchBarrierPacket and dispatchBarrierValuePacket

Change-Id: I8a62289deb23c9f657a9b0ac6138bb55eafecba2
2024-12-16 16:45:30 -05:00
Ioannis Assiouras a808c4b23a SWDEV-489255 - Update stack size limit in rocvirtual
Change-Id: I2aac9d211f64b3d6c121d8b010d215dcbdeac3aa
2024-12-16 09:30:39 -05:00
Saleel Kudchadker 93f1e8ff60 SWDEV-301667 - Clear dispatch indicator signal flag
Change-Id: I9028df0bb73289791d169e7f064a1d0f615236a5
2024-12-12 21:20:05 -05:00
Sourabh Betigeri 03dbcd8ca7 SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs
Change-Id: I5ac63a6626af8c2b4ac382c52dfe1aaf0b3716b8
2024-12-12 19:29:24 -05:00
Michael Xie cfcc743824 SWDEV-499997 - Unify ManagedBuffer and KernelArg buffer implementation
Change-Id: I95421c87904dd62d7ee214539a57c7bda1097ff4
2024-12-12 12:56:23 -05:00
German Andryeyev 14f58fc74d SWDEV-501757 - Clean-up signal creation
Use hsa_amd_signal_create() if settings.system_scope_signal_ is true.

Change-Id: I6d440155dfbcd5bf03658583a93827cb1c56537c
2024-12-11 09:57:50 -05:00
German Andryeyev f4b9d3b7bd SWDEV-501757 - Use signals without interrupts
In active wait mode use signals without interrupts by default and switch
to the interrupts only if a callback is required.

Change-Id: Ibcde8f7d44c70f8fb8fa5e0a7fdd8b08a2982a8e
2024-12-09 15:16:15 -05:00
Saleel Kudchadker 7863eb92dc SWDEV-497145 - Use rocr copyOnEngine API for staged copies
- Refactor blit code and clean ASAN instrumentation
- Use unified function for rocr copy
- Enable shader copy path for unpinned writeBuffer/readBuffer paths
- Set GPU_FORCE_BLIT_COPY_SIZE=16 which means we will use BLIT copy for
  pinned copies or unpinned H2D/D2H copies < 16KB

Change-Id: I42045cca79234b340dbf53dafb93044199736ae4
2024-12-04 13:38:13 -05:00
Sourabh Betigeri 2ca644cf22 Revert "SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs"
This reverts commit bd5d8e9baf.

Reason for revert: hipInfo fails on windows. Updating llvm amd-mainline-closed

Change-Id: I57e1fa1945188b0bc0a799c4f3d540f2b7713003
2024-12-02 16:46:12 -05:00
Sourabh Betigeri bd5d8e9baf SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs
Change-Id: I449ffca44bbb04d13348d112e896d603c70fd485
2024-11-30 17:54:32 -05:00
Anusha GodavarthySurya 06e6561eb5 SWDEV-489084 - Avoid using queue colliding with the graph launch stream
Change-Id: I3ecaf8836c8e0883441275139041c702aba0937e
2024-11-29 08:15:58 -05:00
Anusha GodavarthySurya 9820480cbd SWDEV-491643 - AQL packets are captured for kernels disable sdma profiling
hsa_amd_profiling_async_copy_enable is taking 45us for the first call. Disable sdma profiling for enqueuing captured kernel packets and for accumulate command.
Change-Id: I80b51a58c46bccc9c1025e9331515f57c97b5a2a
2024-11-26 08:37:31 -05:00
Saleel Kudchadker 2273a1dbdc SWDEV-497886 - Fix unaligned size copy for kernel args
Change-Id: If6675b98178aeb35f376d6994555cbf941b048c3
2024-11-21 14:30:04 -05:00
German Andryeyev e2eeb20c00 SWDEV-494231 - Revert TS optimization
Runtime may use checkGpuTime() for the wait and not just for the GPU time queries. Hence, the call can't be skipped if profiling isn't enabled.
More changes are required for this optimization.

Change-Id: I79e8918312e755d75f0d26685f2fdc604a8ffb18
2024-11-19 10:17:38 -05:00
Saleel Kudchadker f1e98ab6e4 SWDEV-483586 - Do not take pinned path for read/write
- When GPU_FORCE_BLIT_COPY_SIZE is set do not take pinned path

Change-Id: Iaa065db63cc8fda61f82e6c9701e9fdaec5c54cb
2024-11-01 12:55:15 -04:00
Satyanvesh Dittakavi a26dc29eb9 SWDEV-491967 - Add the right VGPRs per SIMD and VGPR Granularity for gfx12
- Default values are being assigned causing occupancy calculation to go
wrong without the right values defined for gfx12 ASICs
- Also added the these values for gfx1105

Change-Id: I611cc3a8ed8c57f2def637310ce1c3a48c16a574
2024-11-01 12:47:23 -04:00
Konstantin Zhuravlyov 3387f48b56 SWDEV-428601 - Don't enforce 1 isa per device in rocm backend
- Device can have multiple isas as per HSA spec
  - First isa is most specific one, so this change is sort of a NOP

Change-Id: Ib332af21745f2e6a7c25db8986bf7717501059bc
2024-11-01 11:01:02 -04:00
German Andryeyev 403f624bf8 SWDEV-486602 - Add tracking of HSA handlers
Add an atomic counter to track the outstanding HSA handlers.
Wait on CPU for the callbacks if the number exceeds the value
in DEBUG_HIP_BLOCK_SYNC env variable.

Change-Id: I95dc8c4bf0258c7e59411b7504220709ed6898c5
2024-10-25 15:20:50 -04:00
German Andryeyev dceb320ba7 SWDEV-440746 - Fix a typo with GPU_PINNED_XFER_SIZE
Change-Id: I8fdbfb4e1c6b1274206c28a529eee9ebeaaa26fb
2024-10-24 18:33:14 -04:00
Anusha GodavarthySurya b498103f9b SWDEV-485904 - propagate hsa_amd_vmem_address_free error to hip API
Unit_hipMemSetAccess_GrowVMM test fails with
HSA_STATUS_ERROR_RESOURCE_FREE silently

Change-Id: I7a78410e432de4a2e877062782abf8761645f392
2024-10-21 10:12:32 -04:00
German Andryeyev 364dfb0ed1 SWDEV-486602 - Optimize HSA callback performance
- Don't generate callbacks for HIP events
- Don't process profiling info in the callback for HIP events
- Wait for CPU status update of the submitted commands
every 50 calls. That will allow to drain the commands and
destroy HSA signals.

Change-Id: Ib601a350e7e7c2b6c6209a172385389baccf73a9
2024-10-11 14:50:25 -04:00
Todd tiantuo Li 41dc4545fc SWDEV-472357 - support Rect copy with staging buffer for 2D & 3D memcpy in PAL
Change-Id: Ie32f3e5a6fa077f6b2db20fc1ab1e2e0da8344cb
2024-10-10 18:00:19 -04:00
Jaydeep Patel 5ccc140e1b SWDEV-485866 - Return OOM if stream creation fails due to insufficient memory.
Change-Id: I4e57ecc81921bde274bb6a4e0890f0fc6a17955a
2024-10-10 00:44:54 -04:00
Saleel Kudchadker e36666e536 SWDEV-301667 - Enable ROCr logging
- Use AMD_LOG_LEVEL=5 to dump AQL packets in ROCr

Change-Id: I2c044a5304c4eaf3d3af20e62d1f54c98d4fbaa4
2024-10-04 19:22:12 -04:00
Saleel Kudchadker d3d0ca5fc6 SWDEV-478065 - Revert "SWDEV-478065 - Embed host thread in shared_ptr"
This reverts commit 4b03017e8a.

Reason for revert: This blocks multithreaded callbacks

Change-Id: I9944417e4fb63c9eea2b286c828c7dfa621c4fe8
2024-10-04 19:19:28 -04:00
Anusha GodavarthySurya 742b0210d3 SWDEV-477324 - Capture Memcpy1D pinned H2D D2H
Change-Id: I1f4744f20a9caeed005ec68da44e5fde737e09f7
2024-09-30 01:01:30 -04:00
Vladana Stojiljkovic da5f1a6146 SWDEV-482086 - Fix hipGraphInstantiate leak
* In a scenario where kernel is launched with hipExtLaunchKernelGGL and stop event is used, hipGraphInstantiate leaks. Since stop event is used, profiling is enabled and Timestamp (ReferencedCountedObject) is created, but it doesn't get released.
* The idea behind this solution is that profiling should be disabled when command is captured, hence the timestamp should not be created. Because information about capturing isn't available when kernel command is created, packet capturing state is used to determine whether to create a timestamp or not.

Change-Id: Ia23adac4592ded4fb5e236acf99e12e729f63692
2024-09-29 11:36:53 -04:00
German Andryeyev 29cc678d8d SWDEV-483586 - Unblock staging H2D transfers
Although unpinned copies require synchronizations
in HIP, runtime can avoid syncs for H2D copies with
a staging buffer

Change-Id: If2203c6bc0cbd89742823688dc8e89e9acd873b2
2024-09-21 10:25:27 -04:00
Maneesh Gupta 2d1c6ee23e SWDEV-485179 - Revert "SWDEV-459254 - Overwrite cacheline size to 256 for gfx12, as it is used for kernarg alignment."
This reverts commit 1f63650bf96e01e48f879aa58b80e2130dd4a567.

Reason for revert: <INSERT REASONING HERE>

Change-Id: I6d7ed87c09d9b77116548dce1f30ac4711c2c09d
2024-09-20 11:33:34 -04:00
kjayapra-amd 12a39fbf22 SWDEV-480772 - Remove name variable from amd::Monitor class.
Change-Id: Ie2a4fa44f485786227230f8a892e090e718aa30e
2024-09-19 11:55:01 -04:00
Rahul Manocha 07261002b1 SWDEV-439234 - Fix for Segfault in ValidateMemAccess
Change-Id: I251d277eb5af16ba5c0de85ffd142a5f64fa469d
2024-09-18 10:52:32 -04:00
Jatin Chaudhary 4b03017e8a SWDEV-478065 - Embed host thread in shared_ptr
This shows up in some valgrind runs. Make sure the resources are
released.

Change-Id: I34c25c00370a221585895655744831215136d5f4
2024-09-17 09:53:51 -04:00
kjayapra-amd d81c5d3d7f SWDEV-484188 - Change few std::array style globals to C style to avoid optimization on Static Libs.
Change-Id: Iab6d3c040b8d088013daa08093898be99dd3a971
2024-09-16 09:46:56 -04:00
Ajay c9955a1cea SWDEV-465215 - hipFuncSetAttribute hipFuncGetAttributes fixes
Change-Id: I2151e4470d63918ff6b809a8fdeaae5bea5cc899
2024-09-13 14:05:25 -04:00
Saleel Kudchadker 9de6d4d46c SWDEV-478624 - Use readback workaround to ensure kernel arg coherence
Use env var DEBUG_CLR_KERNARG_HDP_FLUSH_WA=1 to fall back to HDP flush
workaround. The default is 0

Change-Id: I7bdb9be61da60c30d15ac9991b7cd27351e1831c
2024-09-11 14:53:15 -04:00
Saleel Kudchadker abc80fcc2f SWDEV-301667 - Improve kernel logging
Change-Id: I4b2b1950e3ab7124fd41af9a92a677c48d6da5eb
2024-09-10 13:43:58 -04:00
Saleel Kudchadker 62a7fed90d SWDEV-481974 - Clear dependent signal bit for barrier value
Change-Id: I3ffda051fa8538970fbb1964beb1f538fce0782c
2024-09-10 13:43:04 -04:00
kjayapra-amd 6211037f63 SWDEV-439234 - Access check before memcpy and kernel operations.
Change-Id: I7057125c03460db205409e19980145298c190fe2
2024-09-06 14:30:00 -04:00
Rahul Manocha ddbd7039b0 SWDEV-478921 - Destroy Queue created by Coop Launch
Change-Id: I7f31ce05421479ff1de138cae26aafa071e956e2
2024-09-02 02:35:08 -04:00
Julia Jiang 417d3279f9 SWDEV-476623 - correct the format on the fix for clCopyImage
Change-Id: I3a3fb2eaa338ff4e298a43e583fcf94ec7cabdf6
2024-08-28 16:16:24 -04:00