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Yazar SHA1 Mesaj Tarih
systems-assistant[bot] be2e7314fa SWDEV-532473 - Add Pcie atomic support check to failing tests (#575) 
Co-authored-by: Rahul Manocha <rmanocha@amd.com>
 2025-09-09 09:01:25 -07:00
Danylo Lytovchenko f7338717ae SWDEV-470698 - fix formatting, add format check workflow (#657) 2025-08-20 19:58:06 +05:30
Tao Sang 2ad61701d5 SWDEV-503359 - Fix Unit_hipExtMallocWithFlags_CoherentTst 
Fix Unit_hipExtMallocWithFlags_CoherentTst hang on device fine
grain access memory because host builtin atomic functions malfunctions
on it.
Fix SWDEV-507938 also.
Change-Id: Ie26dbf6b7e5aa8cb898d11ae5ed5ecf1267c3228


[ROCm/hip-tests commit: 8ea926725b]
 2025-02-13 13:37:36 -05:00
taosang2 df2bcdb90f SWDEV-425830 - Add pcie atomic query in atomic tests 
Add code to query pcie-atomics in atomic tests.
If pcie-atomics is not supported, skip the tests.
Enable the tests for Nvidia GPUs as well.

Change-Id: I7bfc8600511d78d8c73ab526f9846cd268651278


[ROCm/hip-tests commit: fafcad9162]
 2024-03-19 20:15:06 -04:00
taosang2 c8c430709d SWDEV-419288 - Improve TstCoherency() 
Fix originally wrong logic.

Change-Id: Ia4d3d9ee3d5712ce2e8914afcc2846b88306c483


[ROCm/hip-tests commit: bc47bc35df]
 2023-11-06 09:15:40 -05:00
Satyanvesh Dittakavi 66ddcaae50 SWDEV-427345 - Address catch test failures 
Change-Id: Ie3abbb50e1a2d0563c63c7fbb2bf7f341ac3aaa6


[ROCm/hip-tests commit: 2d17c32468]
 2023-11-06 09:05:08 -05:00
ROCm CI Service Account a33bf1e10d SWDEV-308368 - Fix coherent test bugs (#2985) 
1. Remove hipDeviceAttributePageableMemoryAccess checking as it is used to check xnack+ rather than fine-grained synchronization.
Note: hipHostMalloc() will alloc memory with fine-grained access and atomic by default when env HIP_HOST_COHERENT=1. For more information, see hip_programming_guide.
2. Fix some other bugs.

Change-Id: Ieaaed1b15b4d258193d834104b17d9f03a9e4781

[ROCm/hip-tests commit: 15593f343d]
 2022-10-19 16:48:44 +05:30
Jatin Chaudhary a9f5e0bd3d Add missing tests for hipHostMalloc (#2566) 
[ROCm/hip-tests commit: 8b291f071a]
 2022-06-10 21:16:23 +05:30
ROCm CI Service Account 86f728efd2 SWDEV-329590 - Addresses coherency test failures on Navi21 (#2652) 
- Tests using HSA_XNACK=1 restricted to MI200
- Added checks to verify HMM and Pageable memory access attributes to avoid failures

Change-Id: Ic0b107264378ce0c4f0aab770c941ae2b57342c2

[ROCm/hip-tests commit: fb25b090eb]
 2022-05-17 11:31:19 +05:30
Maneesh Gupta 8cc181deaa Add missing checks in hipMemCoherencyTst.cc (#2442) 
Change-Id: I47f188345ec39ad216ee8dd92dc9d89d99ca2733

[ROCm/hip-tests commit: e1e4e30ffe]
 2022-01-06 16:23:09 +05:30
lthakur cfb30bc703 SWDEV-293806 - Adding tests to check behvior related to fine and coarse grain (#2402) 
Change-Id: Ia437adf138e6952ff42b6081c39da5bfaf931e53

[ROCm/hip-tests commit: 3fbea0cd5a]
 2021-11-25 15:11:10 +05:30