968f2e9489
enabled integer intrinsics tests
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Change-Id: I5d28d556f228240eda2fc0098121ed3b29b041e7
[ROCm/clr commit: 3f9a9d9318
2017-01-17 09:59:08 -06:00
d259da2e42
v1: Working on Integer Intrinsics
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1. Half way through
2. May not work
3. No test written
Change-Id: I705b743a78b142ff068e2521870e73fca7ad2b1c
[ROCm/clr commit: feba9fe213
2017-01-16 14:55:29 -06:00
65552aa2c5
moved most of the fp16 code inside hip_fp16.cpp
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1. As we use holder data structure, we move all the cmp, math, cvt apis to cpp file
2. All the tests passed
3. Add more extensive testing for half
Change-Id: I92c6399dace602a0a24432728e3f2a07124e6fb1
[ROCm/clr commit: e95456eee8
2017-01-16 12:32:35 -06:00
d9845446ef
Added type conversion intrinsics
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1. Added all type conversion intrinsics
2. NO TESTS have been added. (Will add in next commit)
3. Sanatized code in hip_runtime.h
4. Added passed() to hipTestHalf to make it pass on HIT
Change-Id: I0987963c802fc7ff4d7e07d7b88d86da35da53c9
[ROCm/clr commit: d496576b55
2017-01-16 12:10:05 -06:00
4756cf7c16
added half2 math operations
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1. They use SDWA + LLVM IR
2. Added these functions to test
3. Need to do exp, exp10, log, log10, rint
Change-Id: I06176acc6cb8bb054495310531777406a41b54e4
[ROCm/clr commit: eff68c989a
2017-01-13 12:27:11 -06:00
d1f7c4e048
added packed math fp16 native device functions
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1. Added SDWA implementation inside IR file
2. Added device functions to header + used them in test
Change-Id: Ib4e059a58eee201cc82438689e3e9bc5f9d26653
[ROCm/clr commit: eeef055469
2017-01-12 14:10:51 -06:00
5317ffa9ec
Started adding native half math library support
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1. Removed HIP_EXPERIMENTAL env variable so that device code will be accessed from LLVM IR
2. Removed soft support from headers and moved to hip_fp16.cpp
3. Added LLVM IR + inline asm to hip_ir.ll
4. Added test for fp16
5. Added barriers for hcc 3.5 and hcc 4.0 for half support
a. Which means, hcc 4.0 can parse __fp16 but hcc 3.5 cant
b. HCC 4.0 code is implemented now, hcc 3.5 will be added later
Change-Id: Ic37859b2688ebb02e168bab643d1882bf4727952
[ROCm/clr commit: c286bf6f8a
2017-01-12 11:30:20 -06:00
a86633f210
changed copyright year from 2016 to 2017 in src directory
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Change-Id: Idb97db509b2b4b1656b2df7a14a62ade38c9d574
[ROCm/clr commit: e9ff23e5f9
2017-01-11 18:05:41 -06:00
fe2d13c861
Added proper device data types
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Change-Id: I42029635ff68c3c13a764a3eda6447e6c77878c6
[ROCm/clr commit: 4e57822d95
2017-01-11 15:06:25 -06:00
13bf4c39cc
Add HIP_MAX_QUEUES feature.
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Includes some tricky manipulation of the locks for contexts and streams.
issue is that stealing a stream requires we lock the context to
walk the streams to find a victim. To avoid deadlock, we can't
have a stream locked when we lock the context. This implementation
releases the stream lock, then acquires the context and selects the
victim.
A more stable implemenation might be to copy the stream list
from a context so that a lock is not required to walk all streams.
Smart shared_ptr could be used to prevent the streams from being
deallocated during the walk.
[ROCm/clr commit: b29fbf736d
2017-01-09 21:02:56 -06:00
82cf0397c5
First pass at virtualized queue support.
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Also updated stream debug messages to consistently use trace_helper.
[ROCm/clr commit: c9f5fe34e6
2017-01-09 21:02:53 -06:00
9d22c4f727
tolerate spaces in hip args
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[ROCm/clr commit: 49d1477b9d
2017-01-09 20:57:13 -06:00
0aabd435a9
Added state for hipDevice.
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Change-Id: Idbc3c04cd054a01b634856a1e0a23ff172e991aa
[ROCm/clr commit: 090eadd0bd
2017-01-09 23:54:01 +05:30
4ad8744139
Support size_t in memset kernel.
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Add disable for HSA_AMD_AGENT_INFO_MAX_WAVES_PER_CU
Remove one copy of completion_future in memset.
[ROCm/clr commit: fd5b0c68b1
2016-12-22 12:25:09 -06:00
693bfc85bc
Increment API sequence number.
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Change name to tls_tidInfo
[ROCm/clr commit: cf338d716b
2016-12-21 15:30:36 -06:00
7121e56949
Fix for HCSWAP-67
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Change-Id: I0b2ce5ab933237947fb41d89769db3da16e5be6a
Conflicts:
src/hip_hcc.cpp
[ROCm/clr commit: 4988975b59
2016-12-19 16:19:51 +05:30
8ab567e331
Add name for function
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[ROCm/clr commit: 5d815937de
2016-12-17 08:54:09 -06:00
c59c82916a
Remove HSA dependency from hipFunction_t
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Place _groupSegmentSize and _privateSegmentSize inside Function,
remove hsa_executable_symbol_t.
[ROCm/clr commit: 2bd70ff345
2016-12-17 07:22:56 -06:00
a3064807b5
Remove USE_DISPATCH_HSA_KERNEL=0 path.
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[ROCm/clr commit: 06d382bc6d
2016-12-17 07:22:56 -06:00
68d861e8c5
Refactor Module and Function APIs.
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- hipFunction_t is now returned by value. This eliminates dynamic
allocation / memory management complexity in the module. Removed
the kernel
name so the structure is just 16 bytes now.
- Moved the hsa_executable_load_module and hsa_executable_freeze
calls to the hipModuleLoad and hipModuleLoadData calls.
- Apply sharedMemBytes in hipModuleLaunchKernel to group segment
size (not private).
[ROCm/clr commit: 3f9404d0e1
2016-12-17 07:22:33 -06:00
8acb6a623d
Mapped hipDevice_t to int
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Change-Id: I6cfa56c42b7cd04aa0e0bce510c0d72d34ea211a
[ROCm/clr commit: bddaa0e81c
2016-12-17 16:53:03 +05:30
3e3db78eb0
disabled half native support as inline asm is not working
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Change-Id: I3073d8ae39eed321987f0f2f0e689eec4cdbb48c
[ROCm/clr commit: c673aec971
2016-12-16 09:24:59 -06:00
8288cbdae4
fix copyright
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[ROCm/clr commit: b53ba931e8
2016-12-15 14:42:52 -06:00
1844a95003
fixed compilation issues
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Change-Id: I96692538736e2e4f2da9dba9c8c29a164aec4c0d
[ROCm/clr commit: a1d1fcfdac
2016-12-14 16:50:16 -06:00
657739b19f
added half2 support
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Change-Id: I0f3b9b7037fed97e80ec99f5369c75a63f001aae
[ROCm/clr commit: c20a86d866
2016-12-14 14:18:48 -06:00
a86ef4e577
added simple half math ops
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Change-Id: I10b1d1023a9e5f2ba63f28c4a2bbe60ee49a8aee
[ROCm/clr commit: 01ed8e91e9
2016-12-13 20:20:58 -06:00
b26857a631
disabled compiler flag hcc 4.0 for half support
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Change-Id: I32175113f4c05d43310b3a05c2a14e12f6d48b09
[ROCm/clr commit: 26934a920c
2016-12-13 20:06:56 -06:00
1f638c1da6
Add USE_IPC to disable use of IPC APIs. Set to 0.
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[ROCm/clr commit: 5eed20be12
2016-12-13 15:07:04 -06:00
9691299b0d
added few type reinterpret cast device functions
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1. __int_as_float
2. __hiloint2double
Change-Id: Id247c196887b24a12090f0521bf91e13afeec733
[ROCm/clr commit: 7a712aa76b
2016-12-13 14:41:36 -06:00
c865d93792
added half math addition ISA support
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Change-Id: I293b771f695b499b795d7e53f600c9e4fe2a2071
[ROCm/clr commit: 02eab122c5
2016-12-13 09:18:34 -06:00
4c61746162
Changed threadfences to match target parsing by hcc
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Change-Id: I28fcabbaacd13495b707f263fd09afaead0665fa
[ROCm/clr commit: 812cf130b6
2016-12-12 10:16:58 -06:00
f45c6facf0
Fixed build error due to GetPCIBusId overloaded function
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Change-Id: I626446f2c72c8143f08c95367bc1c528abeaf69d
[ROCm/clr commit: a6b2f9c3a0
2016-12-08 14:35:58 +05:30
0d8957fb9a
HIP IPC implementation on ROCr IPC APIs
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Change-Id: I1ca9d520f5d0b1b56694211471b81eb7c6c23d16
[ROCm/clr commit: 7ac5f2e8c3
2016-12-07 15:38:36 -06:00
89490a8065
hipDeviceGetPCIBusId int version changes for CUDA runtime API
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Change-Id: I4d3b995f1d1ac83415ca84808a074e5c8cd72f3c
[ROCm/clr commit: d8fdd6c6fc
2016-12-07 12:12:40 +05:30
87f69ab605
Fix issue of ihipModule_t double defined
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Change-Id: I508677e595776fd573a2f224691116d01288dc78
[ROCm/clr commit: 8f2a1752c1
2016-12-06 19:10:17 -06:00
e885147485
change hipgetPCIID to take int as third parameter
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Change-Id: I4429b36756a6d868a769abd783bf28a55147c0d0
[ROCm/clr commit: 8fcae3acc0
2016-12-06 14:24:09 -06:00
707358d0b4
IPC prototyps and part of the implementation included
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Change-Id: Id88c7f155d23ec63f57a6ef05098fba43f8af336
[ROCm/clr commit: 092924d660
2016-12-06 14:24:09 -06:00
aaecc3fe04
local changes for hipnccl
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Change-Id: I05a1f0381ce2914a800f573342cc954eb5ff82d9
[ROCm/clr commit: 808e555247
2016-12-06 14:22:02 -06:00
448c6b3119
Enabled USE_DISPATCH_HSA_KERNEL, with serialization in hipModuleUnload.
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[ROCm/clr commit: 3f810a203b
2016-12-06 10:14:01 -06:00
8a210f721d
Build Error correction in hipDeviceGetPCIBusId
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Change-Id: I50ff4d95b7a732924c7a991cba60400b1c93c0de
[ROCm/clr commit: a019f1ce39
2016-12-06 17:09:21 +05:30
48e9aaf696
Changed hipDeviceGetPCIBusId to return Bus ID as string
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Change-Id: I6d5aa7362084109d34bc015d948f8723b2a38ee9
[ROCm/clr commit: 0017419521
2016-12-06 16:55:17 +05:30
b9bde4a4be
Remove redundant variable g_malloc_heap_size
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Change-Id: Idaf47be70488f0deb3eab05a86d9c5a413d3fff7
[ROCm/clr commit: b8413a69c8
2016-12-06 10:19:03 +05:30
70f0a2f43b
HIP resource leaks fix from Jack
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Change-Id: I93f3ad7cb94ff1cba1577bd8acc90e826693d12e
[ROCm/clr commit: 4cb1579d4a
2016-12-05 20:21:33 -06:00
136d220c10
Revert "Enable USE_DISPATCH_HSA_KERNEL."
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This reverts commit bbd9d98af7ac93376c26
2016-12-05 16:55:26 +05:30
b01694f524
Don't share g_malloc_heap_size between libraries
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Change-Id: Ic70bf83d4f865bc5c453941fdbc1814c77f0ad9d
[ROCm/clr commit: ac368cc60f
2016-12-05 11:03:45 +05:30
bbd9d98af7
Enable USE_DISPATCH_HSA_KERNEL.
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Optimize hipLaunchModule dispatch latency.
[ROCm/clr commit: f8bcbe8680
2016-12-04 00:13:19 -06:00
bccb897f84
Add additional controls for forcing serialization and blocking.
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Move HIP_COHERENT_HOST_ALLOC so it is read once at init time.
Add HIP_LAUNCH_BLOCKING_KERNELS, HIP_API_BLOCKING.
Update docs on debug and chicken bits.
Conflicts:
src/hip_hcc.cpp
[ROCm/clr commit: 783ac156ce
2016-12-02 18:03:59 -06:00
2c51f72e41
added half add and fma intrinsic
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Change-Id: Ifa60c1a7065f524f069291bb00d987b11c836cc4
[ROCm/clr commit: e6df8cb28c
2016-11-29 19:46:01 -06:00
946e9b4163
Change to use produce device name by default
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Change-Id: Ie2cee2a2e94a08b5874a2f5abee5d1ab6c9fdf47
[ROCm/clr commit: 504fcaf786
2016-11-29 11:34:06 -06:00
4421ff4fb6
Added support for hipMemGetAddressRange
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Change-Id: I99a796a4eb765152cf15a12d6a86b58684d34f50
[ROCm/clr commit: bda0704213
2016-11-29 22:04:09 +05:30
Aditya Atluri
Ben Sander
Rahul Garg
pensun
Maneesh Gupta