- There is a performance regression with a HW wait for HSA signal
on ROCr async operation. For now move the logic back to CPU wait.
- Fix profiling issue with multiple HSA signal per single timestamp
object. Some copies require multiple ROCR calls and if profiling is
required, then the execution time is derived from all used signals.
Change-Id: Id003e4abb8c2de378eedc152a7e389500fc6f4ce
Remove targetId_, gfxipMajor_, gfxipMinor_ and gfxipStepping_ from
device::Info as they are now available in device::Isa.
Change-Id: I381b1d4798ebf50655740e004a01ac7f86dbf668
- Correct GSL path to report targets using the TargetID syntax.
- Correct GSL path to check compatibility of code objects when
loading.
- Add concept of an device isa and create a registery used by ROCm,
PAL and GSL.
- Support XNACK and SRAMECC target features consistently for PAL and ROCm.
- Correct logic for NullDevices and asserts to avoid memory coruption.
- Allow all NullDevices to be created for HIP.
- Numerous other code improvements.
Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e
Use strncpy instead of strcpy to ensure the arrays will not be
overflowered. Only copy one less than size of char array to leave a
NUL character at the end even if the copy is truncated provided the
original object is zeroed memory.
Change-Id: I00f7679630cf28dcb9a51cb0aba2810a4f4c72b9
roc:Settings and pal::Settings are derivations. Allocate them as their
derived class then assign that to the base class member to avoid the
need for a static_cast.
Use device::settings to access the Settings consistently.
Change-Id: I0f85157962fbf6fed176da0caf83b723bcbe1452
Make roc::Device::getBackendDevice non-virtual and only defined by
roc::Device and not roc::NullDevice. It is only meaningful for an
online device.
Change-Id: Ic333a3a42f650bea524e80dab587a34f1353e593
Delete roc::Program::hsaDevice and access directly from device
associated with program. This allows to be clear if the device is a
NullDevice which has no meaningful HSA agent backend device.
Change-Id: I81f96aff47bf9b8166d0ff6a5efc7c01f0fb6de3
Make roc::Device constructor and create() method private as creating
devices is performed by the factory static methods.
Change-Id: Ifa2edb8ec645b4ce6070c4aef355b9ef88294cf1
- Add assertions to enforce that objects are of the correct kind and
have been allocated.
- Make destructors check if objects have been allocated before
deleting.
- Operations that require a non-NullDevice return failure if given a
NullDevice.
- Use static_cast rather than reinterpret_cast when cohersing from a
base class to a derived class.
Change-Id: I02ee0ea9d7982fd7ca29d49c9b02cfae111b7127
Rename functions that access devices to reflect the derived device
they return. This includes the base device::Device and the derived
gpu/pal/roc device classes in both NullDevice and Device forms. Change
to use the least derived versions to clarify what operations will be
available.
Change-Id: I1abb6bfed7efa24852bc8d0d49acaea357d8b5d0
Move declaration of kMaxAsyncQueues in rocdefs.h into the roc
namespace and adjacent to the other definitions.
Change-Id: Ibd319e3cc191945bacb9c06e1b31967717c1c87c
- Correct spelling mistakes or working in comments.
- Adding missing line separators.
- Add missing comments for namespace closing brace.
Change-Id: If09cdd38aa088b0f68f750dfdef81351eb8c4935
HMM with xnack enabled should automatically update page tables,
but currently it doesn't perform that. For now, runtime will
force page table update on all devices unconditionally.
Change-Id: Idfa6e1c145e6c114856214dce042b8a8349e5c58
Implement the global class for signals tracking per device queue.
Switch to the new tracking mechanism.
Change-Id: I3c4dda04b34e6d18d6a95510d84102909633b415
Make sure the comments in the code match the actual behavior.
HDP read has internal HDP read cache and doesn't use L2.
Change-Id: I667a4643b0e0d6529008f5e1a0a3269456c55b4e
CPU read updates L2 with the latest values and requires
invalidation after, because SDMA doesn't use L2 and data can become
out of sync.
Change-Id: I98d1c91ca78a103fa5409e638f97485d62d5b11e
When OCL ROCr backend performs CL_MEM_COPY_HOST_PTR it may attempt
to have access to amd::Memory object it's currently creating,
but it's not ready yet. The logic creates a temporary dummy object
to perform a copy transfer. The new change will make sure runtime
skips allocation of the same device::Memory object second time.
Change-Id: I14c6a00a3941fdcaa6aea299e9f096e4c3f5cadf
Use barrier packets for every profile marker that gets submitted
and use the completion signal to get GPU ts. This gives most accurate
dispatch time. Club cache flushes with profile marker if there is a
pending dispatch that needs cache flush. This optimization saves on
extra barrier and helps wall time
Change-Id: Ib62d6d7aabf4743827b561be6c9c5afa813203da
ROCr is now reporting the actual HW addressing limits for HIP, so OpenCL will have to impose lower limit.
Change-Id: I60c2ce27ed1d1f45f16fb76438965a236ba872c6
OCL can't distinguish different copy types, but ROC profiler
expects SDMA transfer visibility. Add extra code to detect
a transfer with the host memory and substitute OCL command
Change-Id: I5290acd0e10bc082e00c1d4ae1474a075de7f165
We unmap a memory with a different pointer.
ROCr runtime might be confused and silently ignore the unmap request
Change-Id: Ic5a1387a426cf02a985a4ef8ff8ff05e6a870cbf
Enable this optimization when the barrier is disabled, since
reuse requires a signal wait.
Use the size of pending AQL signals as the size of signal pool.
Change-Id: I2754a0f8b67e19d2601c58945e10fdf0e8be1624
Now rocm/rocdevice.cpp also includes comgrctx.hpp, and we don't want to statically link against comgr when buidling shared libs.
Change-Id: Ic330bd860559b3e07b776c951afe6126b0f43f7d
The change reuses HSA signals for dispatches as a wait signal.
Skipping the barrier requires to disable L2 cache for sysmem
allocations and extra tracking for HDP access with the large bar.
ROC_BARRIER_SYNC=0 activates the new logic. Barrier sync is
still used by default.
ROC_ACTIVE_WAIT=1 enables unconditional active wait in ROCr.
The change also consolidated ROCr wait logic under single function.
Change-Id: I6bd1be30aa88258da1b1f9de319ef5a45852afd8
SWDEV-249719 - root cause: queues with custom CU mask are not inserted
into queuePool_ (i.e., queue of reusable HSA queues) of ROC device class
causing a crash when creating hostcall buffers for printf
Change-Id: Ieee7005d9a5a30b3113394ce23ee65927126d0d6