e506d14d18
[TransferBench] Fixing advanced config, adding new all-1-hop sample test ( #433 )
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* [TransferBench] Fixing advanced config, adding new all-1-hop sample test
2021-10-07 15:57:21 -06:00
51d64894ff
[TransferBench] ConfigFile parsing fixes, adding additional info ( #422 )
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* [TransferBench] Adding GPU to NUMA distance detection, parsing fixes, config file generation fix
* [TransferBench] Fixing up NUMA node detection by filtering pools
2021-09-07 15:28:16 -06:00
1ed272e5f0
[TransferBench] Removing dependency on hip_fp16 header, fixing swapped output CSV header ( #416 )
2021-08-04 10:53:41 -06:00
2b0b608270
[TransferBench] Fixing a typo in TransferBench usage example ( #401 )
2021-06-22 17:08:57 -06:00
ff413be933
[TransferBench] Adding ability to specify source data pattern ( #394 )
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* [TransferBench] Adding ability to specify source data pattern
2021-06-15 08:41:57 -06:00
62e0447e9a
[TransferBench] Restore some previous fixes - memory leak, PCIe address ( #314 )
2021-02-01 09:48:09 -07:00
41c35dad48
[TransferBench] Fixing bug with fine-grained memory allocation ( #311 )
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* Fixing bug with fine-grained memory
2020-12-15 17:37:31 -07:00
ae0c4092c7
[TransferBench] Adding ability to perform CPU-executed copies, various upgrades ( #309 )
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* Adding CPU based execution, fixing typos, adding Fine-grained mem
* Exposing sampling factor when generating range of data sizes
* Refactoring how Links are launched, now once per thread
* Documentation updates
2020-12-11 10:21:14 -07:00
b80ae551b1
[TransferBench] Support multiple of 4 byte sizes, changing default GPU timing mechanism ( #307 )
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* Changing default timing mechanism, adjusting CPU bandwidth calc, adding flag to use combined timing
* Adding support for smaller transfers (byte size must be multiple of 4 instead of 128)
2020-12-04 14:57:13 -07:00
bfab1d3592
Adding output to CSV, removing OpenMP, decreasing default numBytes to 64MB, adding aggregate stats ( #290 )
2020-10-27 09:00:33 -06:00
61e1a71d14
[TransferBench] Displaying PCIe Bus ID ( #288 )
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* Adding PCIe BusID per GPU in topology display
2020-10-21 16:13:36 -06:00
769418c5c7
TransferBench Typo. Pinned host memory uses C not P ( #286 )
2020-10-21 12:05:38 -06:00
ee262819a7
New TransferBench features ( #273 )
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* Upgrading TransferBench to support pinned CPU memory, expanding functionality, cleaning up env vars
2020-09-25 12:20:48 -06:00
ec9af40fcd
Upgrading various TransferBench features ( #257 )
2020-08-19 09:47:19 -06:00
c985478133
Fixes to make TransferBench compile for hipclang ( #254 )
2020-08-13 12:25:28 -06:00
339bf9ff19
Adding option to re-use streams instead of re-creating per topology
2020-04-23 15:53:40 +00:00
a95090d981
Fix HIP-Clang build with HSA headers
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HIP-Clang does not include these HSA headers, and they need to be explicitly added in RCCL.
2020-04-03 17:58:23 -04:00
20fa04d9b6
Updating copyright notices for 2020.
2020-01-29 15:28:08 -08:00
e5074ce94d
Changing single sync mode to time all iterations instead of just last
2019-12-20 17:08:39 -08:00
2f4269d06d
Adding new sleep after sync capability for data fabric profiling ( #162 )
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Fixing missing header include for ROCM 3.0 changes
2019-12-12 15:20:54 -07:00
fd94f4fa25
Adding interactive mode for profiling purposes ( #150 )
2019-11-05 17:10:16 -07:00
2f9edd2432
Single Sync Timing mode ( #144 )
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* Adding single sync timing mode to emulate timing reported by rccl-prim-test / rccl-tests
* Adding duration / overhead info
2019-11-01 10:18:25 -06:00
648c1ee7cc
Adding ability to switch between fine/coarse grain destination GPU memory
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Adding ability to switch between memset/memcpy
2019-10-29 12:00:32 -06:00
b8cf48fc16
Adding TransferBench tool ( #113 )
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* Adding standalone TransferBench tool
2019-08-07 17:21:41 -06:00
gilbertlee-amd
Gilbert Lee
Aaron Enye Shi
Stanley Tsang