Commit Graph

13501 Commits

Author SHA1 Message Date
Cole Nelson a9ce8683eb CMakeLists.txt: add ENABLE_LDCONFIG to support multi-version install
Depends-On: I58fdf1d0b4e864b5a61ffe8e335d430d424811ab
Change-Id: I8e3e873fde99eaec79651ce6c3581870e9c2112d
Signed-off-by: Cole Nelson <cole.nelson@amd.com>
2021-03-27 15:27:55 -07:00
Cole Nelson 72fa4a17fa hsa-runtime: add ENABLE_LDCONFIG to support multi-version install
Depends-On: I58fdf1d0b4e864b5a61ffe8e335d430d424811ab
Change-Id: I0cb6f8711ea5033e84b7e45ce20e7e23d84005c3
Signed-off-by: Cole Nelson <cole.nelson@amd.com>
2021-03-26 18:37:04 -04:00
Evgeny Shcherbakov f27b925671 Merge "fixing gfx10 gfxip name" into amd-staging 2021-03-26 15:55:04 -04:00
Evgeny Shcherbakov 280fac6b86 Merge "fixing gfx10 gfxip name" into amd-staging
[ROCm/rocprofiler commit: f27b925671]
2021-03-26 15:55:04 -04:00
Evgeny Shcherbakov 4a31d93ec3 Merge "obj-tracking default on" into amd-staging 2021-03-26 15:54:45 -04:00
Evgeny Shcherbakov 7dd5126ef1 Merge "obj-tracking default on" into amd-staging
[ROCm/rocprofiler commit: 4a31d93ec3]
2021-03-26 15:54:45 -04:00
Chris Freehill 5e2a4f3a15 Handle different gpu_metrics content versions for format v1
Change-Id: I344d1815da683befc8f8b5caf921803b267ae29f
2021-03-24 14:34:55 -05:00
Evgeny 80973271f4 obj-tracking default on
Change-Id: If919c1ee792e59bdb938608382e5b7350ca7098e
2021-03-24 01:44:19 -05:00
Evgeny 0fe48f9982 obj-tracking default on
Change-Id: If919c1ee792e59bdb938608382e5b7350ca7098e


[ROCm/rocprofiler commit: 80973271f4]
2021-03-24 01:44:19 -05:00
Evgeny 64bdcaddc7 fixing gfx10 gfxip name
Change-Id: Ie58768d64117a616b1896489b505790cfa993054
2021-03-24 00:48:21 -05:00
Evgeny eddcdabf2a fixing gfx10 gfxip name
Change-Id: Ie58768d64117a616b1896489b505790cfa993054


[ROCm/rocprofiler commit: 64bdcaddc7]
2021-03-24 00:48:21 -05:00
Rachida Kebichi 438300358b SWDEV-255637 add missing API calls.
Change-Id: Ic68258b6f3725a6dfdeab2a33b2e744f9b1b46b3
2021-03-23 17:24:29 -04:00
Rachida Kebichi 6232a6f941 SWDEV-255637 add missing API calls.
Change-Id: Ic68258b6f3725a6dfdeab2a33b2e744f9b1b46b3


[ROCm/rocprofiler commit: 438300358b]
2021-03-23 17:24:29 -04:00
Mengbing Wang d5855c1658 limit the memory allocation on vram to 3/4 of vram size.
1. As we cannot ganrantee that 100% apu vram are free to be allocated, limit
the allocation size be no more than 3/4 of vram size.
2. Keep the old 1GB allocation limit for dGPU case.
3. Add the alignment check for alloc_size.

Affected tests:

rocrtstStress.Memory_Concurrent_Allocate_Test
rocrtstStress.Memory_Concurrent_Free_Test

Change-Id: Id0023de132024d02f80980ae4237d9d74d9e27d3
Signed-off-by: Mengbing Wang <mengbing.wang@amd.com>
2021-03-23 18:59:42 +08:00
Evgeny e2c9d13e5b SWDEV-274821 SPM initialization fix
Change-Id: I5e27928a60083eff328bab3e79937ce11bce11bd
2021-03-22 09:18:36 +00:00
Evgeny 0282e30855 SWDEV-274821 SPM initialization fix
Change-Id: I5e27928a60083eff328bab3e79937ce11bce11bd


[ROCm/rocprofiler commit: e2c9d13e5b]
2021-03-22 09:18:36 +00:00
Evgeny 567f457f25 SWDEV-267190 real pid/tid arg values
Change-Id: Ia3d98364b5bc7e9eace3d742055af4e074d64c66
2021-03-18 15:13:21 +00:00
Evgeny cb57b17051 SWDEV-267190 real pid/tid arg values
Change-Id: Ia3d98364b5bc7e9eace3d742055af4e074d64c66


[ROCm/rocprofiler commit: 567f457f25]
2021-03-18 15:13:21 +00:00
Chris Freehill 82b2dbe495 Don't overwrite default CMAKE_CXX_FLAGS in tests & samples
Change-Id: I4a2bb0bcc320fb0645e9fc5447775e6a878b960b
2021-03-17 21:25:18 -05:00
Felix Kuehling d287c60246 libhsakmt: New SRAM EDC support bit
The old bit was deprecated, because old buggy user mode depends on it
being always 0. The correct value is now reported in a new bit. New user
mode handles the reported EDC setting correctly, so we can report the
correct value in a new bit.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ib5d5ed2519810e650458c6b69c97670dab435ddb
2021-03-11 13:37:45 -05:00
Felix Kuehling 41cd7aea2f Revert "libhsakmt: add kfd_ioctl.h svm and xnack support"
This reverts commit 5ae49f2321.
SVM is not ready yet. This was merged by accident.

Change-Id: I8901594a72e785ba5d25a6448718a570e76fe117
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
2021-03-10 22:33:49 -05:00
Felix Kuehling 5edd00136d Revert "libhsakmt: add API to support svm and xnack"
This reverts commit a352639df5.
SVM is not ready yet. This was merged by accident.

Change-Id: I1bee102823e7e612be8e8f2e0f50580e8692cc80
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
2021-03-10 22:33:49 -05:00
Felix Kuehling 4ebda913cd Revert "libhsakmt: add SVM thunk implementation"
This reverts commit 75e8fe383f.
SVM is not ready yet. This was merged by accident.

Change-Id: I372f7d293fd38429ec570bc0e0add7e612871594
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
2021-03-10 22:33:34 -05:00
Felix Kuehling a8f4c43fef Revert "libhsakmt: add XNACK API set/get mode"
This reverts commit 3f45f602d4.
SVM is not ready yet. This was merged by accident.

Change-Id: I7c0d835a0d3a448f2ac1094f818601e5d6363045
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
2021-03-10 20:34:43 -05:00
Evgeny c46913cdd6 SWDEV-274603 : fix SPM mode enabling
Change-Id: I67d9ecd8c808989315b2991ec492af2a4dd4ccbf
2021-03-10 01:27:28 -06:00
Evgeny 02d06d0c19 SWDEV-274603 : fix SPM mode enabling
Change-Id: I67d9ecd8c808989315b2991ec492af2a4dd4ccbf


[ROCm/rocprofiler commit: c46913cdd6]
2021-03-10 01:27:28 -06:00
Evgeny 76f7c9a5fd SWDEV-267198 : adding gpu index to hsa_handles file
Change-Id: I6ddba45ab31fff97a1f85f889c56693accf8f5bc


[ROCm/roctracer commit: 1c77416a6c]
2021-03-09 15:37:44 -06:00
Evgeny 1c77416a6c SWDEV-267198 : adding gpu index to hsa_handles file
Change-Id: I6ddba45ab31fff97a1f85f889c56693accf8f5bc
2021-03-09 15:37:44 -06:00
Harish Kasiviswanathan 0f16e6f35f kfdtest: Fix gfx1032 blacklist
BLACKLIST_ALL_ASICS has to the first in the list otherwise "-" negative
flag won't be inserted

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I9ee150d7f793809641b16012929c4e157595d37f
2021-03-08 21:12:55 -05:00
Harish Kasiviswanathan 95d58346c5 kfdtest: Temporarily disable shader tests on gfx10
Temporarily disable shader related tests until SP3 compiler is fixed

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I0468d82f845d1d69841ad8fdbd037761b8d4d9af
2021-03-05 19:52:53 -05:00
Laurent Morichetti ea6ee0aa81 New trap handler ABI (v5)
Park the wave, if it is stopped, to avoid halting it at an s_endpgm
instruction if the architecture does not support it.

Free ttmp6 by converting the dispatch_ptr into a queue packet index
(25-bit) and storing it in ttmp7[24:0].

Save the exception PC in ttmp11[22:7] ttmp6[31:0].

Change-Id: Iaa3c5baf5b488c0b534044d338f12bffa63ddce2
2021-03-04 21:44:14 -05:00
Laurent Morichetti 7e0f391a08 Correct the trap handler
ttmp11 no longer has an "excp_raised" field.

Change-Id: I8e673ca404c2b802470bbc9f76e7925782076c5a
2021-03-04 21:21:26 -05:00
Sean Keely 191664cd20 Insert scratch memory into scratch cache on full profile systems.
Scratch cache was not updated for IOMMUv2 systems previously.
This both negates the cache and causes segfault during scratch
release.

Change-Id: I71e81d6b642d65ca135868ff7225ea173529d458
2021-03-03 21:30:16 -05:00
Chris Freehill 7a05145542 Fix some lintian errors
Fix lintian errors related to maintainer, postinst script and
permissions.

Change-Id: I6924ff92ff5453fa7e562a6188c2c91cea87df68
2021-03-03 19:35:24 -06:00
Yifan Zhang 27ae854cda rorctst: check gpu_pool value after hsa_amd_agent_iterate_memory_pools.
hsa_amd_agent_iterate_memory_pools return HSA_STATUS_SUCCESS even if
no memory pool is found. Add a memory pool check.

jenkins@jenkins-System-Product-Name:~/rocrtst_tests/gfx902$ ./rocrtst64 --gtest_filter=rocrtstFunc.MemoryAccessTests
Note: Google Test filter = rocrtstFunc.MemoryAccessTests
[==========] Running 1 test from 1 test case.
[----------] Global test environment set-up.
[----------] 1 test from rocrtstFunc
[ RUN      ] rocrtstFunc.MemoryAccessTests

	#### TEST NAME ####
RocR Memory Access Tests

	#### TEST DESCRIPTION ####
This series of tests check memory allocationon GPU and CPU, i.e. GPU access
to system memory and CPU access to GPU memory.

	#### TEST SETUP ####
The gpu device name is gfx902
Target HW Profile is HSA_PROFILE_FULL
Test can run on any profile. OK.

	#### TEST EXECUTION ####
  *** Memory Subtest: CPUAccessToGPUMemoryTest in Memory Pools ***
Segmentation fault (core dumped)

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: Ic335c4c98990b43f5d4842ab6d74855859a9048a
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
2021-03-03 20:16:26 -05:00
Kent Russell 83d80074f7 Merge gfx90a into amd-staging
Conflicts:
	CMakeLists.txt
	include/hsakmt.h
	src/libhsakmt.h
	src/libhsakmt.ver
	src/queues.c
	src/topology.c
	tests/kfdtest/src/KFDMemoryTest.cpp
	tests/kfdtest/src/KFDTestUtil.hpp

Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: Ic2732e7c0b5e42c1a3a91223f65a65064b602181
2021-03-02 07:48:22 -05:00
Bill(Shuzhou) Liu 3aa95b210a Create prebuild raslib package for RDC
Create a folder for prebuild raslib which contains the RAS binary
and configure files. The CMakeLists.txt is changed to include
those files.

Change-Id: I530198cff5686a19e58096c87457ab8b7c52d5f3
2021-03-01 15:49:01 -05:00
Harish Kasiviswanathan e35778ed4d kfdtest: Temporarily blacklist KFDMemoryTest.PtraceAccess
Possibly because of moving to gart table for vram access from Kernel.
This test failure shouldn't be a blocker. Temporarily blacklist till a
solution is found.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I99725f368aced863188e30f619288ad4d033b9a6
2021-02-26 13:00:09 -05:00
Oak Zeng ae0e74095e Allocate coherent uncached memory when HSA_DISABLE_CACHE is set
Set the KFD_IOC_ALLOC_MEM_FLAGS_COHERENT flag  and
KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED flag to allocate
uncached coherent memory when HSA_DISABLE_CACHE
environment variable is set. At KFD driver,
Single KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED flag is
not sufficient to allocate uncached memory. We
have to use both two flags to allocate uncached
memory.

Change-Id: Ie490f37b2e696314e60048f5b1b57442431696e9
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2021-02-26 13:00:01 -05:00
Chengming Gui c21466d735 libhsakmt: add DID for gfx1031
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Change-Id: I1b890dda0ef9ee53c3950c17c106197167f210b9
2021-02-26 17:40:13 +08:00
Evgeny 810b2b5982 SWDEV-274603 : To enable SPM KFD mode
Change-Id: I53f86d51ae9855d9c96aa9d3a8c8e433070136a3
2021-02-25 21:38:39 -05:00
Evgeny 49c37df562 SWDEV-274603 : To enable SPM KFD mode
Change-Id: I53f86d51ae9855d9c96aa9d3a8c8e433070136a3


[ROCm/rocprofiler commit: 810b2b5982]
2021-02-25 21:38:39 -05:00
Kent Russell 9311789398 rocrtst: Add packaging information to CMakeLists
This will create a deb and an rpm for rocrtst to make installing and
running it easier for non-ROCr devs.

Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: I506baedc1471482e5808139cab5c28ae07ac8fb1
2021-02-24 12:22:31 -05:00
Chris Freehill ce475b009c Adjust event counters to report only new events
Previously, RSMI assumed that the event counter values returned
from perf were only new events. But in fact, when we read the
counter values, they are running totals. To account for this, we
now record the value we read and take the difference between the
current value and the previously recorded value.

Change-Id: I1e04b514e89c7c4d4719889f2dae3a1283864e7f
2021-02-24 11:02:17 -06:00
Yifan Zhang 5977eb554f rocrtst: fix a test case setup issue in iommuv2 for APU
APU doesn't have non-KERNARG memory pool for cpu agent or
a global memory pool for gpu agent. Current setup check
fails as below. Change to a APU specific check method.

[==========] Running 45 tests from 5 test cases.
[----------] Global test environment set-up.
[----------] 1 test from rocrtst
[ RUN      ] rocrtst.Test_Example

    #### TEST NAME ####
Test Case Example

    #### TEST DESCRIPTION ####
Put a description of the test case here. Line breaks will be taken care of
on output, not here.

    #### TEST SETUP ####
The gpu device name is gfx902
Target HW Profile is HSA_PROFILE_FULL
Test can run on any profile. OK.
/home/jenkins/hsa/runtime/rocrtst/common/base_rocr_utils.cc:180: Failure
Value of: rocrtst::ProcessIterateError(err)
  Actual: 4096
Expected: HSA_STATUS_SUCCESS
Which is: 0
HSA_STATUS_ERROR: A generic error has occurred.
/home/jenkins/hsa/runtime/rocrtst/suites/test_common/test_case_template.cc:195: Failure
Value of: HSA_STATUS_SUCCESS
  Actual: 0
Expected: err
Which is: 4096
rocrtst64: /home/jenkins/hsa/runtime/rocrtst/common/base_rocr_utils.cc:416: hsa_kernel_dispatch_packet_t* rocrtst::WriteAQLToQueue(rocrtst::BaseRocR*, uint64_t*): Assertion `test->main_queue()' failed.
../shunit2: line 977:  1382 Aborted                 (core dumped) ./rocrtst$ROCRTST_BLD_BITS "$ROCRTST_ARGS" --gtest_output=xml:"$gtest_xml"
failed (failed to run rocrtst)

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: I03691bd4171b6e622231baf3dce4db2211eb47e7
2021-02-23 20:14:40 -05:00
Chris Freehill 11440536cf Handle set freq for double-digit index in rocm_smi.py
rocm_smi.py --set<m|s>clk was treating the freq as a string.
This causes problems in parsing when the index is more than 1
digit. Now, treat the indexes as integers.

Change-Id: Ia0d859d33b685fe90689a86ff1c83980808b1514
2021-02-23 18:51:29 -06:00
Bill(Shuzhou) Liu 5b4fbe08d2 Change CMakeLists.txt to include the libras
The CMakeLists.txt is changed to add instructions to build raslib.

Change-Id: I0779046f28cbc7af292c83f3ae3ed7bcda5c57eb
2021-02-23 14:49:18 -05:00
Bill(Shuzhou) Liu 7ca7a571a7 RDC Prometheus plugin return errors when use the --rdc_gpu_indexes
When above option is used, the plugin returns errors:
  result = rdc.rdc_group_gpu_add(rdc_handle, gpu_group_id, gpu)
  ctypes.ArgumentError: argument 3: <type 'exceptions.TypeError'>: wrong type

The rdc_prometheus.py is changed to convert string to integer.
The RdcUtil.py is also changed to raise Exception properly.

Change-Id: I9535091ff1fc8882cccd32e5f2810da5241768c3
2021-02-23 14:15:04 -05:00
Eric Huang 9aa521d1ff KFDTest: add cache coherence tests for gfx90a
Three kfd subtests are added to verify new XGMI connection with
cache coherence HW link on A+A.

Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Change-Id: I6960ec91cbfb696c4e6acb3b79fd83107003acdd
2021-02-23 12:22:32 -05:00
Harish Kasiviswanathan 085005f07b kfdtest: Add gfx9_PollNCMemory function to support NC memory
In A+A all system memory is mapped as NC. So add a new function
gfx9_PollNCMemory which will support NC memory.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I097b95fb156f73d6f480cd4fd262cc6fa5933f69
2021-02-23 12:20:29 -05:00