Commit Graph

1169 Commits

Author SHA1 Message Date
Andryeyev, German f6c804edc0 SWDEV-526836 - Switch PAL backend to CmdReleaseThenAcquire() (#175) 2025-04-15 11:49:53 -04:00
Six, Lancelot 7b72c1b786 SWDEV-517078 - Update 2nd level trap handlers (#148)
* SWDEV-517078 - Maintain the trap handler ABI version in CLR

The trap handler ABI version is communicated to the debugger using
the r_version field in the r_debug structure.  This structure is
an external dependency, which makes it complicated to keep the trap
handler source (in CRL) and the ABI version number (external dependency)
in sync.

This patch proposes to patch the trap handler ABI version number in
_amdgpu_r_debug before communicating it to the debugger.

We can't directly include sc's executable.hpp file in CRL as it relies
on conflicting definition of ELF related types, so instead we need to
rely on a-priori knowledge on the r_debug structure.  Fortunately, this
structure is part of a stable ABI, so its layout is guaranteed to be
kept stable.

Update the 2nd level trap handler to follow updates from the
ROCr-runtime.  The trap handlers are stripped from parts dedicated to
architectures unsupported by CLR.

Bump the r_debug.r_version to track the ABI changes in the trap handler.
2025-04-11 18:59:54 +01:00
Yao, Longlong 0de73eeaf8 SWDEV-518966 - Avoid creating Arena Memobj for VMM pointer (#39)
Change-Id: I69c6c0a1464d01e674ac929de34ab10047012f1a

Signed-off-by: Longlong Yao <Longlong.Yao@amd.com>
2025-04-11 16:55:53 +05:30
Andryeyev, German 4c363df3bf SWDEV-517481 - Add more restrictions to the queue management (#168) 2025-04-10 21:51:45 +05:30
Andryeyev, German 94cd9bc4f7 SWDEV-525725 - Enable resource cache for SVM (#156)
- Make sure reserved_va_ updated before svmPtr overwrite
2025-04-10 10:54:28 -04:00
Stojiljkovic, Vladana e91cb4f320 SWDEV-505795 - Return the same ptr from hipIpcOpenMemHandle if it is called multiple times (#93)
* SWDEV-505795 - Return the same ptr from hipIpcOpenMemHandle if it is called multiple times

* Move initialization outside of if statement
2025-04-10 11:20:36 +02:00
Patel, Jaydeepkumar 9e7248aa36 SWDEV-521011 - Allow max stack size as per ISA. (#73) 2025-04-08 10:15:38 +05:30
Andryeyev, German e974f7fde1 SWDEV-497841 - Add VmHeapArray support (#76)
Add VmHeapArray class to reduce the pressure on VA reservation, since
multiple memory pools can be active at the same time.
2025-04-03 21:04:18 +05:30
Patel, Jaydeepkumar b5c9cbc236 SWDEV-508632 - Align address to 2 MBs for hidden heap allocation. (#29) 2025-04-02 16:33:29 +05:30
MartinezFernandez, Juan f580632174 Remove PCH code: the code related to PCH is dead and not used (#66)
cherry-pick of compute/ec/clr/+/1184122

Co-authored-by: Juan Manuel Martinez Caamaño <juamarti@amd.com>
2025-03-28 10:36:19 +01:00
GunaShekar, Ajay 686dd56a4e SWDEV-523853 - Use RecordRenderOps instead of RecordRenderOp (#97) 2025-03-26 09:28:40 +05:30
Arandjelovic, Marko e7ada4effe Revert SWDEV-512344 - Unmap all subbuffers (#26)
This reverts commit 0b69120cfcb5b4689d9f2037b1a01e274d85c20f.
2025-03-19 21:17:36 +05:30
Andryeyev, German 28967982b2 SWDEV-517481 - Add dynamic queue management (#37)
Enabled by defaulty. DEBUG_HIP_DYNAMIC_QUEUES controls the feature
2025-03-19 11:22:50 -04:00
agunashe f1b8ee7b7f SWDEV-513810 - APU: memory allocations threshold 0.75-->1
Needs further debugging but for now can test the change

Need to verify if this fixes all the below issues-
SWDEV-512754, SWDEV-511675, SWDEV-511055, SWDEV-504085, SWDEV-499503
Also verify original issues
SWDEV-471863, SWDEV-490991

Change-Id: Ic845f851de1b98e8ed9aa0f07afddec3858119e9
2025-03-11 05:30:43 -04:00
Saleel Kudchadker 78d0ff2dbc SWDEV-519596 - Avoid passing dep signal to SDMA
- For D2H cases avoid passing dependent signals to SDMA, the signals
  take a while to resolve on SDMA engine

Change-Id: I569635228af977847f201c82ca897002f8f2f4a8
2025-03-07 17:37:21 -05:00
Pengda Xie b02b1858c0 SWDEV-497619 - Ensure suballocSize is integer multiple of 4096
Change-Id: Iefc452d73566f58cfb63391a68c836f30d77dd6c
2025-03-07 15:36:57 -05:00
Branislav Brzak c2d1776ebd SWDEV-516564 - SWDEV-512817 - Remove mentions of gfx940 and gfx941
Change-Id: Ia069fcb9c6948c3fc9a00961593c9dcc59609375
2025-03-05 04:26:07 -05:00
Saleel Kudchadker e03e4f3b5d SWDEV-502365 - Track last used command
- This change tries to save extra synchronization packets we may insert
  as we didnt track the completion signals for every command. We track
the current enqueued command until it exits the enqueue stage. We also
record the exit scope to know if we flushed the caches
- Handle correct release scopes and store completion signal as HW events
- Use a new finishCommand implementation to only wait for the command
  passed as the argument

Change-Id: Ie4350c5dd24f5d48dfa6ccbabd892f0544caadcc
2025-03-04 16:05:02 -05:00
Marko Arandjelovic 3ec1d2d2f1 SWDEV-512344 - Unmap all subbuffers
Since hipMemMap can be called for multiple device handles on the same virtual memory, the same is true for hipMemUnmap, meaning that virtual memory can be "partially unmapped".

This means that the unmap function can be called for a specific part of the reserved address, meaning that only the designated subbuffer should be released. If unmap is called on the entire reserved memory, then all subbuffers should be released.

The main point is that for every hsa_amd_vmem_map, there should be a corresponding hsa_amd_vmem_unmap. Otherwise, if entire memory is unmapped by a single unmap call, then HSA will report the memory as "in use" if an attempt is made to delete it.

Change-Id: I039308eafb820decfb1c09f60347f26cdad1a362
2025-03-02 13:41:48 -05:00
Saleel Kudchadker 37d606d193 SWDEV-513197 - Unify getBuffer implementation
- Use getBuffer/releaseBuffer in BlitManager
- Cleanup XferBuffer as we use ManagedBuffer for both reads/writes

Change-Id: I2661b85dd012763b17a38a743fec1b1d79125f67
2025-02-28 12:47:51 -05:00
Saleel Kudchadker ca530c660b SWDEV-513197 - Improve launch perf for Device Heap kernels
- If any kernel uses device heap, the launch needs to be preceeded by an
  init kernel, Save on the extra barrier packet launch/flush between the
init heap kernel and user kernel

Change-Id: I8ebc6246188200e5f673dc464bc76a53bcb8b7c6
2025-02-27 19:17:51 -05:00
Rahul Manocha 4bf634dfca SWDEV-510849 - Restore pinned memory copy path
1) Create getBuffer method to return pinned host memory or staging buffer
2) for D2H path use managed buffer instead of static buffer
3) use staging buffer copy for 16KB < size < 1MB
4) use pinned memory copy for size > 1MB

Change-Id: I13d4d6ab60691bc6c7724239db1e11e23f0f3dc2
2025-02-26 11:25:02 -05:00
Jacob Lambert 187648429b SWDEV-360440 - Prepare CLR dynamic Comgr load for V3
Change-Id: Iffd835056740ff10711468cc752b7b55078b9f8f
2025-02-26 11:22:18 -05:00
Julia Jiang b7eaec76fc SWDEV-513294 - fix regression on SVM sub-test failure in Conformance
Change-Id: Ic2449dd34a9cd2b623d5f8fbe89fd042566a56e3
2025-02-20 15:40:23 -05:00
kjayapra-amd 1f583a6870 SWDEV-516303 - Remove SDMA retainer logic to select the engine.
Change-Id: I818129444131825cdb87e06cb495afa3e5cdb683
2025-02-20 11:34:38 -05:00
German Andryeyev ba8e740be4 SWDEV-515356 - Make the round-robin queue selection
- Add custom compare to the map of queues, which will help with
 the round-robin selection

Change-Id: Ie67a820bfb1a5b484a1b3edced967eed94228bb8
2025-02-20 11:09:54 -05:00
German Andryeyev 296dce5570 SWDEV-497841 - Add virtual memory heap
Add initial implementation of virtual memory heap with
dynamic virtual memory mapping support for memory pools.
DEBUG_HIP_MEM_POOL_VMHEAP controls the new method.

Change-Id: I8dc5be2e0f34ab472f1800f43bb6243639a5e500
2025-02-20 10:55:49 -05:00
German Andryeyev 63cf3057ba SWDEV-497619 - Allocate extra space in CB
Compute doesn't support IB chaining, but RGP may collect
perf counters, which require more space in CB.
Increase CB size if RGP is enabled.

Change-Id: Iaa0a620ead8541a679b0dfe5e5711af5afdba545
2025-02-20 10:40:09 -05:00
agunashe ea804e16f8 SWDEV-507967 - Deprecate gfx9, gfx8, gfx7 on Windows
PAL_CLIENT_INTERFACE_MAJOR_VERSION from 872 --> 910

Change-Id: I03dfa2924ccdae4c2f13f09d5f34ee58298e1343
2025-02-17 02:59:41 -05:00
Vladana Stojiljkovic 061c5d877f SWDEV-510059 - Format CU mask properly
Change-Id: I80e94b4f3ea25f6988fc06d83aeb398e81ccddd1
2025-02-13 11:02:56 -05:00
Aidan Belton-Schure 179801a750 SWDEV-508279 - Improve HIP event profiling
There are 2 functional changes to this patch:
* Use GPU timing for internal markers for HIP.
* Measure CPU time closer to GPU timer, to reduce delta between GPU/CPU timestamp measurements.

There are some smaller non-functional updates:
* waifForFence -> waitForFence typo
* Remove unused drmProfiling

Change-Id: I4c5fa600a842ab60e454888779edcac8449a902a
2025-02-13 04:15:40 -05:00
kjayapra-amd cf6aabb823 SWDEV-511672 - Special case the Remote USWC memory usage for HIP, if the alloc size is large.
Change-Id: I524c1402b249cedfd58b56f494caa2ac057e1623
2025-02-11 06:42:18 -05:00
Saleel Kudchadker 4c95ee5e1e SWDEV-504494 - Further copy improvements
- Fix regression for D2H pinned copies which adds systemscope release.
- Skip cpu wait for D2H unpinned copies as we can pass the signal of the
  barrier to rocr copy.
- Fix an old bug in sdmaEngineRetainCount_ logic
- Improve logging

Change-Id: If074bddb05564b15949b0d5f9bf12acd3692174e
2025-02-11 00:55:52 -05:00
victzhan ca35d93672 SWDEV-485042 - Remove -I option passed into comgr when file type is not FILE_TYPE_ASM_TEXT
Change-Id: If8e469f881651f7b3dae364e8182ef1ba6f3a0d1
2025-02-10 11:47:04 -05:00
Ioannis Assiouras d05ecea253 SWDEV-508435 - Added a fix for double free of hsaImageObject
Change-Id: I9397f7c9dbbad7c249b359155df312cb920eba6c
2025-02-05 22:21:24 +00:00
Ioannis Assiouras 3e01da3dac SWDEV-513323 - Fix for BatchMemOp on devices with no image support
BatchMemop should be positioned before the image support kernels
because the total number of kernels is determined by BlitLinearTotal,
when there is no image support on the device.

Change-Id: I8e53caf744ba54259ac04bad1762eef21806f3f2
2025-02-05 04:45:22 -05:00
taosang2 29cc394510 SWDEV-513458 - Add gfx950 target ID
Add gfx950 target ID

Cherry-picked
https://gerrit-git.amd.com/c/compute/ec/clr/+/997678
https://gerrit-git.amd.com/c/compute/ec/clr/+/1063519

Change-Id: I0228c5e87ceec366983fd4afb1c25e7f8161c2c2
2025-02-04 18:30:23 -05:00
kjayapra-amd cc62a82347 SWDEV-488290 - Remove Stream to Engine logic and rely on engine query status HSA API.
Change-Id: I469ab6679360c8ee8d4ee515678a8aa8d4578ebf
2025-02-04 13:00:16 -05:00
Juan Manuel Martinez Caamaño 8c9e6d0fa5 SWDEV-132637: Remove OpenCL cl_khr_depth_images workaround that is not needed anymore
The cl_khr_depth_images associated macro definition is defined twice in
the compiler: in opencl-c.h and automatically by the compiler deduced
from the cl-ext list. These two co-exist and there is no need to remove
cl_khr_depth_images from the cl-ext list.

If we remove cl_khr_depth_images from the cl-ext list, and we do not
include opencl-c.h the macro is not defined.

This fixes conformance test ./test_compiler compiler_defines_for_extensions
when using Comgr with -include opencl-c-base.h -fdeclare-opencl-builtins
without including opencl-c.h.

Before we got the error `ERROR: Supported extension cl_khr_depth_images
not defined in kernel`

This change is needed to eventually get rid of the opencl-c.pch that is embedded in comgr, and that makes implementing a compilation cache in comgr hard.

Change-Id: I76497874ebe7163966420d4ac23a0788b93a36fd
2025-02-04 03:14:31 -05:00
Jimbo Xie 4872b420c9 SWDEV-504383 - Cleaned up kForcedTimeout10us and removed IsHwEventReadyForcedWait
Also removed active_wait_timeout

Change-Id: I7a429f003c09a4df267b5c0983050704260094c6
2025-01-31 14:40:18 -05:00
taosang2 32daa8f384 SWDEV-501963 - Add missing codes for gfx950
Cherry-pick https://gerrit-git.amd.com/c/compute/ec/clr/+/1162997

Change-Id: I6b3c6bf55c61cffd43cd6f17b75998f751b75723
2025-01-31 14:34:49 -05:00
kjayapra-amd 0324014710 SWDEV-509280 - Combine multiple definitions of callbackQueue into a single function.
Change-Id: Ibbb56136bec2beed71c202d75e8aec9e82640a4e
2025-01-30 15:58:11 -05:00
Saleel Kudchadker 2d450e8b06 SWDEV-504494 - Resolve signal dependencies
- Resolve signal dependencies for barrier value packet if there are > 1
  depenent signals. Barrier Value packet accounts for only 1 dep signal
- Better log

Change-Id: Ia506ad5d80b91d598f92e7b539f41756e9b4b64b
2025-01-29 19:49:02 +00:00
Jimbo Xie 4abedf2a0e SWDEV-510869 - add gfx1153 id
Change-Id: I36d39a1db2392990ad9b01d70676c3c986435707
2025-01-28 18:15:46 -05:00
German Andryeyev ea0b092af8 SWDEV-459826 - Add a crash dump for a failed queue
The logic can analyze the AQL queue state and
find a failed AQL packet with the kernel's name

Change-Id: I1a478fa2c25462cd07a194784958bdf22454b897
2025-01-28 14:27:46 -05:00
Saleel Kudchadker d208e8052f SWDEV-504494 - Set active engine for SDMA
Change-Id: I4cec84e71903c5813a7063e8b9ff1ea4473f4720
2025-01-27 17:54:36 -05:00
Ioannis Assiouras 21c223f8df SWDEV-510319 - Fixed random segfaults in graph tests
This change fixes random segfaults in graph tests that
are seen after the change make internal callbacks non-blocking.
The callback thread that decreases the GraphExec ref count
may now run after the runtime shutdown. This can cause a segfault
because the hip::device that is accessed in GraphExec destructor
is already destroyed during runtime shutdown. This patch ensures
that the hip::device object  stays alive until after the
callback thread completes.

Change-Id: I75a6ac01f27a0b2250bbd10ed389ebfb322927af
2025-01-25 09:54:15 -05:00
Saleel Kudchadker 9b7e0ad48a SWDEV-510186 - Improve logging of kernel names
- Demangle kernel names in logs

Change-Id: I9aa58e8c109becb45ef7fc747d991bd657c4190a
2025-01-24 11:43:02 -05:00
taosang2 799e54aa0d SWDEV-507969 - Fix wrong VGPRs for some devices
Change-Id: Ia8fc19564272e2c7171d991376bf896a99085a97
2025-01-22 10:11:47 -05:00
Jatin Chaudhary 6a5d19059d SWDEV-341217 - Initial work to use SPIRV in HIP
Change-Id: If5c09b5e86b498e7ac5eb05adf28cb7a1fac8101
2025-01-20 03:54:23 -05:00